summaryrefslogtreecommitdiff
path: root/bl1/aarch64
AgeCommit message (Expand)Author
2019-10-03TF-A: Add support for ARMv8.3-PAuth in BL1 SMC calls and BL2UAlexei Fedorov
2019-09-18Merge changes from topic "db/unsigned_long" into integrationSandrine Bailleux
2019-09-13Unsigned long should not be used as per coding guidelinesDeepika Bhavnani
2019-09-13Refactor ARMv8.3 Pointer Authentication support codeAlexei Fedorov
2019-08-21AArch64: Disable Secure Cycle CounterAlexei Fedorov
2019-07-24Refactor SPSR initialisation codeJohn Tsichritzis
2019-02-27BL1: Enable pointer authentication supportAntonio Nino Diaz
2019-01-04Sanitise includes across codebaseAntonio Nino Diaz
2018-11-01context_mgmt: Fix MISRA defectsAntonio Nino Diaz
2018-07-11Add end_vector_entry assembler macroRoberto Vargas
2018-03-21Rename 'smcc' to 'smccc'Antonio Nino Diaz
2018-02-21Ensure the correct execution of TLBI instructionsAntonio Nino Diaz
2017-07-12Fix order of #includesIsla Mitchell
2017-06-28Merge pull request #978 from etienne-lms/minor-builddanh-arm
2017-06-23bl1: include bl1_private.h in aarch* filesEtienne Carriere
2017-06-21Fully initialise essential control registersDavid Cunado
2017-05-11Merge pull request #927 from jeenu-arm/state-switchdavidcunado-arm
2017-05-03Use SPDX license identifiersdp-arm
2017-05-02Add macro to check whether the CPU implements an ELJeenu Viswambharan
2016-12-05Define and use no_ret macro where no return is expectedJeenu Viswambharan
2016-09-21AArch32: Add generic changes in BL1Yatharth Kochar
2016-08-22Remove looping around `plat_report_exception`Yatharth Kochar
2016-05-26Introduce some helper macros for exception vectorsSandrine Bailleux
2016-03-30Enable asynchronous abort exceptions during bootGerald Lejeune
2015-12-09FWU: Add Generic Firmware Update framework support in BL1Yatharth Kochar
2015-12-09Add descriptor based image management support in BL1Yatharth Kochar
2015-12-09Move context management code to common locationYatharth Kochar
2015-11-26Introduce COLD_BOOT_SINGLE_CPU build optionSandrine Bailleux
2015-11-26Pass the entry point info to bl1_plat_prepare_exit()Sandrine Bailleux
2015-11-26Introduce SPIN_ON_BL1_EXIT build flagSandrine Bailleux
2015-11-02Improve display_boot_progress() functionSandrine Bailleux
2015-10-20Add optional bl1_plat_prepare_exit() APIJuan Castillo
2015-10-19Break down BL1 AArch64 synchronous exception handlerSandrine Bailleux
2015-06-04Introduce PROGRAMMABLE_RESET_ADDRESS build optionSandrine Bailleux
2015-06-04Rationalize reset handling codeSandrine Bailleux
2015-04-08Add support to indicate size and end of assembly functionsKévin Petit
2015-01-22Remove coherent memory from the BL memory mapsSoby Mathew
2014-08-27Miscellaneous documentation fixesSandrine Bailleux
2014-08-20Introduce framework for CPU specific operationsSoby Mathew
2014-08-15Unmask SError interrupt and clear SCR_EL3.EA bitAchin Gupta
2014-07-28Simplify management of SCTLR_EL3 and SCTLR_EL1Achin Gupta
2014-07-19Remove coherent stack usage from the cold boot pathAchin Gupta
2014-06-27Merge pull request #151 from vikramkanigiri/vk/t133-code-readabilityAndrew Thoelke
2014-06-24Remove all checkpatch errors from codebaseJuan Castillo
2014-06-24Simplify entry point information generation code on FVPVikram Kanigiri
2014-06-23Initialise CPU contexts from entry_point_infoAndrew Thoelke
2014-05-22Add support for BL3-1 as a reset vectorVikram Kanigiri
2014-05-22Populate BL31 input parameters as per new specVikram Kanigiri
2014-05-22Rework handover interface between BL stagesVikram Kanigiri
2014-05-08Merge pull request #62 from athoelke/set-little-endian-v2danh-arm
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-12 05:52:32 +0000