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path: root/drivers/clk/renesas/renesas-cpg-mssr.h
AgeCommit message (Expand)Author
2021-06-24clk: renesas: Add R8A779A0 clock tablesHai Pham
2021-05-21clk: renesas: Add register pointers into struct cpg_mssr_infoHai Pham
2021-05-21clk: renesas: Introduce enum clk_reg_layoutHai Pham
2021-05-21clk: renesas: Pass struct cpg_mssr_info to renesas_clk_endisable()Hai Pham
2021-05-21clk: renesas: Make reset controller modemr register offset configurableMarek Vasut
2020-05-18common: Drop linux/bitops.h from common headerSimon Glass
2019-04-09clk: renesas: Synchronize Gen3 tables with Linux 5.0Marek Vasut
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
2018-01-24clk: renesas: Add Gen2 clock coreMarek Vasut
2018-01-24clk: renesas: Add DIV6P1 clock typeMarek Vasut
2018-01-24clk: renesas: Split out code shared between Gen2 and Gen3Marek Vasut
2018-01-24clk: renesas: Split SMSTPCR and RMSTPCR tablesMarek Vasut
2018-01-24clk: renesas: Pull Gen3 specific bits into separate headerMarek Vasut
2018-01-24clk: renesas: Make PLL configurations per-SoCMarek Vasut
2018-01-24clk: renesas: Make clk_ids per-driverMarek Vasut
2018-01-24clk: renesas: Split RCar Gen3 driverMarek Vasut