summaryrefslogtreecommitdiff
path: root/board/AndesTech/ax25-ae350/ax25-ae350.c
AgeCommit message (Expand)Author
2023-02-17riscv: Rename Andes cpu and board namesLeo Yu-Chi Liang
2023-02-17board: AndesTech: ax25-ae350.c: Enable v5l2-cache in spl_board_init()Yu Chien Peter Lin
2022-10-20riscv: ae350: Check firmware_fdt_addr headerRick Chen
2022-08-11riscv: ae350: Fix XIP config boot failureLeo Yu-Chi Liang
2021-11-08riscv: ae350: Use #if defined instead of CONFIG_IS_ENABLEDLeo Yu-Chi Liang
2021-10-27sandbox: Remove OF_HOSTFILEIlias Apalodimas
2021-10-18riscv: Remove OF_PRIOR_STAGE from RISC-V boardsIlias Apalodimas
2021-09-04mmc: Rename MMC_SUPPORT to MMCSimon Glass
2021-02-15Merge branch '2021-02-02-drop-asm_global_data-when-unused'Tom Rini
2021-02-03riscv: ax25-ae350: Cast addr with uintptr_tBin Meng
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass
2020-07-24riscv: ae350: Use fdtdec_get_addr_size_auto_noparent to parse smc regRick Chen
2020-07-17treewide: convert bd_t to struct bd_info by coccinelleMasahiro Yamada
2020-05-18common: Drop image.h from common headerSimon Glass
2020-05-18common: Drop net.h from common headerSimon Glass
2020-05-18common: Drop flash.h from common headerSimon Glass
2020-01-17common: Move RAM-sizing functions to init.hSimon Glass
2019-12-10riscv: ax25-ae350: Use generic memory size setupRick Chen
2019-12-10riscv: ax25-ae350: add SPL configurationRick Chen
2019-09-03riscv: ae350: use the v5l2 driver to configure the cacheRick Chen
2019-05-09riscv: configs: AE350 will use CONFIG_OF_SEPARATE when boots from flashRick Chen
2018-12-05riscv: ax25-ae350: Pass dtb address to u-boot with a1 registerRick Chen
2018-10-03riscv: Remove mach typeBin Meng
2018-05-29board: ax25-ae350: Support cfi flashRick Chen
2018-05-29board: nx25-ae250: Rename as ax25-ae350Rick Chen