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path: root/arch/x86/cpu/ivybridge/cpu.c
AgeCommit message (Expand)Author
2022-03-10event: Convert arch_cpu_init_dm() to use eventsSimon Glass
2021-03-02reset: Remove addr parameter from reset_cpu()Harald Seiler
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass
2020-05-18common: Drop log.h from common headerSimon Glass
2020-05-18common: Drop init.h from common headerSimon Glass
2019-12-02common: Move checkcpu() out of common.hSimon Glass
2019-10-08x86: pci: Drop the first parameter in pci_x86_r/w_config()Simon Glass
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
2017-04-05board_f: x86: Use checkcpu() for CPU initSimon Glass
2017-02-06x86: ivybridge: Add more debugging for failuresSimon Glass
2016-08-30x86: Add debugging when cpu_common_init() failsSimon Glass
2016-03-17x86: Move common PCH code into a common placeSimon Glass
2016-03-17x86: Move common CPU code to its own placeSimon Glass
2016-03-17x86: Create a common header for Intel register accessSimon Glass
2016-03-17x86: Move microcode code to a common locationSimon Glass
2016-03-14dm: Use uclass_first_device_err() where it is usefulSimon Glass
2016-01-24x86: ivybridge: Convert enable_usb_bar() to use DM PCI APISimon Glass
2016-01-24x86: ivybridge: Use the I2C driver to perform SMbus initSimon Glass
2016-01-24x86: ivybridge: Do the SATA init before relocationSimon Glass
2016-01-24x86: ivybridge: Move GPIO init to the LPC init() methodSimon Glass
2016-01-24x86: ivybridge: Move graphics init much laterSimon Glass
2016-01-24x86: ivybridge: Probe the LPC in CPU initSimon Glass
2016-01-24x86: ivybridge: Move northbridge init into the probe() methodSimon Glass
2016-01-24x86: ivybridge: Rename bd82x6x_init()Simon Glass
2016-01-24x86: ivybridge: Move more init to the probe() functionSimon Glass
2016-01-24x86: ivybridge: Move lpc_early_init() to probe()Simon Glass
2016-01-24x86: ivybridge: Set up the LPC device using driver modelSimon Glass
2015-12-09x86: Remove HAVE_ACPI_RESUMEBin Meng
2015-12-01x86: Convert to use driver model timerBin Meng
2015-10-21x86: chromebook_link: Enable the debug UARTSimon Glass
2015-04-29x86: ivybridge: Use reset_cpu()Simon Glass
2015-04-18x86: chromebook_link: dts: Add PCH and LPC devicesSimon Glass
2015-04-18dm: x86: pci: Convert chromebook_link to use driver model for pciSimon Glass
2015-04-16x86: Split up arch_cpu_init()Simon Glass
2015-04-16x86: Add a x86_ prefix to the x86-specific PCI functionsSimon Glass
2015-01-13x86: ivybridge: Update microcode early in bootSimon Glass
2015-01-13x86: ivybridge: Drop support for ROM cachingSimon Glass
2014-12-13x86: Add post failure codes for bist and carBin Meng
2014-11-21x86: ivybridge: Add LAPIC supportSimon Glass
2014-11-21x86: ivybridge: Add early init for PCH devicesSimon Glass
2014-11-21x86: ivybridge: Perform Intel microcode update on bootSimon Glass
2014-11-21x86: ivybridge: Check BIST value on bootSimon Glass
2014-11-21x86: ivybridge: Perform initial CPU setupSimon Glass
2014-11-21x86: ivybridge: Add early LPC init so that serial worksSimon Glass
2014-11-21x86: ivybridge: Enable PCI in early initSimon Glass
2014-11-21x86: chromebook_link: Implement CAR support (cache as RAM)Simon Glass
2014-11-21x86: Add chromebook_link boardSimon Glass
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