| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-06-08 | sunxi: add LPDDR3 DRAM type support for DesignWare-like DRAM controller | Icenowy Zheng |
| 2017-06-08 | sunxi: add support for V3s DRAM controller | Icenowy Zheng |
| 2017-06-08 | sunxi: add support for the DDR2 in V3s SoC | Icenowy Zheng |
| 2017-06-08 | sunxi: enable dual rank detection in DesignWare-like DRAM code | Icenowy Zheng |
| 2017-06-08 | sunxi: Add selective DRAM type and timing | Icenowy Zheng |
| 2017-06-08 | sunxi: add bank detection code to H3 DRAM initialization code | Icenowy Zheng |
| 2017-06-08 | sunxi: add option for 16-bit DW DRAM controller | Icenowy Zheng |
| 2017-06-08 | sunxi: Rename bus-width related macros in H3 DRAM code | Icenowy Zheng |
| 2017-06-08 | sunxi: makes an invisible option for H3-like DRAM controllers | Icenowy Zheng |
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index : u-boot-toradex.git | |
| U-Boot bootloader for Apalis and Colibri modules | Marcel Ziswiler |
| summaryrefslogtreecommitdiff |