Merge git://git.denx.de/u-boot-rockchip

4 files changed, 40 insertions, 3 deletions

diff --git a/include/clk-uclass.h b/include/clk-uclass.h
index e7ea334c60..75933eb884 100644
--- a/include/clk-uclass.h
+++ b/include/clk-uclass.h
@@ -78,6 +78,14 @@ struct clk_ops {
 	 */
 	ulong (*set_rate)(struct clk *clk, ulong rate);
 	/**
+	 * set_parent() - Set current clock parent
+	 *
+	 * @clk:        The clock to manipulate.
+	 * @parent:     New clock parent.
+	 * @return zero on success, or -ve error code.
+	 */
+	int (*set_parent)(struct clk *clk, struct clk *parent);
+	/**
 	 * enable() - Enable a clock.
 	 *
 	 * @clk:	The clock to manipulate.
diff --git a/include/clk.h b/include/clk.h
index e7ce3e8576..a7d95d32c9 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -133,6 +133,23 @@ static inline int clk_release_all(struct clk *clk, int count)
 
 #endif
 
+#if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) && \
+	CONFIG_IS_ENABLED(CLK)
+/**
+ * clk_set_defaults - Process 'assigned-{clocks/clock-parents/clock-rates}'
+ *                    properties to configure clocks
+ *
+ * @dev:        A device to process (the ofnode associated with this device
+ *              will be processed).
+ */
+int clk_set_defaults(struct udevice *dev);
+#else
+static inline int clk_set_defaults(struct udevice *dev)
+{
+	return 0;
+}
+#endif
+
 /**
  * clk_request - Request a clock by provider-specific ID.
  *
@@ -178,6 +195,17 @@ ulong clk_get_rate(struct clk *clk);
 ulong clk_set_rate(struct clk *clk, ulong rate);
 
 /**
+ * clk_set_parent() - Set current clock parent.
+ *
+ * @clk:	A clock struct that was previously successfully requested by
+ *		clk_request/get_by_*().
+ * @parent:	A clock struct that was previously successfully requested by
+ *		clk_request/get_by_*().
+ * @return new rate, or -ve error code.
+ */
+int clk_set_parent(struct clk *clk, struct clk *parent);
+
+/**
  * clk_enable() - Enable (turn on) a clock.
  *
  * @clk:	A clock struct that was previously successfully requested by
diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
index 216eee5b59..e37113a72d 100644
--- a/include/dt-bindings/clock/rk3288-cru.h
+++ b/include/dt-bindings/clock/rk3288-cru.h
@@ -76,6 +76,7 @@
 #define SCLK_PVTM_CORE		123
 #define SCLK_PVTM_GPU		124
 
+#define SCLK_MAC_PLL		150
 #define SCLK_MAC		151
 #define SCLK_MACREF_OUT		152
 
diff --git a/include/dt-bindings/clock/rk3328-cru.h b/include/dt-bindings/clock/rk3328-cru.h
index 6d8bf1330b..cdc0b338aa 100644
--- a/include/dt-bindings/clock/rk3328-cru.h
+++ b/include/dt-bindings/clock/rk3328-cru.h
@@ -86,6 +86,9 @@
 #define SCLK_USB3OTG_SUSPEND	97
 #define SCLK_REF_USB3OTG_SRC	98
 #define SCLK_MAC2IO_SRC		99
+#define SCLK_MAC2IO		100
+#define SCLK_MAC2PHY		101
+#define SCLK_MAC2IO_EXT		102
 
 /* dclk gates */
 #define DCLK_LCDC		180
@@ -199,9 +202,6 @@
 
 #define CLK_NR_CLKS		(HCLK_HDCP + 1)
 
-#define SCLK_MAC2IO		0
-#define SCLK_MAC2PHY		1
-
 #define CLKGRF_NR_CLKS		(SCLK_MAC2PHY + 1)
 
 /* soft-reset indices */