From f7d1046da18fd03a047b5f4d290a8ab8550ebf73 Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 8 Jan 2018 11:15:08 +0100 Subject: clk: add clk_set_parent() Clocks may support multiple parents: this change introduces an optional operation on the clk-uclass to set a clock's parent. Signed-off-by: Philipp Tomsich Tested-by: David Wu Series-changes: 2 - Fixed David's email address. --- include/clk-uclass.h | 8 ++++++++ include/clk.h | 11 +++++++++++ 2 files changed, 19 insertions(+) (limited to 'include') diff --git a/include/clk-uclass.h b/include/clk-uclass.h index e7ea334c60..75933eb884 100644 --- a/include/clk-uclass.h +++ b/include/clk-uclass.h @@ -77,6 +77,14 @@ struct clk_ops { * @return new rate, or -ve error code. */ ulong (*set_rate)(struct clk *clk, ulong rate); + /** + * set_parent() - Set current clock parent + * + * @clk: The clock to manipulate. + * @parent: New clock parent. + * @return zero on success, or -ve error code. + */ + int (*set_parent)(struct clk *clk, struct clk *parent); /** * enable() - Enable a clock. * diff --git a/include/clk.h b/include/clk.h index e7ce3e8576..e463d8e60d 100644 --- a/include/clk.h +++ b/include/clk.h @@ -177,6 +177,17 @@ ulong clk_get_rate(struct clk *clk); */ ulong clk_set_rate(struct clk *clk, ulong rate); +/** + * clk_set_parent() - Set current clock parent. + * + * @clk: A clock struct that was previously successfully requested by + * clk_request/get_by_*(). + * @parent: A clock struct that was previously successfully requested by + * clk_request/get_by_*(). + * @return new rate, or -ve error code. + */ +int clk_set_parent(struct clk *clk, struct clk *parent); + /** * clk_enable() - Enable (turn on) a clock. * -- cgit v1.2.3 From f4fcba5c5baaaa9d477d753f97124efdb8e45893 Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Mon, 8 Jan 2018 13:59:18 +0100 Subject: clk: implement clk_set_defaults() Linux uses the properties 'assigned-clocks', 'assigned-clock-parents' and 'assigned-clock-rates' to configure the clock subsystem for use with various peripheral nodes. This implements clk_set_defaults() and hooks it up with the general device probibin in drivers/core/device.c: when a new device is probed, clk_set_defaults() will be called for it and will process the properties mentioned above. Note that this functionality is designed to fail gracefully (i.e. if a clock-driver does not implement set_parent(), we simply accept this and ignore the error) as not to break existing board-support. Signed-off-by: Philipp Tomsich Tested-by: David Wu Series-changes: 2 - Fixed David's email address. Series-version: 2 Cover-letter: clk: support assigned-clock, assigned-clock-parents, assigned-clock-rates For various peripherals on Rockchip SoCs (e.g. for the Ethernet GMAC), the parent-clock needs to be set via the DTS. This adds the required plumbing and implements the GMAC case for the RK3399. END --- include/clk.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'include') diff --git a/include/clk.h b/include/clk.h index e463d8e60d..a7d95d32c9 100644 --- a/include/clk.h +++ b/include/clk.h @@ -133,6 +133,23 @@ static inline int clk_release_all(struct clk *clk, int count) #endif +#if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) && \ + CONFIG_IS_ENABLED(CLK) +/** + * clk_set_defaults - Process 'assigned-{clocks/clock-parents/clock-rates}' + * properties to configure clocks + * + * @dev: A device to process (the ofnode associated with this device + * will be processed). + */ +int clk_set_defaults(struct udevice *dev); +#else +static inline int clk_set_defaults(struct udevice *dev) +{ + return 0; +} +#endif + /** * clk_request - Request a clock by provider-specific ID. * -- cgit v1.2.3 From 7cd4ebab2bc425b027dc91872b1feb766e9bc9ff Mon Sep 17 00:00:00 2001 From: David Wu Date: Sat, 13 Jan 2018 14:02:36 +0800 Subject: clk: rockchip: Add rk3328 gamc clock support The rk3328 soc has two gmac controllers, one is gmac2io, the other is gmac2phy. We use the gmac2io rgmii interface for 1000M phy here. Signed-off-by: David Wu Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- include/dt-bindings/clock/rk3328-cru.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/dt-bindings/clock/rk3328-cru.h b/include/dt-bindings/clock/rk3328-cru.h index 6d8bf1330b..cdc0b338aa 100644 --- a/include/dt-bindings/clock/rk3328-cru.h +++ b/include/dt-bindings/clock/rk3328-cru.h @@ -86,6 +86,9 @@ #define SCLK_USB3OTG_SUSPEND 97 #define SCLK_REF_USB3OTG_SRC 98 #define SCLK_MAC2IO_SRC 99 +#define SCLK_MAC2IO 100 +#define SCLK_MAC2PHY 101 +#define SCLK_MAC2IO_EXT 102 /* dclk gates */ #define DCLK_LCDC 180 @@ -199,9 +202,6 @@ #define CLK_NR_CLKS (HCLK_HDCP + 1) -#define SCLK_MAC2IO 0 -#define SCLK_MAC2PHY 1 - #define CLKGRF_NR_CLKS (SCLK_MAC2PHY + 1) /* soft-reset indices */ -- cgit v1.2.3 From 01c60eafbbf613f8b29fb317f7c52be932d303d1 Mon Sep 17 00:00:00 2001 From: David Wu Date: Sat, 13 Jan 2018 14:06:33 +0800 Subject: clk: rockchip: clk_rk3288: Implement "assign-clock-parent" and "assign-clock-rate" The RK3288 CRU-node assigns rates to a number of clocks that are not implemented in the RK3288 clock-driver (but which have been sufficiently initialised from rkclk_init()): for these clocks, we implement the gmac clock set parent, but simply ignore the others' set_rate() operation and return 0 to signal success. Signed-off-by: David Wu Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- include/dt-bindings/clock/rk3288-cru.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h index 216eee5b59..e37113a72d 100644 --- a/include/dt-bindings/clock/rk3288-cru.h +++ b/include/dt-bindings/clock/rk3288-cru.h @@ -76,6 +76,7 @@ #define SCLK_PVTM_CORE 123 #define SCLK_PVTM_GPU 124 +#define SCLK_MAC_PLL 150 #define SCLK_MAC 151 #define SCLK_MACREF_OUT 152 -- cgit v1.2.3