diff options
| author | Matt Ranostay <mranostay@ti.com> | 2022-06-08 06:14:15 -0700 |
|---|---|---|
| committer | Anand Gadiyar <gadiyar@ti.com> | 2022-06-12 18:51:08 -0500 |
| commit | ad3d63b199fd48ab2fb6ca8069a11b40faa378d5 (patch) | |
| tree | 70defac15306282537e7a74ff5906543a21e6caf /common | |
| parent | 23e98f546fec3c1c05753fca9360b65f0054435a (diff) | |
spl: Add support for enabling d-cache in board_init_r
This patchset reimplements part of the dropped patchset bd236384ceef
which enables d-cache during SPL execution.
Having the d-cache disabled created a regression that added additional
250 milliseconds to A72 SPL boot time on the J721E platform.
Signed-off-by: Matt Ranostay <mranostay@ti.com>
Diffstat (limited to 'common')
| -rw-r--r-- | common/spl/spl.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/common/spl/spl.c b/common/spl/spl.c index 63c48fbf33..67882bb194 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -602,6 +602,12 @@ void board_init_r(gd_t *dummy1, ulong dummy2) spl_set_bd(); +#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ + (defined(CONFIG_CPU_V7A) || defined(CONFIG_ARM64) || \ + defined(CONFIG_CPU_V7R)) + enable_caches(); +#endif + #if defined(CONFIG_SYS_SPL_MALLOC_START) mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START, CONFIG_SYS_SPL_MALLOC_SIZE); |