From ad3d63b199fd48ab2fb6ca8069a11b40faa378d5 Mon Sep 17 00:00:00 2001 From: Matt Ranostay Date: Wed, 8 Jun 2022 06:14:15 -0700 Subject: spl: Add support for enabling d-cache in board_init_r This patchset reimplements part of the dropped patchset bd236384ceef which enables d-cache during SPL execution. Having the d-cache disabled created a regression that added additional 250 milliseconds to A72 SPL boot time on the J721E platform. Signed-off-by: Matt Ranostay --- common/spl/spl.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'common') diff --git a/common/spl/spl.c b/common/spl/spl.c index 63c48fbf33d..67882bb1947 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -602,6 +602,12 @@ void board_init_r(gd_t *dummy1, ulong dummy2) spl_set_bd(); +#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ + (defined(CONFIG_CPU_V7A) || defined(CONFIG_ARM64) || \ + defined(CONFIG_CPU_V7R)) + enable_caches(); +#endif + #if defined(CONFIG_SYS_SPL_MALLOC_START) mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START, CONFIG_SYS_SPL_MALLOC_SIZE); -- cgit v1.2.3