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authorSandeep Gopalpet <sandeep.kumar@freescale.com>2010-03-11 15:43:32 +0530
committerScott Sweeny <scott.sweeny@timesys.com>2010-11-10 14:52:25 -0500
commit1970f67b8b1ae3bfd1ff0cdfa6945da2037d8ca9 (patch)
tree64053f64efc423f848f1a1862a777e15ca56adbd /board
parentf51d2ef6970d1fe1a09b28d7be8755036d36fb80 (diff)
85xx/p1_p2_rdb: p1020: DDR changes
Signed-off-by: Maneesh Gupta <maneesh.gupta@freescale.com>
Diffstat (limited to 'board')
-rw-r--r--board/freescale/p1_p2_rdb/ddr.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/board/freescale/p1_p2_rdb/ddr.c b/board/freescale/p1_p2_rdb/ddr.c
index cc09046fba..3938b45c91 100644
--- a/board/freescale/p1_p2_rdb/ddr.c
+++ b/board/freescale/p1_p2_rdb/ddr.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2009 Freescale Semiconductor, Inc.
+ * Copyright 2009-2010 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -245,9 +245,17 @@ phys_size_t fixed_sdram (void)
phys_size_t initdram(int board_type)
{
phys_size_t dram_size = 0;
+ struct cpu_type *cpu;
#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_FSL_BOOT_DDR)
- return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
+ cpu = gd->cpu;
+
+ /* P1020 and it's derivatives support max 32bit DDR width */
+ if (cpu->soc_ver == SVR_P1020 || cpu->soc_ver == SVR_P1020_E ||
+ cpu->soc_ver == SVR_P1011 || cpu->soc_ver == SVR_P1011_E)
+ return (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024) / 2;
+ else
+ return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
#endif
dram_size = fixed_sdram();
set_ddr_laws(0, dram_size, LAW_TRGT_IF_DDR_1);