From 1970f67b8b1ae3bfd1ff0cdfa6945da2037d8ca9 Mon Sep 17 00:00:00 2001 From: Sandeep Gopalpet Date: Thu, 11 Mar 2010 15:43:32 +0530 Subject: 85xx/p1_p2_rdb: p1020: DDR changes Signed-off-by: Maneesh Gupta --- board/freescale/p1_p2_rdb/ddr.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'board') diff --git a/board/freescale/p1_p2_rdb/ddr.c b/board/freescale/p1_p2_rdb/ddr.c index cc09046fba..3938b45c91 100644 --- a/board/freescale/p1_p2_rdb/ddr.c +++ b/board/freescale/p1_p2_rdb/ddr.c @@ -1,5 +1,5 @@ /* - * Copyright 2009 Freescale Semiconductor, Inc. + * Copyright 2009-2010 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -245,9 +245,17 @@ phys_size_t fixed_sdram (void) phys_size_t initdram(int board_type) { phys_size_t dram_size = 0; + struct cpu_type *cpu; #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_FSL_BOOT_DDR) - return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + cpu = gd->cpu; + + /* P1020 and it's derivatives support max 32bit DDR width */ + if (cpu->soc_ver == SVR_P1020 || cpu->soc_ver == SVR_P1020_E || + cpu->soc_ver == SVR_P1011 || cpu->soc_ver == SVR_P1011_E) + return (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024) / 2; + else + return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; #endif dram_size = fixed_sdram(); set_ddr_laws(0, dram_size, LAW_TRGT_IF_DDR_1); -- cgit v1.2.3