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author | Vaishnav Achath <vaishnav.a@ti.com> | 2023-07-06 13:51:25 +0530 |
---|---|---|
committer | Udit Kumar <u-kumar1@ti.com> | 2023-07-06 14:13:03 +0530 |
commit | 3dd021037374204973d81865d5176154b2168e73 (patch) | |
tree | e5e929b214fca7f15c9bcdca60525fd20d814883 /arch/arm | |
parent | d0f04ea0e3fe2b01999eb769515be634364f8158 (diff) |
arm64: dts: k3-j7200-som-p0: Enable OSPI PHY mode
For achieving higher clocks speeds (greater than 25 MHz DDR) with OSPI,
OSPI PHY needs to be enabled and calibrate, add the necessary property
to enable PHY.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/dts/k3-j7200-som-p0.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/dts/k3-j7200-som-p0.dtsi b/arch/arm/dts/k3-j7200-som-p0.dtsi index 70b5ee8012f..73a7d5266cd 100644 --- a/arch/arm/dts/k3-j7200-som-p0.dtsi +++ b/arch/arm/dts/k3-j7200-som-p0.dtsi @@ -298,6 +298,7 @@ cdns,tchsh-ns = <60>; cdns,tslch-ns = <60>; cdns,read-delay = <4>; + cdns,phy-mode; partitions { compatible = "fixed-partitions"; |