From 3dd021037374204973d81865d5176154b2168e73 Mon Sep 17 00:00:00 2001 From: Vaishnav Achath Date: Thu, 6 Jul 2023 13:51:25 +0530 Subject: arm64: dts: k3-j7200-som-p0: Enable OSPI PHY mode For achieving higher clocks speeds (greater than 25 MHz DDR) with OSPI, OSPI PHY needs to be enabled and calibrate, add the necessary property to enable PHY. Signed-off-by: Vaishnav Achath --- arch/arm/dts/k3-j7200-som-p0.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/dts/k3-j7200-som-p0.dtsi b/arch/arm/dts/k3-j7200-som-p0.dtsi index 70b5ee8012f..73a7d5266cd 100644 --- a/arch/arm/dts/k3-j7200-som-p0.dtsi +++ b/arch/arm/dts/k3-j7200-som-p0.dtsi @@ -298,6 +298,7 @@ cdns,tchsh-ns = <60>; cdns,tslch-ns = <60>; cdns,read-delay = <4>; + cdns,phy-mode; partitions { compatible = "fixed-partitions"; -- cgit v1.2.3