1 files changed, 47 insertions, 0 deletions
diff --git a/ecos/packages/hal/cortexm/kinetis/twr_k60n512_fxm/current/include/pkgconf/mlt_kinetis_flash_unisram_extram_rom.ldi b/ecos/packages/hal/cortexm/kinetis/twr_k60n512_fxm/current/include/pkgconf/mlt_kinetis_flash_unisram_extram_rom.ldi
new file mode 100644
index 0000000..b43ce41
--- /dev/null
+++ b/ecos/packages/hal/cortexm/kinetis/twr_k60n512_fxm/current/include/pkgconf/mlt_kinetis_flash_unisram_extram_rom.ldi
@@ -0,0 +1,47 @@
+// eCos memory layout
+
+#include <pkgconf/hal.h>
+#include <cyg/infra/cyg_type.inc>
+
+MEMORY
+{
+    sram   : ORIGIN = 0x20000000 - CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE, LENGTH = CYGHWR_HAL_KINETIS_SRAM_SIZE-CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
+    flash  : ORIGIN = 0x00000000, LENGTH = CYGHWR_HAL_KINETIS_FLASH_SIZE
+    ramcod : ORIGIN = CYGHWR_HAL_KINETIS_FBR_CODE_BASE, LENGTH = CYGHWR_HAL_KINETIS_FBR_CODE_SIZE
+    ram    : ORIGIN = CYGHWR_HAL_KINETIS_FBR_CACHED_BASE, LENGTH = CYGHWR_HAL_KINETIS_FBR_CACHED_SIZE
+    ramnc  : ORIGIN = CYGHWR_HAL_KINETIS_FBR_NON_CACHED_BASE, LENGTH = CYGHWR_HAL_KINETIS_FBR_NON_CACHED_SIZE
+}
+
+SECTIONS
+{
+    SECTIONS_BEGIN
+    SECTION_rom_vectors (flash, 0x00000000, LMA_EQ_VMA)
+    USER_SECTION(kinetis_misc, flash, ALIGN (0x8), LMA_EQ_VMA)
+
+    // Kinetis FLASH configuration field. Must be present at 0x00000400
+    // Warning: Omitting FLASH configuration field or moving it to
+    //          other location may lock Kinetis controller.
+    // See src/kinetis_mis.c for definition
+
+    .flash_conf 0x00000400 : { KEEP (*(.flash_conf)) } > flash
+
+    SECTION_RELOCS (flash, ALIGN (0x8), LMA_EQ_VMA)
+    SECTION_text (flash, ALIGN (0x8), LMA_EQ_VMA)
+    SECTION_fini (flash, ALIGN (0x8), LMA_EQ_VMA)
+    SECTION_rodata (flash, ALIGN (0x8), LMA_EQ_VMA)
+    SECTION_rodata1 (flash, ALIGN (0x8), LMA_EQ_VMA)
+    SECTION_fixup (flash, ALIGN (0x8), LMA_EQ_VMA)
+    SECTION_gcc_except_table (flash, ALIGN (0x8), LMA_EQ_VMA)
+    SECTION_eh_frame (flash, ALIGN (0x8), LMA_EQ_VMA)
+    SECTION_got (flash, ALIGN (0x8), LMA_EQ_VMA)
+    SECTION_sram (sram, 0x20000000 - CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE + 0x400, FOLLOWING (.got))
+    SECTION_data (ram, CYGHWR_HAL_KINETIS_FBR_CACHED_BASE, FOLLOWING (.sram))
+    SECTION_bss (ram, ALIGN (0x8), LMA_EQ_VMA)
+    CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
+    USER_SECTION (noncache, ramnc, CYGHWR_HAL_KINETIS_FBR_NON_CACHED_BASE (NOLOAD), LMA_EQ_VMA)
+    SECTIONS_END
+}
+
+hal_vsr_table = (0x20000000 - CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE);
+hal_virtual_vector_table = hal_vsr_table + 128*4;
+hal_startup_stack = 0x20000000 + CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE;