diff options
| author | Michael Gielda <mgielda@antmicro.com> | 2014-04-03 14:53:04 +0200 |
|---|---|---|
| committer | Michael Gielda <mgielda@antmicro.com> | 2014-04-03 14:53:04 +0200 |
| commit | ae1e4e08a1005a0c487f03ba189d7536e7fdcba6 (patch) | |
| tree | f1c296f8a966a9a39876b0e98e16d9c5da1776dd /ecos/packages/hal/v85x/arch | |
| parent | f157da5337118d3c5cd464266796de4262ac9dbd (diff) | |
Added the OS files
Diffstat (limited to 'ecos/packages/hal/v85x/arch')
| -rw-r--r-- | ecos/packages/hal/v85x/arch/current/ChangeLog | 251 | ||||
| -rw-r--r-- | ecos/packages/hal/v85x/arch/current/cdl/hal_v85x.cdl | 106 | ||||
| -rw-r--r-- | ecos/packages/hal/v85x/arch/current/include/basetype.h | 72 | ||||
| -rw-r--r-- | ecos/packages/hal/v85x/arch/current/include/hal_arch.h | 283 | ||||
| -rw-r--r-- | ecos/packages/hal/v85x/arch/current/include/hal_cache.h | 67 | ||||
| -rw-r--r-- | ecos/packages/hal/v85x/arch/current/include/hal_intr.h | 283 | ||||
| -rw-r--r-- | ecos/packages/hal/v85x/arch/current/include/hal_io.h | 146 | ||||
| -rw-r--r-- | ecos/packages/hal/v85x/arch/current/include/nec-stub.h | 117 | ||||
| -rw-r--r-- | ecos/packages/hal/v85x/arch/current/src/hal_misc.c | 230 | ||||
| -rw-r--r-- | ecos/packages/hal/v85x/arch/current/src/hal_mk_defs.c | 176 | ||||
| -rw-r--r-- | ecos/packages/hal/v85x/arch/current/src/vectors.S | 651 |
11 files changed, 2382 insertions, 0 deletions
diff --git a/ecos/packages/hal/v85x/arch/current/ChangeLog b/ecos/packages/hal/v85x/arch/current/ChangeLog new file mode 100644 index 0000000..0a516a4 --- /dev/null +++ b/ecos/packages/hal/v85x/arch/current/ChangeLog @@ -0,0 +1,251 @@ +2004-04-22 Jani Monoses <jani@iv.ro> + + * cdl/hal_v85x.cdl : + Invoke tail with stricter syntax that works in latest coreutils. + +2003-12-08 Gary Thomas <gary@mlbassoc.com> + + * src/hal_misc.c: Remove unused __mem_fault_handler declaration. + +2001-11-26 Jesper Skov <jskov@redhat.com> + + * src/hal_misc.c (hal_msbit_index): Fixed. + +2001-04-24 Jonathan Larmour <jlarmour@redhat.com> + + * src/vectors.S: Support daft platforms like the CEB which have + default on-chip flash that vector NMI to 2 insns after reset. + Also place hal_v85x_ice_syscall_info in fixed location, only + for ROM/ROMRAM builds. + +2001-03-28 Jonathan Larmour <jlarmour@redhat.com> + + * src/vectors.S: Overhaul... + Make interrupt processing path faster, especially by implementing + CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT + Add ROMRAM startup support + Pass in correct argument to exception_handler + Call DSRs with parameter flushback area + Add __allow_nmi as a somewhat kludgy means of determining + whether NMIs should be ignored - important if the board resets + and the vector tables are temporarily inconsistent. + Initialize __vsr_table statically. + Add some generic elements of ICE debugging support + + * src/v85x.ld: Remove - redundant. + + * src/hal_mk_defs.c (main): Update to reflect new vector names + (to match official NEC docs) + + * src/hal_misc.c (exception_handler): Remove cygmon cruft. + (hal_arch_default_isr): Report spurious interrupts. + (hal_idle_thread_action): use halt instruction + + * include/hal_arch.h: Remove obsolete comment reference to arch.inc. + + * include/basetype.h: No need to include <pkgconf/hal.h> + * include/hal_io.h: Ditto. + * include/nec-stub.h: Similarly for <pkgconf/system.h> + + * cdl/hal_v85x.cdl: Move CYGHWR_HAL_V85X_CPU_FREQ into platforms + (and make Hz, not MHz). + Add generic ICE debugging interface. + Description tidies. + +2001-01-26 Jonathan Larmour <jlarmour@redhat.com> + + * include/hal_intr.h: Move HAL_STUB_PLATFORM_RESET and + HAL_STUB_PLATFORM_RESET_ENTRY here from platform stub headers. + Also rename to HAL_PLATFORM_RESET and HAL_PLATFORM_RESET_ENTRY + + * src/vectors.S (_hal_reset_board): Renamed from hal_plf_reset_board + +2001-01-18 Nick Garnett <nickg@cygnus.co.uk> + + * src/vectors.S: Added underscore to reference to + cyg_scheduler_sched_lock, since CYGBLD_ATTRIB_ASM_ALIAS() now adds + one automatically. + +2000-10-20 Jesper Skov <jskov@redhat.com> + + * src/hal_misc.c: Update __mem_fault_handler declaration. + +2000-10-16 Jonathan Larmour <jlarmour@redhat.com> + + * include/hal_arch.h (CYGARC_JMP_BUF_SIZE): Define hal_jmp_buf in + terms of this. + +2000-10-09 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S (start): Need to handle ^C for all applications. + +2000-09-13 Jonathan Larmour <jlarmour@redhat.com> + + * src/vectors.S: When calling C functions, ensure there is 16 bytes + space for the parameter flushback area (as per the calling convention) + on the stack + +2000-09-07 Jonathan Larmour <jlarmour@redhat.com> + + * include/basetype.h: Don't need special alignment after all - it was + a bug elsewhere. + +2000-09-06 Gary Thomas <gthomas@redhat.com> + + * include/basetype.h: Need special alignment to match the way + the compiler/linker actually do things. + + * cdl/hal_v85x.cdl: Improve variant handling and specification. + +2000-08-30 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S (start): Allow programs to field NMI exceptions. + +2000-07-24 Jonathan Larmour <jlarmour@redhat.co.uk> + + * include/basetype.h: Removed definition of CYG_LABEL_NAME(). + + * src/v85x.ld: Switched to new table definition mechanism. + +2000-07-21 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S (_hal_plf_reset_board): Needs to be defined in all + configurations. + +2000-06-27 Jesper Skov <jskov@redhat.com> + + * src/vectors.S: + * src/hal_mk_defs.c: + Fix compiler warnings. + + * src/hal_misc.c (hal_default_isr): Let common version do the + checks. + +2000-06-15 Gary Thomas <gthomas@redhat.com> + + * src/hal_mk_defs.c: + * src/vectors.S: + * src/hal_misc.c (hal_default_isr): Update for new debug + vector support. + + * include/hal_intr.h: + * src/vectors.S (do_interrupt): Proper handling of chained + interrupts. + +2000-06-12 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S (return_from_exception_or_interrupt): Revert + reorg change (05-26) which broke GDB breakpoints. + +2000-06-08 Jesper Skov <jskov@redhat.com> + + * include/hal_arch.h (CYGARC_HAL_SAVE_GP, CYGARC_HAL_RESTORE_GP): + Added. + +2000-05-26 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S: Slight reorg of trap vectors (more readable). + +2000-05-25 John Dallaway <jld@redhat.com> + + * cdl/hal_v85x.cdl: Tidy display strings. + +2000-05-25 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S: Handle different chips (number of interrupt + sources differs, exception table is altered, etc). + + * include/hal_intr.h: Actual interrupt layout now defined by + variant/platform since these differ depending on the chip. + +2000-05-03 Gary Thomas <gthomas@redhat.com> + + * include/hal_arch.h: New breakpoint instruction ("br *"). + +2000-04-14 Gary Thomas <gthomas@redhat.com> + + * src/hal_misc.c (exception_handler): Proper handling of nested + [watchdog] interrupts - don't corrupt GDB registers. + + * src/hal_mk_defs.c: Add some symbols required for NMI handling. + + * src/vectors.S (return_from_exception_or_interrupt): + Properly handle different cases for exception, NMI and ISR. + + * include/hal_intr.h (HAL_TRANSLATE_VECTOR): Ignore interrupt + chaining - doesn't happen on this hardware. + +2000-04-11 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S (exception): Handle NMI. In particular, need to + have appropriate bits set so they clear and also get the state + from the proper save registers. + (exception): Register save was wrong - ROM only. + +2000-03-31 Gary Thomas <gthomas@redhat.com> + + * src/hal_mk_defs.c: Add definition for 'ep' register. + + * include/hal_intr.h: + * cdl/hal_nec.cdl: Add config option to choose between inline and + real functions for interrupt macros. + + * src/vectors.S: Tune up - use SLD/SST for smaller, faster code + in context load/save routines. Also remove IRQ trace/debug code. + +2000-03-30 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S (do_interrupt): Can't use R13 across function calls. + This caused instability when turning on kernel instrumentation. + + * include/hal_intr.h: Use out-of-line code for interrupt functions + for tracing/testing. + + * src/vectors.S: Working support for separate interrupt stack. + Some debug/trace code left in. + + * src/hal_mk_defs.c: + * include/hal_arch.h: Documented API does not match actual GCC + register usage. Need to save R1/R2/R4/R5 for setjmp/longjmp. + +2000-03-27 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S (do_interrupt): Pass regs to ISR & DSR. + + * include/basetype.h: Endian-ness was incorrect. + + * include/hal_arch.h: + * src/hal_mk_defs.c: Complete setjmp/longjmp support. + + * src/vectors.S: Add interrupt stack. + +2000-03-21 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S (_hal_plf_reset_board): Add board reset function. + + * include/hal_arch.h (CYGHWR_TEST_PROGRAM_EXIT): Define RESET for ROM + based programs. + +//=========================================================================== +// ####GPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 or (at your option) any +// later version. +// +// This program is distributed in the hope that it will be useful, but +// WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +// General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the +// Free Software Foundation, Inc., 51 Franklin Street, +// Fifth Floor, Boston, MA 02110-1301, USA. +// ------------------------------------------- +// ####GPLCOPYRIGHTEND#### +//=========================================================================== diff --git a/ecos/packages/hal/v85x/arch/current/cdl/hal_v85x.cdl b/ecos/packages/hal/v85x/arch/current/cdl/hal_v85x.cdl new file mode 100644 index 0000000..1fe6c24 --- /dev/null +++ b/ecos/packages/hal/v85x/arch/current/cdl/hal_v85x.cdl @@ -0,0 +1,106 @@ +# ==================================================================== +# +# hal_v85x.cdl +# +# NEC architectural HAL package configuration data +# +# ==================================================================== +## ####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later +## version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT +## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License +## along with eCos; if not, write to the Free Software Foundation, Inc., +## 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +## +## As a special exception, if other files instantiate templates or use +## macros or inline functions from this file, or you compile this file +## and link it with other works to produce a work based on this file, +## this file does not by itself cause the resulting work to be covered by +## the GNU General Public License. However the source code for this file +## must still be made available in accordance with section (3) of the GNU +## General Public License v2. +## +## This exception does not invalidate any other reasons why a work based +## on this file might be covered by the GNU General Public License. +## ------------------------------------------- +## ####ECOSGPLCOPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Contributors: jlarmour +# Date: 2001-03-21 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_V85X { + display "NEC V85x architecture" + parent CYGPKG_HAL + hardware + include_dir cyg/hal + define_header hal_v85x.h + description " + The NEC V85x architecture HAL package provides generic support + for this processor architecture. It is also necessary to + select a CPU variant and a specific target platform HAL + package." + + cdl_interface CYGINT_HAL_V85X_VARIANT { + display "Number of variant implementations in this configuration" + no_define + requires 1 == CYGINT_HAL_V85X_VARIANT + } + + compile hal_misc.c + + make -priority 1 { + <PREFIX>/include/cyg/hal/nec_offsets.inc : <PACKAGE>/src/hal_mk_defs.c + $(CC) $(CFLAGS) $(INCLUDE_PATH) -Wp,-MD,nec_offsets.tmp -o hal_mk_defs.tmp -S $< + fgrep .equ hal_mk_defs.tmp | sed s/#// > $@ + @echo $@ ": \\" > $(notdir $@).deps + @tail -n +2 nec_offsets.tmp >> $(notdir $@).deps + @echo >> $(notdir $@).deps + @rm nec_offsets.tmp hal_mk_defs.tmp + } + + make { + <PREFIX>/lib/vectors.o : <PACKAGE>/src/vectors.S + $(CC) -Wp,-MD,vectors.tmp $(INCLUDE_PATH) $(CFLAGS) -c -o $@ $< + @echo $@ ": \\" > $(notdir $@).deps + @tail -n +2 vectors.tmp >> $(notdir $@).deps + @echo >> $(notdir $@).deps + @rm vectors.tmp + } + + cdl_option CYGSEM_HAL_V85X_INLINE_INTERRUPT_FUNCTIONS { + display "In-line interrupt functions" + flavor bool + default_value 1 + description " + This option allows for the HAL interrupt functions, + e.g. HAL_ENABLE_INTERRUPTS() to be coded as either in-line + assembly code or real functions. The primary motivations + for the latter would be debugging, tracing, etc." + } + + cdl_interface CYGINT_HAL_V85X_ICE_DEBUG { + display "Debugging via ICE support" + description " + This interface is enabled when the underlying variant or platform + supports ICE debugging." + } +} diff --git a/ecos/packages/hal/v85x/arch/current/include/basetype.h b/ecos/packages/hal/v85x/arch/current/include/basetype.h new file mode 100644 index 0000000..842655d --- /dev/null +++ b/ecos/packages/hal/v85x/arch/current/include/basetype.h @@ -0,0 +1,72 @@ +#ifndef CYGONCE_HAL_BASETYPE_H +#define CYGONCE_HAL_BASETYPE_H + +//============================================================================= +// +// basetype.h +// +// Standard types for this architecture. +// +//============================================================================= +// ####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later +// version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License +// along with eCos; if not, write to the Free Software Foundation, Inc., +// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +// +// As a special exception, if other files instantiate templates or use +// macros or inline functions from this file, or you compile this file +// and link it with other works to produce a work based on this file, +// this file does not by itself cause the resulting work to be covered by +// the GNU General Public License. However the source code for this file +// must still be made available in accordance with section (3) of the GNU +// General Public License v2. +// +// This exception does not invalidate any other reasons why a work based +// on this file might be covered by the GNU General Public License. +// ------------------------------------------- +// ####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, gthomas, jlarmour +// Date: 2001-03-21 +// Purpose: Define architecture base types. +// Usage: Included by <cyg/infra/cyg_types.h>, do not use directly +// +//####DESCRIPTIONEND#### +// + +//----------------------------------------------------------------------------- +// Characterize the architecture + +#define CYG_BYTEORDER CYG_LSBFIRST // Little endian + +//----------------------------------------------------------------------------- +// NEC usually uses labels with undersores. + +#define CYG_LABEL_DEFN(_name_) _##_name_ + +//----------------------------------------------------------------------------- +// Define the standard variable sizes + +// The NEC architecture uses the default definitions of the base types, +// so we do not need to define any here. + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_BASETYPE_H +// End of basetype.h diff --git a/ecos/packages/hal/v85x/arch/current/include/hal_arch.h b/ecos/packages/hal/v85x/arch/current/include/hal_arch.h new file mode 100644 index 0000000..aeab090 --- /dev/null +++ b/ecos/packages/hal/v85x/arch/current/include/hal_arch.h @@ -0,0 +1,283 @@ +#ifndef CYGONCE_HAL_HAL_ARCH_H +#define CYGONCE_HAL_HAL_ARCH_H + +//========================================================================== +// +// hal_arch.h +// +// Architecture specific abstractions +// +//========================================================================== +// ####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later +// version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License +// along with eCos; if not, write to the Free Software Foundation, Inc., +// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +// +// As a special exception, if other files instantiate templates or use +// macros or inline functions from this file, or you compile this file +// and link it with other works to produce a work based on this file, +// this file does not by itself cause the resulting work to be covered by +// the GNU General Public License. However the source code for this file +// must still be made available in accordance with section (3) of the GNU +// General Public License v2. +// +// This exception does not invalidate any other reasons why a work based +// on this file might be covered by the GNU General Public License. +// ------------------------------------------- +// ####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg,gthomas +// Contributors: nickg,jlarmour +// Date: 2001-03-21 +// Purpose: Define architecture abstractions +// Usage: #include <cyg/hal/hal_arch.h> +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> +#include <cyg/infra/cyg_type.h> + +#include <cyg/hal/var_arch.h> + +//-------------------------------------------------------------------------- +// Processor saved states: + +#define CYG_HAL_NEC_REG CYG_WORD32 +#define CYG_HAL_NEC_REG_SIZE 4 + +typedef struct +{ + // These are common to all saved states + CYG_HAL_NEC_REG d[32]; /* Data regs */ + CYG_ADDRWORD pc; /* Program Counter */ + CYG_ADDRWORD psw; /* Status Reg */ + + // These are only saved for exceptions and interrupts + CYG_ADDRWORD cause; /* Exception cause register */ + CYG_ADDRWORD vector; /* Exception/interrupt number */ +} HAL_SavedRegisters; + +// +// Processor state register +// +#define CYGARC_PSW_ID 0x20 // Interrupt disable +#define CYGARC_PSW_EP 0x40 // Exception in progress +#define CYGARC_PSW_NP 0x80 // NMI in progress + +//-------------------------------------------------------------------------- +// Exception handling function. +// This function is defined by the kernel according to this prototype. It is +// invoked from the HAL to deal with any CPU exceptions that the HAL does +// not want to deal with itself. It usually invokes the kernel's exception +// delivery mechanism. + +externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data ); + +//-------------------------------------------------------------------------- +// Bit manipulation macros + +externC cyg_uint32 hal_lsbit_index(cyg_uint32 mask); +externC cyg_uint32 hal_msbit_index(cyg_uint32 mask); + +#define HAL_LSBIT_INDEX(index, mask) index = hal_lsbit_index(mask); + +#define HAL_MSBIT_INDEX(index, mask) index = hal_msbit_index(mask); + +//-------------------------------------------------------------------------- +// Context Initialization + +#define CYG_HAL_NEC_INIT_PSW 0x00000000 + +// Initialize the context of a thread. +// Arguments: +// _sparg_ name of variable containing current sp, will be written with new sp +// _thread_ thread object address, passed as argument to entry point +// _entry_ entry point address. +// _id_ bit pattern used in initializing registers, for debugging. +#define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ ) \ +{ \ + register CYG_WORD _sp_ = ((CYG_WORD)_sparg_)-56; \ + register HAL_SavedRegisters *_regs_; \ + int _i_; \ + _sp_ = _sp_ & 0xFFFFFFF0; \ + _regs_ = (HAL_SavedRegisters *)(((_sp_) - sizeof(HAL_SavedRegisters))&0xFFFFFFF0); \ + for( _i_ = 0; _i_ < 32; _i_++ ) (_regs_)->d[_i_] = (_id_)|_i_; \ + (_regs_)->d[03] = (CYG_HAL_NEC_REG)(_sp_); /* SP = top of stack */ \ + (_regs_)->d[04] = (CYG_HAL_NEC_REG)(_sp_); /* GP = top of stack */ \ + (_regs_)->d[29] = (CYG_HAL_NEC_REG)(_sp_); /* FP = top of stack */ \ + (_regs_)->d[06] = (CYG_HAL_NEC_REG)(_thread_); /* R6 = arg1 = thread ptr */ \ + (_regs_)->d[31] = (CYG_HAL_NEC_REG)(_entry_); /* RA(d[31]) = entry point*/ \ + (_regs_)->pc = (CYG_WORD)(_entry_); /* PC = entry point */ \ + (_regs_)->psw = CYG_HAL_NEC_INIT_PSW; \ + _sparg_ = (CYG_ADDRESS)_regs_; \ +} + +//-------------------------------------------------------------------------- +// Context switch macros. +// The arguments are pointers to locations where the stack pointer +// of the current thread is to be stored, and from where the sp of the +// next thread is to be fetched. + +externC void hal_thread_switch_context( CYG_ADDRESS to, CYG_ADDRESS from ); +externC void hal_thread_load_context( CYG_ADDRESS to ) + __attribute__ ((noreturn)); + +#define HAL_THREAD_SWITCH_CONTEXT(_fspptr_,_tspptr_) \ + hal_thread_switch_context( (CYG_ADDRESS)_tspptr_, \ + (CYG_ADDRESS)_fspptr_); + +#define HAL_THREAD_LOAD_CONTEXT(_tspptr_) \ + hal_thread_load_context( (CYG_ADDRESS)_tspptr_ ); + +//-------------------------------------------------------------------------- +// Execution reorder barrier. +// When optimizing the compiler can reorder code. In multithreaded systems +// where the order of actions is vital, this can sometimes cause problems. +// This macro may be inserted into places where reordering should not happen. +// The "memory" keyword is potentially unnecessary, but it is harmless to +// keep it. + +#define HAL_REORDER_BARRIER() asm volatile ( "" : : : "memory" ) + +//-------------------------------------------------------------------------- +// Breakpoint support +// HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to +// happen if executed. +// HAL_BREAKINST is the value of the breakpoint instruction and +// HAL_BREAKINST_SIZE is its size in bytes. + +#define HAL_BREAKPOINT(_label_) \ +asm volatile (" .globl _" #_label_ ";" \ + "_"#_label_":" \ + " br _"#_label_ \ + ); + +#define HAL_BREAKINST 0x0585 +#define HAL_BREAKINST_SIZE 2 + +//-------------------------------------------------------------------------- +// Thread register state manipulation for GDB support. + +// Default to a 32 bit register size for GDB register dumps. +#ifndef CYG_HAL_GDB_REG +#define CYG_HAL_GDB_REG CYG_WORD32 +#endif + +// Translate a stack pointer as saved by the thread context macros above into +// a pointer to a HAL_SavedRegisters structure. +#define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ ) \ + (_regs_) = (HAL_SavedRegisters *)(_sp_) + + +//-------------------------------------------------------------------------- +// HAL setjmp + +typedef struct { + cyg_uint32 sp; + cyg_uint32 gp; + cyg_uint32 tp; + cyg_uint32 r1,r2,r4,r5; + cyg_uint32 r20, r21, r22, r23; + cyg_uint32 r24, r25, r26, r27, r28; + cyg_uint32 fp; + cyg_uint32 ep; + cyg_uint32 lp; +} hal_jmp_buf_t; + +#define CYGARC_JMP_BUF_SIZE (sizeof(hal_jmp_buf_t) / sizeof(cyg_uint32)) + +typedef cyg_uint32 hal_jmp_buf[ CYGARC_JMP_BUF_SIZE ]; + +externC int hal_setjmp(hal_jmp_buf env); +externC void hal_longjmp(hal_jmp_buf env, int val); + +//------------------------------------------------------------------------- +// Idle thread code. +// This macro is called in the idle thread loop, and gives the HAL the +// chance to insert code. Typical idle thread behaviour might be to halt the +// processor. + +externC void hal_idle_thread_action(cyg_uint32 loop_count); + +#define HAL_IDLE_THREAD_ACTION(_count_) hal_idle_thread_action(_count_) + +//-------------------------------------------------------------------------- +// Hardware specific test exit code. This is defined here simply to make +// setting a breakpoint on this function viable. +// +#define CYGHWR_TEST_PROGRAM_EXIT() \ +{ \ + static volatile int ctr; \ + while (1) ctr++; \ +} + +//-------------------------------------------------------------------------- +// Minimal and sensible stack sizes: the intention is that applications +// will use these to provide a stack size in the first instance prior to +// proper analysis. Idle thread stack should be this big. + +// THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES. +// THEY ARE HOWEVER ENOUGH TO START PROGRAMMING. +// YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES! + +// This is not a config option because it should not be adjusted except +// under "enough rope" sort of disclaimers. + +// Typical case stack frame size: return link + 4 pushed registers + some locals. +#define CYGNUM_HAL_STACK_FRAME_SIZE (48) + +// Stack needed for a context switch: +#define CYGNUM_HAL_STACK_CONTEXT_SIZE (((32+12)*CYG_HAL_NEC_REG_SIZE)+(32*4)) + + +// Interrupt + call to ISR, interrupt_end() and the DSR +#define CYGNUM_HAL_STACK_INTERRUPT_SIZE (4+2*CYGNUM_HAL_STACK_CONTEXT_SIZE) + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + +// An interrupt stack which is large enough for all possible interrupt +// conditions (and only used for that purpose) exists. "User" stacks +// can be much smaller + +#define CYGNUM_HAL_STACK_SIZE_MINIMUM (CYGNUM_HAL_STACK_CONTEXT_SIZE+ \ + CYGNUM_HAL_STACK_INTERRUPT_SIZE*2+ \ + CYGNUM_HAL_STACK_FRAME_SIZE*8) +#define CYGNUM_HAL_STACK_SIZE_TYPICAL (CYGNUM_HAL_STACK_SIZE_MINIMUM+1024) + +#else // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + +// No separate interrupt stack exists. Make sure all threads contain +// a stack sufficiently large. + +#define CYGNUM_HAL_STACK_SIZE_MINIMUM (4096) +#define CYGNUM_HAL_STACK_SIZE_TYPICAL (4096) + +#endif + +//-------------------------------------------------------------------------- +// Macros for switching context between two eCos instances (jump from +// code in ROM to code in RAM or vice versa). +#define CYGARC_HAL_SAVE_GP() +#define CYGARC_HAL_RESTORE_GP() + +//-------------------------------------------------------------------------- +#endif // CYGONCE_HAL_HAL_ARCH_H +// End of hal_arch.h diff --git a/ecos/packages/hal/v85x/arch/current/include/hal_cache.h b/ecos/packages/hal/v85x/arch/current/include/hal_cache.h new file mode 100644 index 0000000..8f4ba6d --- /dev/null +++ b/ecos/packages/hal/v85x/arch/current/include/hal_cache.h @@ -0,0 +1,67 @@ +#ifndef CYGONCE_HAL_CACHE_H +#define CYGONCE_HAL_CACHE_H + +//============================================================================= +// +// hal_cache.h +// +// HAL cache control API +// +//============================================================================= +// ####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later +// version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License +// along with eCos; if not, write to the Free Software Foundation, Inc., +// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +// +// As a special exception, if other files instantiate templates or use +// macros or inline functions from this file, or you compile this file +// and link it with other works to produce a work based on this file, +// this file does not by itself cause the resulting work to be covered by +// the GNU General Public License. However the source code for this file +// must still be made available in accordance with section (3) of the GNU +// General Public License v2. +// +// This exception does not invalidate any other reasons why a work based +// on this file might be covered by the GNU General Public License. +// ------------------------------------------- +// ####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg +// Date: 1998-02-17 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. +// Usage: +// #include <cyg/hal/hal_cache.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> +#include <cyg/infra/cyg_type.h> + +#include <cyg/hal/var_cache.h> + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_CACHE_H +// End of hal_cache.h diff --git a/ecos/packages/hal/v85x/arch/current/include/hal_intr.h b/ecos/packages/hal/v85x/arch/current/include/hal_intr.h new file mode 100644 index 0000000..37e4e81 --- /dev/null +++ b/ecos/packages/hal/v85x/arch/current/include/hal_intr.h @@ -0,0 +1,283 @@ +#ifndef CYGONCE_HAL_HAL_INTR_H +#define CYGONCE_HAL_HAL_INTR_H + +//========================================================================== +// +// hal_intr.h +// +// HAL Interrupt and clock support +// +//========================================================================== +// ####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later +// version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License +// along with eCos; if not, write to the Free Software Foundation, Inc., +// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +// +// As a special exception, if other files instantiate templates or use +// macros or inline functions from this file, or you compile this file +// and link it with other works to produce a work based on this file, +// this file does not by itself cause the resulting work to be covered by +// the GNU General Public License. However the source code for this file +// must still be made available in accordance with section (3) of the GNU +// General Public License v2. +// +// This exception does not invalidate any other reasons why a work based +// on this file might be covered by the GNU General Public License. +// ------------------------------------------- +// ####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, jskov, +// gthomas, jlarmour +// Date: 1999-02-16 +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock. +// +// Usage: +// #include <cyg/hal/hal_intr.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> +#include <pkgconf/hal_v85x.h> + +#include <cyg/infra/cyg_type.h> +#include <cyg/hal/hal_io.h> + +#include <cyg/hal/var_intr.h> + +//-------------------------------------------------------------------------- +// Static data used by HAL + +// ISR tables +externC CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT]; +externC CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_ISR_COUNT]; +externC CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT]; + +// VSR table +externC CYG_ADDRESS hal_vsr_table[CYGNUM_HAL_VSR_COUNT]; + +//-------------------------------------------------------------------------- +// Default ISR +// The #define is used to test whether this routine exists, and to allow +// us to call it. + +externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data); + +#define HAL_DEFAULT_ISR hal_default_isr + +//-------------------------------------------------------------------------- +// Interrupt state storage + +typedef cyg_uint32 CYG_INTERRUPT_STATE; + +//-------------------------------------------------------------------------- +// Interrupt control macros + +externC cyg_uint32 hal_disable_interrupts(void); +externC void hal_enable_interrupts(void); +externC void hal_restore_interrupts(cyg_uint32); +externC cyg_uint32 hal_query_interrupts(void); + +#ifdef CYGSEM_HAL_NEC_INLINE_INTERRUPT_FUNCTIONS +#define HAL_DISABLE_INTERRUPTS(_old_) \ + CYG_MACRO_START \ + asm volatile ( \ + "stsr PSW,%0;" \ + "di" \ + : "=r"(_old_)); \ + CYG_MACRO_END + +#define HAL_ENABLE_INTERRUPTS() \ + CYG_MACRO_START \ + asm volatile ( \ + "ei" \ + : ); \ + CYG_MACRO_END + +#define HAL_RESTORE_INTERRUPTS(_old_) \ + CYG_MACRO_START \ + asm volatile ( \ + "ldsr %0,PSW" \ + : \ + : "r" (_old_)); \ + CYG_MACRO_END +#else +#define HAL_DISABLE_INTERRUPTS(_old_) _old_ = hal_disable_interrupts() +#define HAL_ENABLE_INTERRUPTS() hal_enable_interrupts() +#define HAL_RESTORE_INTERRUPTS(_old_) hal_restore_interrupts(_old_) +#endif + +#define HAL_QUERY_INTERRUPTS( _state_ ) _state_ = hal_query_interrupts() + +//-------------------------------------------------------------------------- +// Routine to execute DSRs using separate interrupt stack + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK +externC void hal_interrupt_stack_call_pending_DSRs(void); +#define HAL_INTERRUPT_STACK_CALL_PENDING_DSRS() \ + hal_interrupt_stack_call_pending_DSRs() + +// these are offered solely for stack usage testing +// if they are not defined, then there is no interrupt stack. +#define HAL_INTERRUPT_STACK_BASE cyg_interrupt_stack_base +#define HAL_INTERRUPT_STACK_TOP cyg_interrupt_stack +// use them to declare these extern however you want: +// extern char HAL_INTERRUPT_STACK_BASE[]; +// extern char HAL_INTERRUPT_STACK_TOP[]; +// is recommended +#endif + +//-------------------------------------------------------------------------- +// Vector translation. +// For chained interrupts we only have a single vector though which all +// are passed. For unchained interrupts we have a vector per interrupt. +// Note: this hardware does not have/support chained interrupts. + +//-------------------------------------------------------------------------- +// Vector translation. +// For chained interrupts we only have a single vector though which all +// are passed. For unchained interrupts we have a vector per interrupt. + +#ifndef HAL_TRANSLATE_VECTOR +#if defined(CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN) +#define HAL_TRANSLATE_VECTOR(_vector_,_index_) (_index_) = 0 +#else +#define HAL_TRANSLATE_VECTOR(_vector_,_index_) (_index_) = (_vector_-CYGNUM_HAL_ISR_MIN) +#endif +#endif + +#ifndef HAL_TRANSLATE_VECTOR +#define HAL_TRANSLATE_VECTOR(_vector_,_index_) (_index_) = (_vector_-CYGNUM_HAL_ISR_MIN) +#endif + +//-------------------------------------------------------------------------- +// Interrupt and VSR attachment macros + +#define HAL_INTERRUPT_IN_USE( _vector_, _state_) \ + CYG_MACRO_START \ + cyg_uint32 _index_; \ + HAL_TRANSLATE_VECTOR ((_vector_), _index_); \ + \ + if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)HAL_DEFAULT_ISR ) \ + (_state_) = 0; \ + else \ + (_state_) = 1; \ + CYG_MACRO_END + +#define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \ +{ \ + cyg_uint32 _index_; \ + HAL_TRANSLATE_VECTOR( _vector_, _index_ ); \ + \ + if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)HAL_DEFAULT_ISR ) \ + { \ + hal_interrupt_handlers[_index_] = (CYG_ADDRESS)_isr_; \ + hal_interrupt_data[_index_] = (CYG_ADDRWORD)_data_; \ + hal_interrupt_objects[_index_] = (CYG_ADDRESS)_object_; \ + } \ +} + +#define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) \ +{ \ + cyg_uint32 _index_; \ + HAL_TRANSLATE_VECTOR( _vector_, _index_ ); \ + \ + if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)_isr_ ) \ + { \ + hal_interrupt_handlers[_index_] = (CYG_ADDRESS)HAL_DEFAULT_ISR; \ + hal_interrupt_data[_index_] = 0; \ + hal_interrupt_objects[_index_] = 0; \ + } \ +} + +#define HAL_VSR_GET( _vector_, _pvsr_ ) \ + *(_pvsr_) = (void (*)())hal_vsr_table[_vector_]; + + +#define HAL_VSR_SET( _vector_, _vsr_, _poldvsr_ ) CYG_MACRO_START \ + if( _poldvsr_ != NULL) \ + *(CYG_ADDRESS *)_poldvsr_ = (CYG_ADDRESS)hal_vsr_table[_vector_]; \ + hal_vsr_table[_vector_] = (CYG_ADDRESS)_vsr_; \ +CYG_MACRO_END + +// This is an ugly name, but what it means is: grab the VSR back to eCos +// internal handling, or if you like, the default handler. But if +// cooperating with GDB and CygMon, the default behaviour is to pass most +// exceptions to CygMon. This macro undoes that so that eCos handles the +// exception. So use it with care. + +externC void __default_exception_vsr(void); +externC void __default_interrupt_vsr(void); + +#define HAL_VSR_SET_TO_ECOS_HANDLER( _vector_, _poldvsr_ ) CYG_MACRO_START \ + HAL_VSR_SET( _vector_, _vector_ == CYGNUM_HAL_VECTOR_INTERRUPT \ + ? (CYG_ADDRESS)__default_interrupt_vsr \ + : (CYG_ADDRESS)__default_exception_vsr, \ + _poldvsr_ ); \ +CYG_MACRO_END + +//-------------------------------------------------------------------------- +// Interrupt controller access + +externC void hal_interrupt_mask(int); +externC void hal_interrupt_unmask(int); +externC void hal_interrupt_acknowledge(int); + +#define HAL_INTERRUPT_MASK( _vector_ ) hal_interrupt_mask(_vector_) +#define HAL_INTERRUPT_UNMASK( _vector_ ) hal_interrupt_unmask(_vector_) +#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) hal_interrupt_acknowledge(_vector_) + +#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) +#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) + +//-------------------------------------------------------------------------- +// Clock control. + +externC CYG_WORD32 cyg_hal_clock_period; +externC void hal_clock_initialize(cyg_int32); +externC void hal_clock_reset(int, cyg_uint32); +externC cyg_uint32 hal_clock_read(void); + +#define HAL_CLOCK_INITIALIZE( _period_ ) hal_clock_initialize(_period_) +#define HAL_CLOCK_RESET( _vector_, _period_ ) hal_clock_reset(_vector_,_period_) +#define HAL_CLOCK_READ( _pvalue_ ) *(_pvalue_) = hal_clock_read() + +#if defined(CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY) && \ + !defined(HAL_CLOCK_LATENCY) +#define HAL_CLOCK_LATENCY( _pvalue_ ) HAL_CLOCK_READ(_pvalue_) +#endif + +//-------------------------------------------------------------------------- +// Reset. + +#ifndef HAL_PLATFORM_RESET +extern void hal_reset_board(void); +#define HAL_PLATFORM_RESET() hal_reset_board() +#define HAL_PLATFORM_RESET_ENTRY 0x00000000 +#endif + +//-------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_HAL_INTR_H +// End of hal_intr.h diff --git a/ecos/packages/hal/v85x/arch/current/include/hal_io.h b/ecos/packages/hal/v85x/arch/current/include/hal_io.h new file mode 100644 index 0000000..4bfd6ea --- /dev/null +++ b/ecos/packages/hal/v85x/arch/current/include/hal_io.h @@ -0,0 +1,146 @@ +#ifndef CYGONCE_HAL_HAL_IO_H +#define CYGONCE_HAL_HAL_IO_H + +//============================================================================= +// +// hal_io.h +// +// HAL device IO register support. +// +//============================================================================= +// ####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later +// version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License +// along with eCos; if not, write to the Free Software Foundation, Inc., +// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +// +// As a special exception, if other files instantiate templates or use +// macros or inline functions from this file, or you compile this file +// and link it with other works to produce a work based on this file, +// this file does not by itself cause the resulting work to be covered by +// the GNU General Public License. However the source code for this file +// must still be made available in accordance with section (3) of the GNU +// General Public License v2. +// +// This exception does not invalidate any other reasons why a work based +// on this file might be covered by the GNU General Public License. +// ------------------------------------------- +// ####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg +// Date: 1998-02-17 +// Purpose: Define IO register support +// Description: The macros defined here provide the HAL APIs for handling +// device IO control registers. +// +// Usage: +// #include <cyg/hal/hal_io.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <cyg/infra/cyg_type.h> + +#include <cyg/hal/plf_io.h> + +//----------------------------------------------------------------------------- +// IO Register address. +// This type is for recording the address of an IO register. + +typedef volatile CYG_ADDRWORD HAL_IO_REGISTER; + +//----------------------------------------------------------------------------- +// BYTE Register access. +// Individual and vectorized access to 8 bit registers. + +#define HAL_READ_UINT8( _register_, _value_ ) \ + ((_value_) = *((volatile CYG_BYTE *)(_register_))) + +#define HAL_WRITE_UINT8( _register_, _value_ ) \ + (*((volatile CYG_BYTE *)(_register_)) = (_value_)) + +#define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \ +{ \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + (_buf_)[_i_] = ((volatile CYG_BYTE *)(_register_))[_j_]; \ +} + +#define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \ +{ \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + ((volatile CYG_BYTE *)(_register_))[_j_] = (_buf_)[_i_]; \ +} + + +//----------------------------------------------------------------------------- +// 16 bit access. +// Individual and vectorized access to 16 bit registers. + +#define HAL_READ_UINT16( _register_, _value_ ) \ + ((_value_) = *((volatile CYG_WORD16 *)(_register_))) + +#define HAL_WRITE_UINT16( _register_, _value_ ) \ + (*((volatile CYG_WORD16 *)(_register_)) = (_value_)) + +#define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \ +{ \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + (_buf_)[_i_] = ((volatile CYG_WORD16 *)(_register_))[_j_]; \ +} + +#define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \ +{ \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + ((volatile CYG_WORD16 *)(_register_))[_j_] = (_buf_)[_i_]; \ +} + +//----------------------------------------------------------------------------- +// 32 bit access. +// Individual and vectorized access to 32 bit registers. + +#define HAL_READ_UINT32( _register_, _value_ ) \ + ((_value_) = *((volatile CYG_WORD32 *)(_register_))) + +#define HAL_WRITE_UINT32( _register_, _value_ ) \ + (*((volatile CYG_WORD32 *)(_register_)) = (_value_)) + +#define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \ +{ \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + (_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_j_]; \ +} + +#define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \ +{ \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + ((volatile CYG_WORD32 *)(_register_))[_j_] = (_buf_)[_i_]; \ +} + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_HAL_IO_H +// End of hal_io.h diff --git a/ecos/packages/hal/v85x/arch/current/include/nec-stub.h b/ecos/packages/hal/v85x/arch/current/include/nec-stub.h new file mode 100644 index 0000000..28a51f5 --- /dev/null +++ b/ecos/packages/hal/v85x/arch/current/include/nec-stub.h @@ -0,0 +1,117 @@ +#ifndef CYGONCE_HAL_NEC_STUB_H +#define CYGONCE_HAL_NEC_STUB_H +//======================================================================== +// +// nec-stub.h +// +// NEC-specific definitions for generic stub +// +//======================================================================== +// ####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later +// version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License +// along with eCos; if not, write to the Free Software Foundation, Inc., +// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +// +// As a special exception, if other files instantiate templates or use +// macros or inline functions from this file, or you compile this file +// and link it with other works to produce a work based on this file, +// this file does not by itself cause the resulting work to be covered by +// the GNU General Public License. However the source code for this file +// must still be made available in accordance with section (3) of the GNU +// General Public License v2. +// +// This exception does not invalidate any other reasons why a work based +// on this file might be covered by the GNU General Public License. +// ------------------------------------------- +// ####ECOSGPLCOPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Red Hat, nickg +// Contributors: Red Hat, nickg +// Date: 1998-06-08 +// Purpose: +// Description: NEC-specific definitions for generic stub +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NUMREGS 66 +#define REGSIZE(X) 4 +typedef unsigned long target_register_t; + +enum regnames { + R0, R1, SP, R3, R4, R5, R6, R7, + R8, R9 , R10, R11, R12, R13, R14, R15, + R16, R17, R18, R19, R20, R21, R22, R23, + R24, R25, R26, R27, R28, R29, R30, R31, + EIPC, EIPSW, FEPC, FEPSW, ECR, PSW, SR6, SR7, + SR8, SR9 , SR10, SR11, SR12, SR13, SR14, SR15, + SR16, SR17, SR18, SR19, SR20, SR21, SR22, SR23, + SR24, SR25, SR26, SR27, SR28, SR29, SR30, SR31, + PC, FP +}; + +typedef enum regnames regnames_t; + +/* Given a trap value TRAP, return the corresponding signal. */ +extern int __computeSignal (unsigned int trap_number); + +/* Return the SPARC trap number corresponding to the last-taken trap. */ +extern int __get_trap_number (void); + +/* Return the currently-saved value corresponding to register REG. */ +extern target_register_t get_register (regnames_t reg); + +/* Store VALUE in the register corresponding to WHICH. */ +extern void put_register (regnames_t which, target_register_t value); + +/* Set the currently-saved pc register value to PC. This also updates NPC + as needed. */ +extern void set_pc (target_register_t pc); + +/* Set things up so that the next user resume will execute one instruction. + This may be done by setting breakpoints or setting a single step flag + in the saved user registers, for example. */ +void __single_step (void); + +/* Clear the single-step state. */ +void __clear_single_step (void); + +/* If the breakpoint we hit is in the breakpoint() instruction, return a + non-zero value. */ +extern int __is_breakpoint_function (void); + +/* Skip the current instruction. */ +extern void __skipinst (void); + +extern void __install_breakpoints (void); + +extern void __clear_breakpoints (void); + +#ifdef __cplusplus +} /* extern "C" */ +#endif + +#endif // ifndef CYGONCE_HAL_NEC_STUB_H diff --git a/ecos/packages/hal/v85x/arch/current/src/hal_misc.c b/ecos/packages/hal/v85x/arch/current/src/hal_misc.c new file mode 100644 index 0000000..e0fef78 --- /dev/null +++ b/ecos/packages/hal/v85x/arch/current/src/hal_misc.c @@ -0,0 +1,230 @@ +/*========================================================================== +// +// hal_misc.c +// +// HAL miscellaneous functions +// +//========================================================================== +// ####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later +// version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License +// along with eCos; if not, write to the Free Software Foundation, Inc., +// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +// +// As a special exception, if other files instantiate templates or use +// macros or inline functions from this file, or you compile this file +// and link it with other works to produce a work based on this file, +// this file does not by itself cause the resulting work to be covered by +// the GNU General Public License. However the source code for this file +// must still be made available in accordance with section (3) of the GNU +// General Public License v2. +// +// This exception does not invalidate any other reasons why a work based +// on this file might be covered by the GNU General Public License. +// ------------------------------------------- +// ####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors: nickg, gthomas, jlarmour +// Date: 2001-03-21 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. +// +//####DESCRIPTIONEND#### +// +//=========================================================================*/ + +#include <pkgconf/hal.h> +#include <pkgconf/hal_v85x.h> +#ifdef CYGPKG_KERNEL +#include <pkgconf/kernel.h> +#endif + +#include <cyg/infra/cyg_type.h> +#include <cyg/infra/cyg_trac.h> // tracing macros +#include <cyg/infra/cyg_ass.h> // assertion macros +#include <cyg/infra/diag.h> + +#include <cyg/hal/hal_arch.h> // HAL header +#include <cyg/hal/hal_intr.h> // HAL header + +/*------------------------------------------------------------------------*/ +/* First level C exception handler. */ + +externC void __handle_exception (void); + +externC HAL_SavedRegisters *_hal_registers; + +void +exception_handler(HAL_SavedRegisters *regs) +{ +#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) +// diag_printf("Exception! Frame: %x\n", regs); +// show_regs(regs); + static int gdb_active; + if (gdb_active == 0) { + gdb_active = 1; + _hal_registers = regs; + __handle_exception(); + gdb_active = 0; + } + +#elif defined(CYGPKG_KERNEL_EXCEPTIONS) + + // We should decode the vector and pass a more appropriate + // value as the second argument. For now we simply pass a + // pointer to the saved registers. We should also divert + // breakpoint and other debug vectors into the debug stubs. + + cyg_hal_deliver_exception( regs->vector, (CYG_ADDRWORD)regs ); + +#else + + CYG_FAIL("Exception!!!"); + +#endif + + return; +} + +/*------------------------------------------------------------------------*/ +/* C++ support - run initial constructors */ + +#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG +cyg_bool cyg_hal_stop_constructors; +#endif + +typedef void (*pfunc) (void); +extern pfunc __CTOR_LIST__[]; +extern pfunc __CTOR_END__[]; + +void +cyg_hal_invoke_constructors (void) +{ + +#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG + static pfunc *p = &__CTOR_END__[-1]; + + cyg_hal_stop_constructors = 0; + for (; p >= __CTOR_LIST__; p--) { + (*p) (); + if (cyg_hal_stop_constructors) { + p--; + break; + } + } +#else + pfunc *p; + + for (p = &__CTOR_END__[-1]; p >= __CTOR_LIST__; p--) { + (*p) (); + } +#endif +} + +/*------------------------------------------------------------------------*/ +/* default ISR */ + +#ifdef CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT +externC cyg_uint32 +hal_arch_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data) +{ + CYG_TRACE1(true, "Interrupt: %d", vector); + + diag_printf("Spurious Interrupt!!! - vector: %d, data: %x\n", vector, + data); + CYG_FAIL("Spurious Interrupt!!!"); + return 0; +} +#else +externC cyg_uint32 +hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data) +{ + CYG_TRACE1(true, "Interrupt: %d", vector); + +#ifndef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +#ifdef CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT +#ifdef CYGDBG_HAL_CTRLC_ISR + // then see if it is an incoming character interrupt and break + // into the stub ROM if the char is a ^C. + if ( CYGDBG_HAL_CTRLC_ISR( vector, data ) ) + return 1; // interrupt handled +#endif +#endif +#endif + + diag_printf("Spurious Interrupt!!! - vector: %d, data: %x\n", vector, + data); + CYG_FAIL("Spurious Interrupt!!!"); + return 0; +} +#endif + +/*------------------------------------------------------------------------*/ +/* Idle thread action */ + +void +hal_idle_thread_action( cyg_uint32 count ) +{ + // power saving instruction + asm("halt"); +} + +/*-------------------------------------------------------------------------*/ +/* Misc functions */ + +cyg_uint32 +hal_lsbit_index(cyg_uint32 mask) +{ + int i; + for (i = 0; i < 32; i++) { + if (mask & (1<<i)) return ((cyg_uint32)i); + } + return ((cyg_uint32)-1); +} + +cyg_uint32 +hal_msbit_index(cyg_uint32 mask) +{ + int i; + for (i = 31; i >= 0; i--) { + if (mask & (1<<i)) return ((cyg_uint32)i); + } + return ((cyg_uint32)-1); +} + +void +show_regs(HAL_SavedRegisters *regs) +{ + int i; + diag_printf("Regs\n"); + for (i = 0; i < 32; i++) { + if ((i % 8) == 0) { + diag_printf("R%2d: ", i); + } + diag_printf("0x%08x ", regs->d[i]); + if ((i % 8) == 7) { + diag_printf("\n"); + } + } + diag_printf("PC = %x, PSW = %x\n", regs->pc, regs->psw); +} + +/*------------------------------------------------------------------------*/ +// EOF hal_misc.c diff --git a/ecos/packages/hal/v85x/arch/current/src/hal_mk_defs.c b/ecos/packages/hal/v85x/arch/current/src/hal_mk_defs.c new file mode 100644 index 0000000..d23033e --- /dev/null +++ b/ecos/packages/hal/v85x/arch/current/src/hal_mk_defs.c @@ -0,0 +1,176 @@ +//========================================================================== +// +// hal_mk_defs.c +// +// HAL (architecture) "make defs" program +// +//========================================================================== +// ####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later +// version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License +// along with eCos; if not, write to the Free Software Foundation, Inc., +// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +// +// As a special exception, if other files instantiate templates or use +// macros or inline functions from this file, or you compile this file +// and link it with other works to produce a work based on this file, +// this file does not by itself cause the resulting work to be covered by +// the GNU General Public License. However the source code for this file +// must still be made available in accordance with section (3) of the GNU +// General Public License v2. +// +// This exception does not invalidate any other reasons why a work based +// on this file might be covered by the GNU General Public License. +// ------------------------------------------- +// ####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas, jskov, jlarmour +// Date: 2000-02-21 +// Purpose: V850 architecture dependent definition generator +// Description: This file contains code that can be compiled by the target +// compiler and used to generate machine specific definitions +// suitable for use in assembly code. +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> + +#include <cyg/hal/hal_arch.h> // HAL header +#include <cyg/hal/hal_intr.h> // HAL header +#ifdef CYGPKG_KERNEL +# include <pkgconf/kernel.h> +# include <cyg/kernel/instrmnt.h> +#endif +#include <cyg/hal/hal_if.h> + +/* + * This program is used to generate definitions needed by + * assembly language modules. + * + * This technique was first used in the OSF Mach kernel code: + * generate asm statements containing #defines, + * compile this file to assembler, and then extract the + * #defines from the assembly-language output. + */ + +#define DEFINE(sym, val) \ + asm volatile("\n\t.equ\t" #sym ",%0" : : "i" (val)) + +int +main(void) +{ + // setjmp/longjmp buffer + DEFINE(CYGARC_JMPBUF_SP, offsetof(hal_jmp_buf_t, sp)); + DEFINE(CYGARC_JMPBUF_GP, offsetof(hal_jmp_buf_t, gp)); + DEFINE(CYGARC_JMPBUF_TP, offsetof(hal_jmp_buf_t, tp)); + DEFINE(CYGARC_JMPBUF_R1, offsetof(hal_jmp_buf_t, r1)); + DEFINE(CYGARC_JMPBUF_R2, offsetof(hal_jmp_buf_t, r2)); + DEFINE(CYGARC_JMPBUF_R4, offsetof(hal_jmp_buf_t, r4)); + DEFINE(CYGARC_JMPBUF_R5, offsetof(hal_jmp_buf_t, r5)); + DEFINE(CYGARC_JMPBUF_R20, offsetof(hal_jmp_buf_t, r20)); + DEFINE(CYGARC_JMPBUF_R21, offsetof(hal_jmp_buf_t, r21)); + DEFINE(CYGARC_JMPBUF_R22, offsetof(hal_jmp_buf_t, r22)); + DEFINE(CYGARC_JMPBUF_R23, offsetof(hal_jmp_buf_t, r23)); + DEFINE(CYGARC_JMPBUF_R24, offsetof(hal_jmp_buf_t, r24)); + DEFINE(CYGARC_JMPBUF_R25, offsetof(hal_jmp_buf_t, r25)); + DEFINE(CYGARC_JMPBUF_R26, offsetof(hal_jmp_buf_t, r26)); + DEFINE(CYGARC_JMPBUF_R27, offsetof(hal_jmp_buf_t, r27)); + DEFINE(CYGARC_JMPBUF_R28, offsetof(hal_jmp_buf_t, r28)); + DEFINE(CYGARC_JMPBUF_FP, offsetof(hal_jmp_buf_t, fp)); + DEFINE(CYGARC_JMPBUF_EP, offsetof(hal_jmp_buf_t, ep)); + DEFINE(CYGARC_JMPBUF_LP, offsetof(hal_jmp_buf_t, lp)); + + DEFINE(CYGARC_JMPBUF_SIZE, sizeof(hal_jmp_buf_t)); + + // Exception/interrupt/context save buffer + DEFINE(CYGARC_REG_R1, offsetof(HAL_SavedRegisters, d[1])); + DEFINE(CYGARC_REG_R2, offsetof(HAL_SavedRegisters, d[2])); + DEFINE(CYGARC_REG_R3, offsetof(HAL_SavedRegisters, d[3])); + DEFINE(CYGARC_REG_SP, offsetof(HAL_SavedRegisters, d[3])); + DEFINE(CYGARC_REG_R4, offsetof(HAL_SavedRegisters, d[4])); + DEFINE(CYGARC_REG_R5, offsetof(HAL_SavedRegisters, d[5])); + DEFINE(CYGARC_REG_R6, offsetof(HAL_SavedRegisters, d[6])); + DEFINE(CYGARC_REG_R7, offsetof(HAL_SavedRegisters, d[7])); + DEFINE(CYGARC_REG_R8, offsetof(HAL_SavedRegisters, d[8])); + DEFINE(CYGARC_REG_R9, offsetof(HAL_SavedRegisters, d[9])); + DEFINE(CYGARC_REG_R10, offsetof(HAL_SavedRegisters, d[10])); + DEFINE(CYGARC_REG_R11, offsetof(HAL_SavedRegisters, d[11])); + DEFINE(CYGARC_REG_R12, offsetof(HAL_SavedRegisters, d[12])); + DEFINE(CYGARC_REG_R13, offsetof(HAL_SavedRegisters, d[13])); + DEFINE(CYGARC_REG_R14, offsetof(HAL_SavedRegisters, d[14])); + DEFINE(CYGARC_REG_R15, offsetof(HAL_SavedRegisters, d[15])); + DEFINE(CYGARC_REG_R16, offsetof(HAL_SavedRegisters, d[16])); + DEFINE(CYGARC_REG_R17, offsetof(HAL_SavedRegisters, d[17])); + DEFINE(CYGARC_REG_R18, offsetof(HAL_SavedRegisters, d[18])); + DEFINE(CYGARC_REG_R19, offsetof(HAL_SavedRegisters, d[19])); + DEFINE(CYGARC_REG_R20, offsetof(HAL_SavedRegisters, d[20])); + DEFINE(CYGARC_REG_R21, offsetof(HAL_SavedRegisters, d[21])); + DEFINE(CYGARC_REG_R22, offsetof(HAL_SavedRegisters, d[22])); + DEFINE(CYGARC_REG_R23, offsetof(HAL_SavedRegisters, d[23])); + DEFINE(CYGARC_REG_R24, offsetof(HAL_SavedRegisters, d[24])); + DEFINE(CYGARC_REG_R25, offsetof(HAL_SavedRegisters, d[25])); + DEFINE(CYGARC_REG_R26, offsetof(HAL_SavedRegisters, d[26])); + DEFINE(CYGARC_REG_R27, offsetof(HAL_SavedRegisters, d[27])); + DEFINE(CYGARC_REG_R28, offsetof(HAL_SavedRegisters, d[28])); + DEFINE(CYGARC_REG_R29, offsetof(HAL_SavedRegisters, d[29])); + DEFINE(CYGARC_REG_R30, offsetof(HAL_SavedRegisters, d[30])); + DEFINE(CYGARC_REG_R31, offsetof(HAL_SavedRegisters, d[31])); + DEFINE(CYGARC_REG_EP, offsetof(HAL_SavedRegisters, d[30])); + DEFINE(CYGARC_REG_LP, offsetof(HAL_SavedRegisters, d[31])); + DEFINE(CYGARC_REG_PSW, offsetof(HAL_SavedRegisters, psw)); + DEFINE(CYGARC_REG_PC, offsetof(HAL_SavedRegisters, pc)); + + // Below only saved on exceptions/interrupts + DEFINE(CYGARC_REG_CAUSE, offsetof(HAL_SavedRegisters, cause)); + DEFINE(CYGARC_REG_VECTOR, offsetof(HAL_SavedRegisters, vector)); + + DEFINE(CYGARC_EXCEPTION_FRAME_SIZE, sizeof(HAL_SavedRegisters)); + + // Some other exception related definitions + DEFINE(CYGNUM_HAL_ISR_MIN, CYGNUM_HAL_ISR_MIN); + DEFINE(CYGNUM_HAL_ISR_COUNT, CYGNUM_HAL_ISR_COUNT); + DEFINE(CYGNUM_HAL_VSR_MAX, CYGNUM_HAL_VSR_MAX); + DEFINE(CYGNUM_HAL_VSR_COUNT, CYGNUM_HAL_VSR_COUNT); + DEFINE(CYGNUM_HAL_EXCEPTION_COUNT, CYGNUM_HAL_EXCEPTION_COUNT); + DEFINE(CYGNUM_HAL_VECTOR_INTWDT, CYGNUM_HAL_VECTOR_INTWDT); + DEFINE(CYGNUM_HAL_VECTOR_TRAP00, CYGNUM_HAL_VECTOR_TRAP00); + DEFINE(CYGNUM_HAL_VECTOR_TRAP10, CYGNUM_HAL_VECTOR_TRAP10); + DEFINE(CYGNUM_HAL_VECTOR_ILGOP, CYGNUM_HAL_VECTOR_ILGOP); + + DEFINE(CYGARC_PSW_ID, CYGARC_PSW_ID); + DEFINE(CYGARC_PSW_EP, CYGARC_PSW_EP); + DEFINE(CYGARC_PSW_NP, CYGARC_PSW_NP); + +#ifdef CYGPKG_KERNEL + DEFINE(RAISE_INTR, CYG_INSTRUMENT_CLASS_INTR|CYG_INSTRUMENT_EVENT_INTR_RAISE); +#endif + +#if defined(CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT) + DEFINE(CYGNUM_CALL_IF_TABLE_SIZE, CYGNUM_CALL_IF_TABLE_SIZE); +#endif + + // Variant definitions - want these to be included instead. + + return 0; +} + +//-------------------------------------------------------------------------- +// EOF hal_mk_defs.c diff --git a/ecos/packages/hal/v85x/arch/current/src/vectors.S b/ecos/packages/hal/v85x/arch/current/src/vectors.S new file mode 100644 index 0000000..502df27 --- /dev/null +++ b/ecos/packages/hal/v85x/arch/current/src/vectors.S @@ -0,0 +1,651 @@ +// #======================================================================== +// # +// # vectors.S +// # +// # NEC/V85x exception/interrupt vectors +// # +// #======================================================================== +// ####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later +// version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License +// along with eCos; if not, write to the Free Software Foundation, Inc., +// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +// +// As a special exception, if other files instantiate templates or use +// macros or inline functions from this file, or you compile this file +// and link it with other works to produce a work based on this file, +// this file does not by itself cause the resulting work to be covered by +// the GNU General Public License. However the source code for this file +// must still be made available in accordance with section (3) of the GNU +// General Public License v2. +// +// This exception does not invalidate any other reasons why a work based +// on this file might be covered by the GNU General Public License. +// ------------------------------------------- +// ####ECOSGPLCOPYRIGHTEND#### +// #======================================================================== +// ######DESCRIPTIONBEGIN#### +// # +// # Author(s): gthomas, jlarmour +// # Contributors: gthomas, jlarmour +// # Date: 2001-03-21 +// # Purpose: NEC/V85x exception vectors +// # Description: This file defines the code placed into the exception +// # vectors. It also contains the first level default VSRs +// # that save and restore state for both exceptions and +// # interrupts. +// # +// #####DESCRIPTIONEND#### +// # +// #======================================================================== + +#include <pkgconf/system.h> +#include <pkgconf/hal.h> +#include <pkgconf/hal_v85x.h> +#ifdef CYGPKG_KERNEL +#include <pkgconf/kernel.h> +#else +# undef CYGFUN_HAL_COMMON_KERNEL_SUPPORT +# undef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK +#endif +#include <cyg/hal/hal_platform_setup.h> +#include CYGHWR_MEMORY_LAYOUT_H + +#include <cyg/hal/nec_offsets.inc> + +// Two different macros in case we ever decide to differentiate +// between exceptions and interrupts. + .macro EXCEPTION + .org reset_vector+(0x0010*VECTOR) + addi -CYGARC_EXCEPTION_FRAME_SIZE,sp,sp + st.w r8,CYGARC_REG_R8[sp] + movea VECTOR,r0,r8 + jr exception + .set VECTOR, VECTOR+1 + .endm + + .macro INTERRUPT + .org reset_vector+(0x0010*VECTOR) + addi -CYGARC_EXCEPTION_FRAME_SIZE,sp,sp + st.w r8,CYGARC_REG_R8[sp] + movea VECTOR,r0,r8 + jr exception + .set VECTOR, VECTOR+1 + .endm + +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) + .section ".vectors","ax" + .globl reset_vector +reset_vector: + +// +// These are the hardware exception vectors. +// +__ROM_vsr: + // start of ROM + mov r0,sp // needed for platforms that have NMI 2 insns after reset + // This jump works even for ROMRAM because it is PC relative + jr start + + .set VECTOR, 1 + .rept CYGNUM_HAL_EXCEPTION_COUNT-1 + EXCEPTION + .endr + .set VECTOR, CYGNUM_HAL_ISR_MIN + .rept CYGNUM_HAL_ISR_COUNT + INTERRUPT + .endr +#endif + + .text + .globl start +start: +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) + // Before anything else, *carefully* check if this was actually an NMI + // The assumption is that the stack pointer can only be 0 on reset + // as set above at __ROM_vsr + cmp r0,sp + be 1f + addi -CYGARC_EXCEPTION_FRAME_SIZE,sp,sp + movea 1,r0,r8 + jr exception +1: +#endif + + // Perform hardware initialization + PLATFORM_SETUP1 + + // Copy everything to the proper VMA base and jump to it. +#if defined(CYG_HAL_STARTUP_ROMRAM) + lea CYGMEM_REGION_rom,r6 + lea CYGMEM_REGION_ram,r7 + lea ___rom_data_end,r8 // Assume end of .data == end of ROM +1: ld.w 0[r6],r1 + st.w r1,0[r7] + addi 4,r6,r6 + addi 4,r7,r7 + cmp r6,r8 + bne 1b + + // now jump to RAM + lea ___romram_jump_vector,r1 + jmp [r1] + +___romram_jump_vector: + +#elif defined( CYG_HAL_STARTUP_ROM ) + // Relocate [copy] data from ROM to RAM + lea ___rom_data_start,r6 + lea ___ram_data_start,r7 + lea ___ram_data_end,r8 +1: ld.w 0[r6],r1 + st.w r1,0[r7] + addi 4,r6,r6 + addi 4,r7,r7 + cmp r7,r8 + bne 1b + + // Initialize RAM vectors + lea ___ram_vectors_loadaddr,r6 + lea ___ram_vectors_start,r7 + lea ___ram_vectors_end,r8 +1: ld.w 0[r6],r1 + st.w r1,0[r7] + addi 4,r6,r6 + addi 4,r7,r7 + cmp r7,r8 + bne 1b +#endif + + // Initialize stack + lea __startup_stack-16,r1 + mov r1,sp + + // Clear BSS + lea ___bss_start,r6 + lea ___bss_end,r7 +1: st.w r0,0[r6] + addi 4,r6,r6 + cmp r6,r7 + bne 1b + +#if defined(CYG_HAL_STARTUP_RAM) +// Set up VSR pointers into this application/image + lea _hal_vsr_table+(CYGNUM_HAL_ISR_MIN*4),r6 + movea CYGNUM_HAL_ISR_COUNT,r0,r7 + lea do_interrupt,r8 +10: st.w r8,0[r6] + addi 4,r6,r6 + addi -1,r7,r7 + bne 10b +#endif + + // Initialize hardware + jarl _cyg_hal_hardware_init,r31 + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +# ifdef CYG_HAL_STARTUP_RAM +// Need to handle exceptions as well + lea _hal_vsr_table,r6 + movea CYGNUM_HAL_EXCEPTION_COUNT,r0,r7 + lea do_exception,r8 +10: st.w r8,0[r6] + addi 4,r6,r6 + addi -1,r7,r7 + bne 10b +# endif + jarl _initialize_stub,r31 +#else // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +// All programs need to provide for NMI handlers + lea _hal_vsr_table+4,r6 + lea do_exception,r8 + st.w r8,0[r6] // NMI pin +#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) + // we can process NMIs now + lea __allow_nmi,r1 + addi 1,r0,r2 + st.w r2,0[r1] +#endif + +#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \ + || defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT) + .extern hal_ctrlc_isr_init + jarl _hal_ctrlc_isr_init,r31 +#endif + + // Run through static constructors + jarl _cyg_hal_invoke_constructors,r31 + + // Ready to start the eCos kernel + jarl _cyg_start,r31 + + // If we get here, something is _very_ wrong +_start_hang: + br _start_hang + +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) + // Handle exception +exception: + // save exception context + st.w ep,CYGARC_REG_EP[sp] + mov sp,ep + sst.w r8,CYGARC_REG_VECTOR[ep] + sst.w r1,CYGARC_REG_R1[ep] + addi CYGARC_EXCEPTION_FRAME_SIZE,ep,r1 + sst.w r2,CYGARC_REG_R2[ep] + sst.w r1,CYGARC_REG_SP[ep] + sst.w r4,CYGARC_REG_R4[ep] + sst.w r5,CYGARC_REG_R5[ep] + sst.w r6,CYGARC_REG_R6[ep] + sst.w r7,CYGARC_REG_R7[ep] +// sst.w r8,CYGARC_REG_R8[ep] + sst.w r9,CYGARC_REG_R9[ep] + sst.w r10,CYGARC_REG_R10[ep] + sst.w r11,CYGARC_REG_R11[ep] + sst.w r12,CYGARC_REG_R12[ep] + sst.w r13,CYGARC_REG_R13[ep] + sst.w r14,CYGARC_REG_R14[ep] + sst.w r15,CYGARC_REG_R15[ep] + sst.w r16,CYGARC_REG_R16[ep] + sst.w r17,CYGARC_REG_R17[ep] + sst.w r18,CYGARC_REG_R18[ep] + sst.w r19,CYGARC_REG_R19[ep] +#ifndef CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT + sst.w r20,CYGARC_REG_R20[ep] + sst.w r21,CYGARC_REG_R21[ep] + sst.w r22,CYGARC_REG_R22[ep] + sst.w r23,CYGARC_REG_R23[ep] + sst.w r24,CYGARC_REG_R24[ep] + sst.w r25,CYGARC_REG_R25[ep] + sst.w r26,CYGARC_REG_R26[ep] + sst.w r27,CYGARC_REG_R27[ep] + sst.w r28,CYGARC_REG_R28[ep] +#endif + sst.w r29,CYGARC_REG_R29[ep] // NB frame pointer + sst.w lp,CYGARC_REG_LP[ep] + cmp CYGNUM_HAL_VECTOR_TRAP00,r8 // NMI? + bge 05f + stsr FEPC,r6 // saved state differs + stsr FEPSW,r7 + lea __allow_nmi,r1 // is the system ready for NMIs? + tst1 0, 0[r1] + bne 10f + // if not processing NMIs, allow restore + sst.w r6,CYGARC_REG_PC[ep] + sst.w r7,CYGARC_REG_PSW[ep] + // Reenable exception processing + stsr PSW,r6 + andi ~(CYGARC_PSW_EP|CYGARC_PSW_NP),r6,r6 + ldsr r6,PSW + lea return_from_exception_or_interrupt,r1 + jmp [r1] + +05: stsr EIPC,r6 + stsr EIPSW,r7 + cmp CYGNUM_HAL_VECTOR_ILGOP,r8 // Illegal opcode? + bne 10f + addi -4,r6,r6 // yes, adjust PC +10: sst.w r6,CYGARC_REG_PC[ep] + sst.w r7,CYGARC_REG_PSW[ep] + stsr ECR,r6 + sst.w r6,CYGARC_REG_CAUSE[ep] + // Reenable exception processing + stsr PSW,r6 + andi ~(CYGARC_PSW_EP|CYGARC_PSW_NP),r6,r6 + ldsr r6,PSW + shl 2,r8 + lea _hal_vsr_table,r1 + add r1,r8 + ld.w 0[r8],r1 + jmp [r1] +#endif + +do_exception: + // pass in saved registers + mov sp,r6 + + // leave space for the parameter flush back area (as per calling + // conventions) + addi -16,sp,sp + + jarl _exception_handler,r31 + +return_from_exception_or_interrupt: + // save sp, but remove space for the parameter flush back area + // (as per calling conventions) at the same time + addi 16,sp,ep + + sld.w CYGARC_REG_PSW[ep],r7 + sld.w CYGARC_REG_R1[ep],r1 + sld.w CYGARC_REG_PC[ep],r6 + sld.w CYGARC_REG_R2[ep],r2 + // disable interrupts while restoring context + ld.w CYGARC_REG_VECTOR[ep],r4 + stsr PSW,r8 + cmp CYGNUM_HAL_VECTOR_TRAP00,r4 + bge 10f + ori CYGARC_PSW_NP,r8,r8 // returning from NMI + ori CYGARC_PSW_ID,r8,r8 // disable interrupt + ldsr r8,PSW + ldsr r7,FEPSW + ldsr r6,FEPC + br 30f +10: cmp CYGNUM_HAL_ISR_MIN,r4 // exception or interrupt + bge 20f + ori CYGARC_PSW_EP,r8,r8 // returning from exception +20: ori CYGARC_PSW_ID,r8,r8 // disable interrupt + ldsr r8,PSW + ldsr r7,EIPSW // Avoid pipeline bubbles + ldsr r6,EIPC +30: sld.w CYGARC_REG_R4[ep],r4 + sld.w CYGARC_REG_R5[ep],r5 + sld.w CYGARC_REG_R6[ep],r6 + sld.w CYGARC_REG_R7[ep],r7 + sld.w CYGARC_REG_R8[ep],r8 + sld.w CYGARC_REG_R9[ep],r9 + sld.w CYGARC_REG_R10[ep],r10 + sld.w CYGARC_REG_R11[ep],r11 + sld.w CYGARC_REG_R12[ep],r12 + sld.w CYGARC_REG_R13[ep],r13 + sld.w CYGARC_REG_R14[ep],r14 + sld.w CYGARC_REG_R15[ep],r15 + sld.w CYGARC_REG_R16[ep],r16 + sld.w CYGARC_REG_R17[ep],r17 + sld.w CYGARC_REG_R18[ep],r18 + sld.w CYGARC_REG_R19[ep],r19 +#ifndef CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT + sld.w CYGARC_REG_R20[ep],r20 + sld.w CYGARC_REG_R21[ep],r21 + sld.w CYGARC_REG_R22[ep],r22 + sld.w CYGARC_REG_R23[ep],r23 + sld.w CYGARC_REG_R24[ep],r24 + sld.w CYGARC_REG_R25[ep],r25 + sld.w CYGARC_REG_R26[ep],r26 + sld.w CYGARC_REG_R27[ep],r27 + sld.w CYGARC_REG_R28[ep],r28 +#endif + sld.w CYGARC_REG_R29[ep],r29 // NB frame pointer + sld.w CYGARC_REG_LP[ep],lp + sld.w CYGARC_REG_SP[ep],sp + sld.w CYGARC_REG_EP[ep],ep + reti + + // Handle interrupt - these are typically vectored into user code +do_interrupt: + mov sp,ep // save pointer to regs frame + // leave space for the parameter flush back area (as per calling + // conventions) + addi -16,sp,sp + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + // Switch to interrupt stack + lea irq_level,r6 // current number of nested interrupts + ld.w 0[r6],r7 + addi 1,r7,r8 + st.w r8,0[r6] + cmp 0,r7 // if was zero, switch stacks + bne 10f + mov sp,r1 // save old stack pointer + lea __interrupt_stack-20,r2 + mov r2,sp + st.w r1,16[sp] +10: +#endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + + // The entire CPU state is now stashed on the stack, + // increment the scheduler lock and handle the interrupt + +#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT + .extern _cyg_scheduler_sched_lock + lea _cyg_scheduler_sched_lock,r7 + ld.w 0[r7],r8 + addi 1,r8,r8 + st.w r8,0[r7] +#endif + +#if defined(CYGPKG_KERNEL_INSTRUMENT) && \ + defined(CYGDBG_KERNEL_INSTRUMENT_INTR) + lea RAISE_INTR,r6 // arg0 = type = INTR,RAISE + ld.w CYGARC_REG_VECTOR[ep],r7 // args = vector + mov r0,r8 // arg2 = 0 + jarl _cyg_instrument,r31 +#endif + +#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \ + || defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT) + // If we are supporting Ctrl-C interrupts from GDB, we must squirrel + // away a pointer to the save interrupt state here so that we can + // plant a breakpoint at some later time. + + .extern _hal_saved_interrupt_state + lea _hal_saved_interrupt_state,r8 + st.w ep,0[r8] +#endif + +#ifdef CYGIMP_KERNEL_INTERRUPTS_CHAIN + mov r0,r8 // vector # (overloaded by kernel) +#else + ld.w CYGARC_REG_VECTOR[ep],r6 // vector # + addi -CYGNUM_HAL_ISR_MIN,r6,r8 + shl 2,r8 +#endif + lea _hal_interrupt_objects,r1 + add r8,r1 + ld.w 0[r1],r29 // save object handle + lea _hal_interrupt_data,r1 + add r8,r1 + ld.w 0[r1],r7 // handler data + lea _hal_interrupt_handlers,r1 + add r8,r1 + mov ep,r8 // pointer to saved registers + ld.w 0[r1],r1 // handler routine +#ifdef CYGIMP_KERNEL_INTERRUPTS_CHAIN + ld.w CYGARC_REG_VECTOR[ep],r6 // vector # +#endif + jarl call_via_r1,r31 + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + // If we are returning from the last nested interrupt, move back + // to the thread stack. interrupt_end() must be called on the + // thread stack since it potentially causes a context switch. + lea irq_level,r6 + ld.w 0[r6],r7 + addi -1,r7,r8 + st.w r8,0[r6] + cmp 0,r8 + bne 10f + ld.w 16[sp],sp // Restore non-interrupt stack at last interrupt + // this is offset 16 because of parameter + // flush back area +10: +#endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + +#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT + // The return value from the handler (in r10) will indicate whether a + // DSR is to be posted. Pass this together with a pointer to the + // interrupt object we have just used to the interrupt tidy up routine. + + mov r10,r6 // interrupt handler return code + mov r29,r7 // object handle + mov ep,r8 // register frame + jarl _interrupt_end,r31 // post any bottom layer handle + +#endif + br return_from_exception_or_interrupt + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + .globl _hal_interrupt_stack_call_pending_DSRs +_hal_interrupt_stack_call_pending_DSRs: + stsr PSW,r9 + di // disable interrupts while changing stack + // Switch to interrupt stack + lea irq_level,r6 // current number of nested interrupts + mov 1,r7 // note: this can never be non-zero at this point + st.w r7,0[r6] + mov sp,r1 // save old stack pointer + lea __interrupt_stack-32,r8 // 32 for 16-byte parameter flush back + // plus 12 bytes for following reg saves + // plus 4 bytes to preserve alignment + mov r8,sp + st.w r1,16[sp] + st.w r9,20[sp] + st.w lp,24[sp] + ei + jarl _cyg_interrupt_call_pending_DSRs,lp + di + ld.w 24[sp],lp // restore state + ld.w 20[sp],r6 + ld.w 16[sp],sp + lea irq_level,r7 + st.w r0,0[r7] + ldsr r6,PSW + jmp [lp] +#endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + +// +// Indirect subroutine call, via R1 + +call_via_r1: + jmp [r1] + +// +// Reset the board +// + .globl _hal_reset_board +_hal_reset_board: + di // Turn off interrupts + // Don't process NMIs + lea __allow_nmi,r1 + st.w r0,0[r1] + jmp [r0] // Restart machine + +#if !defined(CYGSEM_HAL_NEC_INLINE_INTERRUPT_FUNCTIONS) + .globl _hal_disable_interrupts +_hal_disable_interrupts: + stsr PSW,r10 + di + jmp [lp] + + .globl _hal_enable_interrupts +_hal_enable_interrupts: + stsr PSW,r6 + ei + jmp [lp] + + .globl _hal_restore_interrupts +_hal_restore_interrupts: + ldsr r6,PSW + jmp [lp] +#endif + +// ------------------------------------------------------------------------- + .section ".ram_vectors","awx",@progbits + +#if defined(CYG_HAL_STARTUP_ROM) +// Trap jump table - used by builtin ROM +__vsr_table: + .rept CYGNUM_HAL_VSR_COUNT + .word 0x00000794,0,0,0 // jr 0x0100xx0, nop, nop, nop + .endr +__vsr_table_end: +#endif + +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) +_hal_vsr_table: + .rept CYGNUM_HAL_EXCEPTION_COUNT + .word do_exception + .endr + .rept CYGNUM_HAL_ISR_COUNT + .word do_interrupt + .endr + +// Flag to indicate whether NMIs are allowed +// Without this, if we do a soft reset (using hal_plf_reset_board above) +// we may process NMIs like the watchdog timeout before the system can +// accept them +__allow_nmi: + .word 0 + + .balign 64 +_hal_virtual_vector_table: + .rept CYGNUM_CALL_IF_TABLE_SIZE + .word 0 + .endr + +#if CYGINT_HAL_V85X_ICE_DEBUG + .globl _hal_v85x_ice_syscall_info +_hal_v85x_ice_syscall_info: + .rept 48 + .long 0 + .endr +#endif // if CYGINT_HAL_V85X_ICE_DEBUG +#endif // if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) + + .data +// Initial stack + .rept 1024 + .byte 0 + .endr +__startup_stack: + +#ifndef CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE +#define CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE 4096 +#endif +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + .balign 16 + .global _cyg_interrupt_stack_base +_cyg_interrupt_stack_base: +__interrupt_stack_base: + .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE + .byte 0 + .endr + .balign 16 + .global _cyg_interrupt_stack +_cyg_interrupt_stack: +__interrupt_stack: +irq_level: + .long 0 +#endif + + +// Interrupt vector tables. +// These tables contain the isr, data and object pointers used to deliver +// interrupts to user code. + + .extern _hal_default_isr + + .globl _hal_interrupt_handlers +_hal_interrupt_handlers: + .rept CYGNUM_HAL_ISR_COUNT + .long _hal_default_isr + .endr + + .globl _hal_interrupt_data +_hal_interrupt_data: + .rept CYGNUM_HAL_ISR_COUNT + .long 0 + .endr + + .globl _hal_interrupt_objects +_hal_interrupt_objects: + .rept CYGNUM_HAL_ISR_COUNT + .long 0 + .endr + +// ------------------------------------------------------------------------- +// EOF vectors.S |