diff options
| -rw-r--r-- | drivers/st/bsec/bsec.c | 18 | ||||
| -rw-r--r-- | include/drivers/st/bsec.h | 1 | ||||
| -rw-r--r-- | plat/st/common/include/stm32mp_common.h | 1 | ||||
| -rw-r--r-- | plat/st/stm32mp1/stm32mp1_private.c | 13 |
4 files changed, 15 insertions, 18 deletions
diff --git a/drivers/st/bsec/bsec.c b/drivers/st/bsec/bsec.c index b3c15ee8..01c369ed 100644 --- a/drivers/st/bsec/bsec.c +++ b/drivers/st/bsec/bsec.c @@ -841,22 +841,6 @@ static uint32_t bsec_power_safmem(bool power) } /* - * bsec_mode_is_closed_device: read OTP secure sub-mode. - * return: false if open_device and true of closed_device. - */ -bool bsec_mode_is_closed_device(void) -{ - uint32_t value; - - if ((bsec_shadow_register(DATA0_OTP) != BSEC_OK) || - (bsec_read_otp(&value, DATA0_OTP) != BSEC_OK)) { - return true; - } - - return (value & DATA0_OTP_SECURED) == DATA0_OTP_SECURED; -} - -/* * bsec_shadow_read_otp: Load OTP from SAFMEM and provide its value * otp_value: read value. * word: OTP number. @@ -894,7 +878,7 @@ uint32_t bsec_check_nsec_access_rights(uint32_t otp) if (otp >= STM32MP1_UPPER_OTP_START) { /* Check if BSEC is in OTP-SECURED closed_device state. */ - if (bsec_mode_is_closed_device()) { + if (stm32mp_is_closed_device()) { if (!non_secure_can_access(otp)) { return BSEC_ERROR; } diff --git a/include/drivers/st/bsec.h b/include/drivers/st/bsec.h index 2171550b..d833e7ab 100644 --- a/include/drivers/st/bsec.h +++ b/include/drivers/st/bsec.h @@ -199,7 +199,6 @@ bool bsec_read_sp_lock(uint32_t otp); bool bsec_wr_lock(uint32_t otp); uint32_t bsec_otp_lock(uint32_t service, uint32_t value); -bool bsec_mode_is_closed_device(void); uint32_t bsec_shadow_read_otp(uint32_t *otp_value, uint32_t word); uint32_t bsec_check_nsec_access_rights(uint32_t otp); diff --git a/plat/st/common/include/stm32mp_common.h b/plat/st/common/include/stm32mp_common.h index e20308ee..59657fdc 100644 --- a/plat/st/common/include/stm32mp_common.h +++ b/plat/st/common/include/stm32mp_common.h @@ -19,6 +19,7 @@ void stm32mp_save_boot_ctx_address(uintptr_t address); uintptr_t stm32mp_get_boot_ctx_address(void); bool stm32mp_is_single_core(void); +bool stm32mp_is_closed_device(void); /* Return the base address of the DDR controller */ uintptr_t stm32mp_ddrctrl_base(void); diff --git a/plat/st/stm32mp1/stm32mp1_private.c b/plat/st/stm32mp1/stm32mp1_private.c index 38ebcef6..e2dcd2af 100644 --- a/plat/st/stm32mp1/stm32mp1_private.c +++ b/plat/st/stm32mp1/stm32mp1_private.c @@ -278,6 +278,19 @@ bool stm32mp_is_single_core(void) return ret; } +/* Return true when device is in closed state */ +bool stm32mp_is_closed_device(void) +{ + uint32_t value; + + if ((bsec_shadow_register(DATA0_OTP) != BSEC_OK) || + (bsec_read_otp(&value, DATA0_OTP) != BSEC_OK)) { + return true; + } + + return (value & DATA0_OTP_SECURED) == DATA0_OTP_SECURED; +} + uint32_t stm32_iwdg_get_instance(uintptr_t base) { switch (base) { |