diff options
| -rw-r--r-- | drivers/st/bsec/bsec.c | 10 | ||||
| -rw-r--r-- | drivers/st/clk/stm32mp1_clk.c | 20 | ||||
| -rw-r--r-- | plat/st/common/include/stm32mp_common.h | 3 | ||||
| -rw-r--r-- | plat/st/common/stm32mp_common.c | 8 |
4 files changed, 18 insertions, 23 deletions
diff --git a/drivers/st/bsec/bsec.c b/drivers/st/bsec/bsec.c index aaecf1f8..b3c15ee8 100644 --- a/drivers/st/bsec/bsec.c +++ b/drivers/st/bsec/bsec.c @@ -32,20 +32,14 @@ static uintptr_t bsec_base; static void bsec_lock(void) { - const uint32_t mask = SCTLR_M_BIT | SCTLR_C_BIT; - - /* Lock is currently required only when MMU and cache are enabled */ - if ((read_sctlr() & mask) == mask) { + if (stm32mp_lock_available()) { spin_lock(&bsec_spinlock); } } static void bsec_unlock(void) { - const uint32_t mask = SCTLR_M_BIT | SCTLR_C_BIT; - - /* Unlock is required only when MMU and cache are enabled */ - if ((read_sctlr() & mask) == mask) { + if (stm32mp_lock_available()) { spin_unlock(&bsec_spinlock); } } diff --git a/drivers/st/clk/stm32mp1_clk.c b/drivers/st/clk/stm32mp1_clk.c index f3b9f0cc..0cc87cc7 100644 --- a/drivers/st/clk/stm32mp1_clk.c +++ b/drivers/st/clk/stm32mp1_clk.c @@ -541,29 +541,19 @@ static const struct stm32mp1_clk_pll *pll_ref(unsigned int idx) return &stm32mp1_clk_pll[idx]; } -static int stm32mp1_lock_available(void) -{ - /* The spinlocks are used only when MMU is enabled */ - return (read_sctlr() & SCTLR_M_BIT) && (read_sctlr() & SCTLR_C_BIT); -} - static void stm32mp1_clk_lock(struct spinlock *lock) { - if (stm32mp1_lock_available() == 0U) { - return; + if (stm32mp_lock_available()) { + /* Assume interrupts are masked */ + spin_lock(lock); } - - /* Assume interrupts are masked */ - spin_lock(lock); } static void stm32mp1_clk_unlock(struct spinlock *lock) { - if (stm32mp1_lock_available() == 0U) { - return; + if (stm32mp_lock_available()) { + spin_unlock(lock); } - - spin_unlock(lock); } bool stm32mp1_rcc_is_secure(void) diff --git a/plat/st/common/include/stm32mp_common.h b/plat/st/common/include/stm32mp_common.h index 0d0a9c66..3dd6c567 100644 --- a/plat/st/common/include/stm32mp_common.h +++ b/plat/st/common/include/stm32mp_common.h @@ -30,6 +30,9 @@ uintptr_t stm32mp_pwr_base(void); /* Return the base address of the RCC peripheral */ uintptr_t stm32mp_rcc_base(void); +/* Check MMU status to allow spinlock use */ +bool stm32mp_lock_available(void); + /* Get IWDG platform instance ID from peripheral IO memory base address */ uint32_t stm32_iwdg_get_instance(uintptr_t base); diff --git a/plat/st/common/stm32mp_common.c b/plat/st/common/stm32mp_common.c index f95c7885..5428a74e 100644 --- a/plat/st/common/stm32mp_common.c +++ b/plat/st/common/stm32mp_common.c @@ -87,6 +87,14 @@ uintptr_t stm32mp_rcc_base(void) return rcc_base; } +bool stm32mp_lock_available(void) +{ + const uint32_t c_m_bits = SCTLR_M_BIT | SCTLR_C_BIT; + + /* The spinlocks are used only when MMU and data cache are enabled */ + return (read_sctlr() & c_m_bits) == c_m_bits; +} + uintptr_t stm32_get_gpio_bank_base(unsigned int bank) { if (bank == GPIO_BANK_Z) { |