diff options
| -rw-r--r-- | plat/imx/imx8m/imx8mp/gpc.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/plat/imx/imx8m/imx8mp/gpc.c b/plat/imx/imx8m/imx8mp/gpc.c index 3d53ccb1..383831cd 100644 --- a/plat/imx/imx8m/imx8mp/gpc.c +++ b/plat/imx/imx8m/imx8mp/gpc.c @@ -41,6 +41,17 @@ struct imx_noc_setting { uint32_t socket_qos_en; }; +enum clk_type { + CCM_ROOT_SLICE, + CCM_CCGR, +}; + +struct clk_setting { + uint32_t offset; + uint32_t val; + enum clk_type type; +}; + enum pu_domain_id { /* hsio ss */ HSIOMIX, @@ -109,6 +120,12 @@ static struct imx_noc_setting noc_setting[] = { { VPU_H1, 0xe80, 0xe80, 0x80000303, 0x0, 0x0} }; +static struct clk_setting hsiomix_clk[] = { + { 0x8380, 0x0, CCM_ROOT_SLICE }, + { 0x44d0, 0x0, CCM_CCGR }, + { 0x45c0, 0x0, CCM_CCGR }, +}; + static uint32_t gpc_saved_imrs[20]; static uint32_t gpc_wake_irqs[5]; static uint32_t gpc_imr_offset[] = { @@ -323,6 +340,15 @@ void imx_aips5_init(void) void imx_gpc_pm_domain_enable(uint32_t domain_id, bool on) { struct imx_pwr_domain *pwr_domain = &pu_domains[domain_id]; + int i; + + if (domain_id == HSIOMIX) { + for (i = 0; i < ARRAY_SIZE(hsiomix_clk); i++) { + hsiomix_clk[i].val = mmio_read_32(IMX_CCM_BASE + hsiomix_clk[i].offset); + mmio_setbits_32(IMX_CCM_BASE + hsiomix_clk[i].offset, + hsiomix_clk[i].type == CCM_ROOT_SLICE ? BIT(28) : 0x3); + } + } if (on) { pu_domain_status |= (1 << domain_id); @@ -417,6 +443,11 @@ void imx_gpc_pm_domain_enable(uint32_t domain_id, bool on) } } + if (domain_id == HSIOMIX) { + for (i = 0; i < ARRAY_SIZE(hsiomix_clk); i++) + mmio_write_32(IMX_CCM_BASE + hsiomix_clk[i].offset, hsiomix_clk[i].val); + } + pwr_domain->init_on = false; } |