diff options
| -rw-r--r-- | bl32/tsp/aarch64/tsp_entrypoint.S | 5 | ||||
| -rw-r--r-- | include/common/asm_macros_common.S | 12 | ||||
| -rw-r--r-- | plat/hisilicon/hikey/hisi_pwrc_sram.S | 3 | ||||
| -rw-r--r-- | plat/nvidia/tegra/common/aarch64/tegra_helpers.S | 3 | ||||
| -rw-r--r-- | plat/nvidia/tegra/soc/t186/plat_trampoline.S | 3 | ||||
| -rw-r--r-- | plat/rockchip/common/aarch64/plat_helpers.S | 3 |
6 files changed, 14 insertions, 15 deletions
diff --git a/bl32/tsp/aarch64/tsp_entrypoint.S b/bl32/tsp/aarch64/tsp_entrypoint.S index 2c325785..489183c5 100644 --- a/bl32/tsp/aarch64/tsp_entrypoint.S +++ b/bl32/tsp/aarch64/tsp_entrypoint.S @@ -43,10 +43,7 @@ msr spsr_el1, \reg2 .endm - .section .text, "ax" - .align 3 - -func tsp_entrypoint +func tsp_entrypoint _align=3 /* --------------------------------------------- * Set the exception vector to something sane. diff --git a/include/common/asm_macros_common.S b/include/common/asm_macros_common.S index b529246d..dbc9e2d3 100644 --- a/include/common/asm_macros_common.S +++ b/include/common/asm_macros_common.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -11,9 +11,12 @@ * code into a separate text section based on the function name * to enable elimination of unused code during linking. It also adds * basic debug information to enable call stack printing most of the - * time. + * time. The optional _align parameter can be used to force a + * non-standard alignment (indicated in powers of 2). Do *not* try to + * use a raw .align directive. Since func switches to a new section, + * this would not have the desired effect. */ - .macro func _name + .macro func _name, _align=-1 /* * Add Call Frame Information entry in the .debug_frame section for * debugger consumption. This enables callstack printing in debuggers. @@ -33,6 +36,9 @@ * .debug_frame */ .cfi_startproc + .if (\_align) != -1 + .align \_align + .endif \_name: .endm diff --git a/plat/hisilicon/hikey/hisi_pwrc_sram.S b/plat/hisilicon/hikey/hisi_pwrc_sram.S index 1fb63eaf..f9e1de41 100644 --- a/plat/hisilicon/hikey/hisi_pwrc_sram.S +++ b/plat/hisilicon/hikey/hisi_pwrc_sram.S @@ -15,8 +15,7 @@ .global v7_asm .global v7_asm_end - .align 3 -func pm_asm_code +func pm_asm_code _align=3 mov x0, 0 msr oslar_el1, x0 diff --git a/plat/nvidia/tegra/common/aarch64/tegra_helpers.S b/plat/nvidia/tegra/common/aarch64/tegra_helpers.S index e5e51268..691b90af 100644 --- a/plat/nvidia/tegra/common/aarch64/tegra_helpers.S +++ b/plat/nvidia/tegra/common/aarch64/tegra_helpers.S @@ -307,8 +307,7 @@ endfunc plat_reset_handler * Secure entrypoint function for CPU boot * ---------------------------------------- */ - .align 6 -func tegra_secure_entrypoint +func tegra_secure_entrypoint _align=6 #if ERRATA_TEGRA_INVALIDATE_BTB_AT_BOOT diff --git a/plat/nvidia/tegra/soc/t186/plat_trampoline.S b/plat/nvidia/tegra/soc/t186/plat_trampoline.S index 4841aa20..6a17c332 100644 --- a/plat/nvidia/tegra/soc/t186/plat_trampoline.S +++ b/plat/nvidia/tegra/soc/t186/plat_trampoline.S @@ -12,11 +12,10 @@ #define TEGRA186_SMMU_CTX_SIZE 0x420 - .align 4 .globl tegra186_cpu_reset_handler /* CPU reset handler routine */ -func tegra186_cpu_reset_handler +func tegra186_cpu_reset_handler _align=4 /* * The TZRAM loses state during System Suspend. We use this * information to decide if the reset handler is running after a diff --git a/plat/rockchip/common/aarch64/plat_helpers.S b/plat/rockchip/common/aarch64/plat_helpers.S index 1c8aefcb..abfb5a79 100644 --- a/plat/rockchip/common/aarch64/plat_helpers.S +++ b/plat/rockchip/common/aarch64/plat_helpers.S @@ -112,8 +112,7 @@ endfunc plat_crash_console_putc * cpus online or resume enterpoint * -------------------------------------------------------------------- */ - .align 16 -func platform_cpu_warmboot +func platform_cpu_warmboot _align=16 mrs x0, MPIDR_EL1 and x19, x0, #MPIDR_CPU_MASK and x20, x0, #MPIDR_CLUSTER_MASK |