diff options
| -rw-r--r--[-rwxr-xr-x] | plat/freescale/common/include/sci/ipc.h | 27 | ||||
| -rw-r--r--[-rwxr-xr-x] | plat/freescale/common/include/sci/rpc.h | 49 | ||||
| -rw-r--r--[-rwxr-xr-x] | plat/freescale/common/include/sci/svc/pad/api.h | 440 | ||||
| -rw-r--r--[-rwxr-xr-x] | plat/freescale/common/include/sci/svc/pm/api.h | 229 | ||||
| -rw-r--r--[-rwxr-xr-x] | plat/freescale/common/include/sci/svc/rm/api.h | 134 | ||||
| -rw-r--r--[-rwxr-xr-x] | plat/freescale/common/include/sci/types.h | 231 | ||||
| -rw-r--r--[-rwxr-xr-x] | plat/freescale/common/sci/ipc.c | 4 | ||||
| -rw-r--r-- | plat/freescale/common/sci/svc/pad/pad_rpc_clnt.c | 307 | ||||
| -rw-r--r-- | plat/freescale/common/sci/svc/pad/rpc.h | 61 | ||||
| -rw-r--r--[-rwxr-xr-x] | plat/freescale/common/sci/svc/pm/pm_rpc_clnt.c | 175 | ||||
| -rw-r--r--[-rwxr-xr-x] | plat/freescale/common/sci/svc/pm/rpc.h | 57 | ||||
| -rw-r--r-- | plat/freescale/common/sci/svc/rm/rm_rpc_clnt.c | 153 | ||||
| -rw-r--r-- | plat/freescale/common/sci/svc/rm/rpc.h | 58 |
13 files changed, 958 insertions, 967 deletions
diff --git a/plat/freescale/common/include/sci/ipc.h b/plat/freescale/common/include/sci/ipc.h index d9ad74b2..fad92a65 100755..100644 --- a/plat/freescale/common/include/sci/ipc.h +++ b/plat/freescale/common/include/sci/ipc.h @@ -1,31 +1,8 @@ /* + * Copyright (C) 2016 Freescale Semiconductor, Inc. * Copyright 2017 NXP * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of NXP nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * SPDX-License-Identifier: GPL-2.0+ */ /*! diff --git a/plat/freescale/common/include/sci/rpc.h b/plat/freescale/common/include/sci/rpc.h index 2e6ed6a9..a7fd01d0 100755..100644 --- a/plat/freescale/common/include/sci/rpc.h +++ b/plat/freescale/common/include/sci/rpc.h @@ -1,31 +1,8 @@ /* + * Copyright (C) 2016 Freescale Semiconductor, Inc. * Copyright 2017 NXP * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of ARM nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * SPDX-License-Identifier: GPL-2.0+ */ /*! @@ -51,10 +28,12 @@ #define RPC_SVC(MSG) ((MSG)->svc) #define RPC_FUNC(MSG) ((MSG)->func) #define RPC_R8(MSG) ((MSG)->func) -#define RPC_D32(MSG, IDX) ((MSG)->DATA.d32[IDX / 4]) -#define RPC_F32(MSG, IDX) ((MSG)->DATA.f32[IDX / 4]) -#define RPC_D16(MSG, IDX) ((MSG)->DATA.d16[IDX / 2]) -#define RPC_D8(MSG, IDX) ((MSG)->DATA.d8[IDX]) +#define RPC_I32(MSG, IDX) ((MSG)->DATA.i32[IDX / 4]) +#define RPC_I16(MSG, IDX) ((MSG)->DATA.i16[IDX / 2]) +#define RPC_I8(MSG, IDX) ((MSG)->DATA.i8[IDX]) +#define RPC_U32(MSG, IDX) ((MSG)->DATA.u32[IDX / 4]) +#define RPC_U16(MSG, IDX) ((MSG)->DATA.u16[IDX / 2]) +#define RPC_U8(MSG, IDX) ((MSG)->DATA.u8[IDX]) /* Types */ @@ -64,7 +43,6 @@ typedef enum sc_rpc_svc_e SC_RPC_SVC_RETURN = 1, SC_RPC_SVC_PM = 2, SC_RPC_SVC_RM = 3, - SC_RPC_SVC_OTP = 4, SC_RPC_SVC_TIMER = 5, SC_RPC_SVC_PAD = 6, SC_RPC_SVC_MISC = 7, @@ -80,9 +58,12 @@ typedef struct sc_rpc_msg_s uint8_t func; union { - uint32_t d32[(SC_RPC_MAX_MSG - 1)]; - uint16_t d16[(SC_RPC_MAX_MSG - 1) * 2]; - uint8_t d8[(SC_RPC_MAX_MSG - 1) * 4]; + int32_t i32[(SC_RPC_MAX_MSG - 1)]; + int16_t i16[(SC_RPC_MAX_MSG - 1) * 2]; + int8_t i8[(SC_RPC_MAX_MSG - 1) * 4]; + uint32_t u32[(SC_RPC_MAX_MSG - 1)]; + uint16_t u16[(SC_RPC_MAX_MSG - 1) * 2]; + uint8_t u8[(SC_RPC_MAX_MSG - 1) * 4]; } DATA; } sc_rpc_msg_t; @@ -138,7 +119,7 @@ void sc_rpc_dispatch(sc_rsrc_t mu, sc_rpc_msg_t *msg); * @param[in,out] msg handle to a message * * This function decodes a message, calls macros to translate the - * resources, pins, addresses, partitions, memory regions, etc. and + * resources, pads, addresses, partitions, memory regions, etc. and * then forwards on to the hypervisors SCFW API.Return results are * translated back abd placed back into the message to be returned * to the original API. diff --git a/plat/freescale/common/include/sci/svc/pad/api.h b/plat/freescale/common/include/sci/svc/pad/api.h index d84f3fd8..fb6e78c1 100755..100644 --- a/plat/freescale/common/include/sci/svc/pad/api.h +++ b/plat/freescale/common/include/sci/svc/pad/api.h @@ -1,31 +1,8 @@ /* + * Copyright (C) 2016 Freescale Semiconductor, Inc. * Copyright 2017 NXP * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of NXP nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * SPDX-License-Identifier: GPL-2.0+ */ /*! @@ -36,6 +13,37 @@ * * Module for the Pad Control (PAD) service. * + * @details + * + * Pad configuration is managed by SC firmware. The pad configuration + * features supported by the SC firmware include: + * + * - Configuring the mux, input/output connection, and low-power isolation + mode. + * - Configuring the technology-specific pad setting such as drive strength, + * pullup/pulldown, etc. + * - Configuring compensation for pad groups with dual voltage capability. + * + * Pad functions fall into one of three categories. Generic functions are + * common to all SoCs and all process technologies. SoC functions are raw + * low-level functions. Technology-specific functions are specific to the + * process technology. + * + * The list of pads is SoC specific. Refer to the SoC [Pad List](@ref PADS) + * for valid pad values. Note that all pads exist on a die but may or + * may not be brought out by the specific package. Mapping of pads to + * package pins/balls is documented in the associated Data Sheet. Some pads + * may not be brought out because the part (die+package) is defeatured and + * some pads may connect to the substrate in the package. + * + * Some pads (SC_P_COMP_*) that can be specified are not individual pads + * but are in fact pad groups. These groups have additional configuration + * that can be done using the sc_pad_set_gp_28fdsoi_comp() function. More + * info on these can be found in the associated Reference Manual. + * + * Pads are managed as a resource by the Resource Manager (RM). They have + * assigned owners and only the owners can configure the pads. + * * @{ */ @@ -49,6 +57,13 @@ /* Defines */ +/*! + * @name Defines for type widths + */ +/*@{*/ +#define SC_PAD_MUX_W 3 /*!< Width of mux parameter */ +/*@}*/ + /* Types */ /*! @@ -60,24 +75,24 @@ */ typedef enum sc_pad_config_e { - SC_PAD_CONFIG_NORMAL = 0, //!< Normal - SC_PAD_CONFIG_OD = 1, //!< Open Drain - SC_PAD_CONFIG_OD_IN = 2, //!< Open Drain and input - SC_PAD_CONFIG_OUT_IN = 3 //!< Output and input + SC_PAD_CONFIG_NORMAL = 0, /*!< Normal */ + SC_PAD_CONFIG_OD = 1, /*!< Open Drain */ + SC_PAD_CONFIG_OD_IN = 2, /*!< Open Drain and input */ + SC_PAD_CONFIG_OUT_IN = 3 /*!< Output and input */ } sc_pad_config_t; /*! * This type is used to declare a pad low-power isolation config. * ISO_LATE is the most common setting. ISO_EARLY is only used when - * an output pin is directly determined by another input pin. The + * an output pad is directly determined by another input pad. The * other two are only used when SW wants to directly contol isolation. */ typedef enum sc_pad_iso_e { - SC_PAD_ISO_OFF = 0, //!< ISO latch is transparent - SC_PAD_ISO_EARLY = 1, //!< Follow EARLY_ISO - SC_PAD_ISO_LATE = 2, //!< Follow LATE_ISO - SC_PAD_ISO_ON = 3 //!< ISO latched data is held + SC_PAD_ISO_OFF = 0, /*!< ISO latch is transparent */ + SC_PAD_ISO_EARLY = 1, /*!< Follow EARLY_ISO */ + SC_PAD_ISO_LATE = 2, /*!< Follow LATE_ISO */ + SC_PAD_ISO_ON = 3 /*!< ISO latched data is held */ } sc_pad_iso_t; /*! @@ -86,10 +101,10 @@ typedef enum sc_pad_iso_e */ typedef enum sc_pad_28lpp_dse_e { - SC_PAD_28LPP_DSE_x1 = 0, //!< Drive strength x1 - SC_PAD_28LPP_DSE_x4 = 1, //!< Drive strength x4 - SC_PAD_28LPP_DSE_x2 = 2, //!< Drive strength x2 - SC_PAD_28LPP_DSE_x6 = 3 //!< Drive strength x6 + SC_PAD_28LPP_DSE_x1 = 0, /*!< Drive strength x1 */ + SC_PAD_28LPP_DSE_x4 = 1, /*!< Drive strength x4 */ + SC_PAD_28LPP_DSE_x2 = 2, /*!< Drive strength x2 */ + SC_PAD_28LPP_DSE_x6 = 3 /*!< Drive strength x6 */ } sc_pad_28lpp_dse_t; /*! @@ -98,20 +113,20 @@ typedef enum sc_pad_28lpp_dse_e */ typedef enum sc_pad_28fdsio_dse_e { - SC_PAD_28FDSOI_DSE_18V_1MA = 0, //!< Drive strength of 1mA for 1.8v - SC_PAD_28FDSOI_DSE_33V_2MA = 0, //!< Drive strength of 2mA for 3.3v - SC_PAD_28FDSOI_DSE_DV_HIGH = 0, //!< Drive strength of 12mA for dual volt - SC_PAD_28FDSOI_DSE_18V_2MA = 1, //!< Drive strength of 2mA for 1.8v - SC_PAD_28FDSOI_DSE_33V_4MA = 1, //!< Drive strength of 4mA for 3.3v - SC_PAD_28FDSOI_DSE_DV_LOW = 1, //!< Drive strength of 12mA for dual volt - SC_PAD_28FDSOI_DSE_18V_4MA = 2, //!< Drive strength of 4mA for 1.8v - SC_PAD_28FDSOI_DSE_33V_8MA = 2, //!< Drive strength of 8mA for 3.3v - SC_PAD_28FDSOI_DSE_18V_6MA = 3, //!< Drive strength of 6mA for 1.8v - SC_PAD_28FDSOI_DSE_33V_12MA = 3, //!< Drive strength of 12mA for 3.3v - SC_PAD_28FDSOI_DSE_18V_8MA = 4, //!< Drive strength of 8mA for 1.8v - SC_PAD_28FDSOI_DSE_18V_10MA = 5, //!< Drive strength of 10mA for 1.8v - SC_PAD_28FDSOI_DSE_18V_12MA = 6, //!< Drive strength of 12mA for 1.8v - SC_PAD_28FDSOI_DSE_33V_HS = 7 //!< High-speed drive strength for 1.8v + SC_PAD_28FDSOI_DSE_18V_1MA = 0, /*!< Drive strength of 1mA for 1.8v */ + SC_PAD_28FDSOI_DSE_18V_2MA = 1, /*!< Drive strength of 2mA for 1.8v */ + SC_PAD_28FDSOI_DSE_18V_4MA = 2, /*!< Drive strength of 4mA for 1.8v */ + SC_PAD_28FDSOI_DSE_18V_6MA = 3, /*!< Drive strength of 6mA for 1.8v */ + SC_PAD_28FDSOI_DSE_18V_8MA = 4, /*!< Drive strength of 8mA for 1.8v */ + SC_PAD_28FDSOI_DSE_18V_10MA = 5, /*!< Drive strength of 10mA for 1.8v */ + SC_PAD_28FDSOI_DSE_18V_12MA = 6, /*!< Drive strength of 12mA for 1.8v */ + SC_PAD_28FDSOI_DSE_33V_2MA = 0, /*!< Drive strength of 2mA for 3.3v */ + SC_PAD_28FDSOI_DSE_33V_4MA = 1, /*!< Drive strength of 4mA for 3.3v */ + SC_PAD_28FDSOI_DSE_33V_8MA = 2, /*!< Drive strength of 8mA for 3.3v */ + SC_PAD_28FDSOI_DSE_33V_12MA = 3, /*!< Drive strength of 12mA for 3.3v */ + SC_PAD_28FDSOI_DSE_33V_HS = 7, /*!< High-speed drive strength for 1.8v */ + SC_PAD_28FDSOI_DSE_DV_LOW = 0, /*!< Low drive strength for dual volt */ + SC_PAD_28FDSOI_DSE_DV_HIGH = 1 /*!< High drive strength for dual volt */ } sc_pad_28fdsoi_dse_t; /*! @@ -120,10 +135,10 @@ typedef enum sc_pad_28fdsio_dse_e */ typedef enum sc_pad_28lpp_ps_e { - SC_PAD_28LPP_PS_PD = 0, //!< Pull down - SC_PAD_28LPP_PS_PU_5K = 1, //!< 5K pull up - SC_PAD_28LPP_PS_PU_47K = 2, //!< 47K pull up - SC_PAD_28LPP_PS_PU_100K = 3 //!< 100K pull up + SC_PAD_28LPP_PS_PD = 0, /*!< Pull down */ + SC_PAD_28LPP_PS_PU_5K = 1, /*!< 5K pull up */ + SC_PAD_28LPP_PS_PU_47K = 2, /*!< 47K pull up */ + SC_PAD_28LPP_PS_PU_100K = 3 /*!< 100K pull up */ } sc_pad_28lpp_ps_t; /*! @@ -132,33 +147,38 @@ typedef enum sc_pad_28lpp_ps_e */ typedef enum sc_pad_28fdsoi_ps_e { - SC_PAD_28FDSOI_PS_KEEPER = 0, //!< Bus-keeper (only valid for 1.8v) - SC_PAD_28FDSOI_PS_PU = 1, //!< Pull-up - SC_PAD_28FDSOI_PS_PD = 2, //!< Pull-down - SC_PAD_28FDSOI_PS_NONE = 3 //!< No pull (disabled) + SC_PAD_28FDSOI_PS_KEEPER = 0, /*!< Bus-keeper (only valid for 1.8v) */ + SC_PAD_28FDSOI_PS_PU = 1, /*!< Pull-up */ + SC_PAD_28FDSOI_PS_PD = 2, /*!< Pull-down */ + SC_PAD_28FDSOI_PS_NONE = 3 /*!< No pull (disabled) */ } sc_pad_28fdsoi_ps_t; /*! - * This type is used to declare a wakeup mode of a pin. + * This type is used to declare a wakeup mode of a pad. */ typedef enum sc_pad_wakeup_e { - SC_PAD_WAKEUP_OFF = 0, //!< Off - SC_PAD_WAKEUP_CLEAR = 1, //!< Clears pending flag - SC_PAD_WAKEUP_LOW_LVL = 4, //!< Low level - SC_PAD_WAKEUP_FALL_EDGE = 5, //!< Falling edge - SC_PAD_WAKEUP_RISE_EDGE = 6, //!< Rising edge - SC_PAD_WAKEUP_HIGH_LVL = 7 //!< High-level + SC_PAD_WAKEUP_OFF = 0, /*!< Off */ + SC_PAD_WAKEUP_CLEAR = 1, /*!< Clears pending flag */ + SC_PAD_WAKEUP_LOW_LVL = 4, /*!< Low level */ + SC_PAD_WAKEUP_FALL_EDGE = 5, /*!< Falling edge */ + SC_PAD_WAKEUP_RISE_EDGE = 6, /*!< Rising edge */ + SC_PAD_WAKEUP_HIGH_LVL = 7 /*!< High-level */ } sc_pad_wakeup_t; /* Functions */ /*! - * This function configures the mux settings for a pin. This includes + * @name Generic Functions + * @{ + */ + +/*! + * This function configures the mux settings for a pad. This includes * the signal mux, pad config, and low-power isolation mode. * * @param[in] ipc IPC handle - * @param[in] pin pin to configure + * @param[in] pad pad to configure * @param[in] mux mux setting * @param[in] config pad config * @param[in] iso low-power isolation mode @@ -167,80 +187,115 @@ typedef enum sc_pad_wakeup_e * * Return errors: * - SC_PARM if arguments out of range or invalid, - * - SC_ERR_NOACCESS if caller's partition is not the pin owner + * - SC_ERR_NOACCESS if caller's partition is not the pad owner * - * Refer to the SoC [Pin List](@ref PINS) for valid pin values. + * Refer to the SoC [Pad List](@ref PADS) for valid pad values. */ -sc_err_t sc_pad_set_mux(sc_ipc_t ipc, sc_pin_t pin, +sc_err_t sc_pad_set_mux(sc_ipc_t ipc, sc_pad_t pad, uint8_t mux, sc_pad_config_t config, sc_pad_iso_t iso); /*! + * This function gets the mux settings for a pad. This includes + * the signal mux, pad config, and low-power isolation mode. + * + * @param[in] ipc IPC handle + * @param[in] pad pad to query + * @param[out] mux pointer to return mux setting + * @param[out] config pointer to return pad config + * @param[out] iso pointer to return low-power isolation mode + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_PARM if arguments out of range or invalid, + * - SC_ERR_NOACCESS if caller's partition is not the pad owner + * + * Refer to the SoC [Pad List](@ref PADS) for valid pad values. + */ +sc_err_t sc_pad_get_mux(sc_ipc_t ipc, sc_pad_t pad, + uint8_t *mux, sc_pad_config_t *config, sc_pad_iso_t *iso); + +/*! * This function configures the general purpose pad control. This * is technology dependent and includes things like drive strength, * slew rate, pull up/down, etc. Refer to the SoC Reference Manual * for bit field details. * * @param[in] ipc IPC handle - * @param[in] pin pin to configure + * @param[in] pad pad to configure * @param[in] ctrl control value to set * * @return Returns an error code (SC_ERR_NONE = success). * * Return errors: * - SC_PARM if arguments out of range or invalid, - * - SC_ERR_NOACCESS if caller's partition is not the pin owner + * - SC_ERR_NOACCESS if caller's partition is not the pad owner * - * Refer to the SoC [Pin List](@ref PINS) for valid pin values. + * Refer to the SoC [Pad List](@ref PADS) for valid pad values. */ -sc_err_t sc_pad_set_gp(sc_ipc_t ipc, sc_pin_t pin, uint32_t ctrl); +sc_err_t sc_pad_set_gp(sc_ipc_t ipc, sc_pad_t pad, uint32_t ctrl); /*! - * This function configures the pad control specific to 28LPP. + * This function gets the general purpose pad control. This + * is technology dependent and includes things like drive strength, + * slew rate, pull up/down, etc. Refer to the SoC Reference Manual + * for bit field details. * * @param[in] ipc IPC handle - * @param[in] pin pin to configure - * @param[in] dse drive strength - * @param[in] sre slew rate - * @param[in] hys hysteresis - * @param[in] pe pull enable - * @param[in] ps pull select + * @param[in] pad pad to query + * @param[out] ctrl pointer to return control value * * @return Returns an error code (SC_ERR_NONE = success). * * Return errors: * - SC_PARM if arguments out of range or invalid, - * - SC_ERR_NOACCESS if caller's partition is not the pin owner, - * - SC_ERR_UNAVAILABLE if process not applicable + * - SC_ERR_NOACCESS if caller's partition is not the pad owner * - * Refer to the SoC [Pin List](@ref PINS) for valid pin values. + * Refer to the SoC [Pad List](@ref PADS) for valid pad values. */ -sc_err_t sc_pad_set_gp_28lpp(sc_ipc_t ipc, sc_pin_t pin, - sc_pad_28lpp_dse_t dse, bool sre, bool hys, bool pe, - sc_pad_28lpp_ps_t ps); +sc_err_t sc_pad_get_gp(sc_ipc_t ipc, sc_pad_t pad, uint32_t *ctrl); /*! - * This function configures the wakeup mode of the pin. + * This function configures the wakeup mode of the pad. * * @param[in] ipc IPC handle - * @param[in] pin pin to configure + * @param[in] pad pad to configure * @param[in] wakeup wakeup to set * * @return Returns an error code (SC_ERR_NONE = success). * * Return errors: * - SC_PARM if arguments out of range or invalid, - * - SC_ERR_NOACCESS if caller's partition is not the pin owner + * - SC_ERR_NOACCESS if caller's partition is not the pad owner * - * Refer to the SoC [Pin List](@ref PINS) for valid pin values. + * Refer to the SoC [Pad List](@ref PADS) for valid pad values. */ -sc_err_t sc_pad_set_wakeup(sc_ipc_t ipc, sc_pin_t pin, +sc_err_t sc_pad_set_wakeup(sc_ipc_t ipc, sc_pad_t pad, sc_pad_wakeup_t wakeup); /*! + * This function gets the wakeup mode of a pad. + * + * @param[in] ipc IPC handle + * @param[in] pad pad to query + * @param[out] wakeup pointer to return wakeup + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_PARM if arguments out of range or invalid, + * - SC_ERR_NOACCESS if caller's partition is not the pad owner + * + * Refer to the SoC [Pad List](@ref PADS) for valid pad values. + */ +sc_err_t sc_pad_get_wakeup(sc_ipc_t ipc, sc_pad_t pad, + sc_pad_wakeup_t *wakeup); + +/*! * This function configures a pad. * * @param[in] ipc IPC handle - * @param[in] pin pin to configure + * @param[in] pad pad to configure * @param[in] mux mux setting * @param[in] config pad config * @param[in] iso low-power isolation mode @@ -252,130 +307,145 @@ sc_err_t sc_pad_set_wakeup(sc_ipc_t ipc, sc_pin_t pin, * * Return errors: * - SC_PARM if arguments out of range or invalid, - * - SC_ERR_NOACCESS if caller's partition is not the pin owner + * - SC_ERR_NOACCESS if caller's partition is not the pad owner * * @return Returns an error code (SC_ERR_NONE = success). * - * Refer to the SoC [Pin List](@ref PINS) for valid pin values. + * Refer to the SoC [Pad List](@ref PADS) for valid pad values. */ -sc_err_t sc_pad_set_all(sc_ipc_t ipc, sc_pin_t pin, uint8_t mux, +sc_err_t sc_pad_set_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t mux, sc_pad_config_t config, sc_pad_iso_t iso, uint32_t ctrl, sc_pad_wakeup_t wakeup); /*! - * This function gets the mux settings for a pin. This includes - * the signal mux, pad config, and low-power isolation mode. + * This function gets a pad's config. * * @param[in] ipc IPC handle - * @param[in] pin pin to query + * @param[in] pad pad to query * @param[out] mux pointer to return mux setting * @param[out] config pointer to return pad config * @param[out] iso pointer to return low-power isolation mode + * @param[out] ctrl pointer to return control value + * @param[out] wakeup pointer to return wakeup to set * - * @return Returns an error code (SC_ERR_NONE = success). + * @see sc_pad_set_mux(). + * @see sc_pad_set_gp(). * * Return errors: * - SC_PARM if arguments out of range or invalid, - * - SC_ERR_NOACCESS if caller's partition is not the pin owner + * - SC_ERR_NOACCESS if caller's partition is not the pad owner * - * Refer to the SoC [Pin List](@ref PINS) for valid pin values. + * @return Returns an error code (SC_ERR_NONE = success). + * + * Refer to the SoC [Pad List](@ref PADS) for valid pad values. */ -sc_err_t sc_pad_get_mux(sc_ipc_t ipc, sc_pin_t pin, - uint8_t *mux, sc_pad_config_t *config, sc_pad_iso_t *iso); +sc_err_t sc_pad_get_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t *mux, + sc_pad_config_t *config, sc_pad_iso_t *iso, uint32_t *ctrl, + sc_pad_wakeup_t *wakeup); + +/* @} */ /*! - * This function gets the general purpose pad control. This - * is technology dependent and includes things like drive strength, - * slew rate, pull up/down, etc. Refer to the SoC Reference Manual - * for bit field details. + * @name SoC Specific Functions + * @{ + */ + +/*! + * This function configures the settings for a pad. This setting is SoC + * specific. * * @param[in] ipc IPC handle - * @param[in] pin pin to query - * @param[out] ctrl pointer to return control value + * @param[in] pad pad to configure + * @param[in] val value to set * * @return Returns an error code (SC_ERR_NONE = success). * * Return errors: * - SC_PARM if arguments out of range or invalid, - * - SC_ERR_NOACCESS if caller's partition is not the pin owner + * - SC_ERR_NOACCESS if caller's partition is not the pad owner * - * Refer to the SoC [Pin List](@ref PINS) for valid pin values. + * Refer to the SoC [Pad List](@ref PADS) for valid pad values. */ -sc_err_t sc_pad_get_gp(sc_ipc_t ipc, sc_pin_t pin, uint32_t *ctrl); +sc_err_t sc_pad_set(sc_ipc_t ipc, sc_pad_t pad, uint32_t val); /*! - * This function gets the pad control specific to 28LPP. + * This function gets the settings for a pad. This setting is SoC + * specific. * * @param[in] ipc IPC handle - * @param[in] pin pin to query - * @param[out] dse pointer to return drive strength - * @param[out] sre pointer to return slew rate - * @param[out] hys pointer to return hysteresis - * @param[out] pe pointer to return pull enable - * @param[out] ps pointer to return pull select + * @param[in] pad pad to query + * @param[out] val pointer to return setting * * @return Returns an error code (SC_ERR_NONE = success). * * Return errors: * - SC_PARM if arguments out of range or invalid, - * - SC_ERR_NOACCESS if caller's partition is not the pin owner, - * - SC_ERR_UNAVAILABLE if process not applicable + * - SC_ERR_NOACCESS if caller's partition is not the pad owner * - * Refer to the SoC [Pin List](@ref PINS) for valid pin values. + * Refer to the SoC [Pad List](@ref PADS) for valid pad values. */ -sc_err_t sc_pad_get_gp_28lpp(sc_ipc_t ipc, sc_pin_t pin, - sc_pad_28lpp_dse_t *dse, bool *sre, bool *hys, bool *pe, - sc_pad_28lpp_ps_t *ps); +sc_err_t sc_pad_get(sc_ipc_t ipc, sc_pad_t pad, uint32_t *val); + +/* @} */ /*! - * This function gets the wakeup mode of a pin. + * @name Technology Specific Functions + * @{ + */ + +/*! + * This function configures the pad control specific to 28LPP. * * @param[in] ipc IPC handle - * @param[in] pin pin to query - * @param[out] wakeup pointer to return wakeup + * @param[in] pad pad to configure + * @param[in] dse drive strength + * @param[in] sre slew rate + * @param[in] hys hysteresis + * @param[in] pe pull enable + * @param[in] ps pull select * * @return Returns an error code (SC_ERR_NONE = success). * * Return errors: * - SC_PARM if arguments out of range or invalid, - * - SC_ERR_NOACCESS if caller's partition is not the pin owner + * - SC_ERR_NOACCESS if caller's partition is not the pad owner, + * - SC_ERR_UNAVAILABLE if process not applicable * - * Refer to the SoC [Pin List](@ref PINS) for valid pin values. + * Refer to the SoC [Pad List](@ref PADS) for valid pad values. */ -sc_err_t sc_pad_get_wakeup(sc_ipc_t ipc, sc_pin_t pin, - sc_pad_wakeup_t *wakeup); +sc_err_t sc_pad_set_gp_28lpp(sc_ipc_t ipc, sc_pad_t pad, + sc_pad_28lpp_dse_t dse, bool sre, bool hys, bool pe, + sc_pad_28lpp_ps_t ps); /*! - * This function gets a pad's config. + * This function gets the pad control specific to 28LPP. * * @param[in] ipc IPC handle - * @param[in] pin pin to query - * @param[out] mux pointer to return mux setting - * @param[out] config pointer to return pad config - * @param[out] iso pointer to return low-power isolation mode - * @param[out] ctrl pointer to return control value - * @param[out] wakeup pointer to return wakeup to set + * @param[in] pad pad to query + * @param[out] dse pointer to return drive strength + * @param[out] sre pointer to return slew rate + * @param[out] hys pointer to return hysteresis + * @param[out] pe pointer to return pull enable + * @param[out] ps pointer to return pull select * - * @see sc_pad_set_mux(). - * @see sc_pad_set_gp(). + * @return Returns an error code (SC_ERR_NONE = success). * * Return errors: * - SC_PARM if arguments out of range or invalid, - * - SC_ERR_NOACCESS if caller's partition is not the pin owner - * - * @return Returns an error code (SC_ERR_NONE = success). + * - SC_ERR_NOACCESS if caller's partition is not the pad owner, + * - SC_ERR_UNAVAILABLE if process not applicable * - * Refer to the SoC [Pin List](@ref PINS) for valid pin values. + * Refer to the SoC [Pad List](@ref PADS) for valid pad values. */ -sc_err_t sc_pad_get_all(sc_ipc_t ipc, sc_pin_t pin, uint8_t *mux, - sc_pad_config_t *config, sc_pad_iso_t *iso, uint32_t *ctrl, - sc_pad_wakeup_t *wakeup); +sc_err_t sc_pad_get_gp_28lpp(sc_ipc_t ipc, sc_pad_t pad, + sc_pad_28lpp_dse_t *dse, bool *sre, bool *hys, bool *pe, + sc_pad_28lpp_ps_t *ps); /*! * This function configures the pad control specific to 28FDSOI. * * @param[in] ipc IPC handle - * @param[in] pin pin to configure + * @param[in] pad pad to configure * @param[in] dse drive strength * @param[in] ps pull select * @@ -383,19 +453,19 @@ sc_err_t sc_pad_get_all(sc_ipc_t ipc, sc_pin_t pin, uint8_t *mux, * * Return errors: * - SC_PARM if arguments out of range or invalid, - * - SC_ERR_NOACCESS if caller's partition is not the pin owner, + * - SC_ERR_NOACCESS if caller's partition is not the pad owner, * - SC_ERR_UNAVAILABLE if process not applicable * - * Refer to the SoC [Pin List](@ref PINS) for valid pin values. + * Refer to the SoC [Pad List](@ref PADS) for valid pad values. */ -sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pin_t pin, +sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad, sc_pad_28fdsoi_dse_t dse, sc_pad_28fdsoi_ps_t ps); /*! * This function gets the pad control specific to 28FDSOI. * * @param[in] ipc IPC handle - * @param[in] pin pin to query + * @param[in] pad pad to query * @param[out] dse pointer to return drive strength * @param[out] ps pointer to return pull select * @@ -403,19 +473,19 @@ sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pin_t pin, * * Return errors: * - SC_PARM if arguments out of range or invalid, - * - SC_ERR_NOACCESS if caller's partition is not the pin owner, + * - SC_ERR_NOACCESS if caller's partition is not the pad owner, * - SC_ERR_UNAVAILABLE if process not applicable * - * Refer to the SoC [Pin List](@ref PINS) for valid pin values. + * Refer to the SoC [Pad List](@ref PADS) for valid pad values. */ -sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pin_t pin, +sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad, sc_pad_28fdsoi_dse_t *dse, sc_pad_28fdsoi_ps_t *ps); /*! * This function configures the compensation control specific to 28FDSOI. * * @param[in] ipc IPC handle - * @param[in] pin pin to configure + * @param[in] pad pad to configure * @param[in] compen compensation/freeze mode * @param[in] fastfrz fast freeze * @param[in] rasrcp compensation code for PMOS @@ -426,12 +496,12 @@ sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pin_t pin, * * Return errors: * - SC_PARM if arguments out of range or invalid, - * - SC_ERR_NOACCESS if caller's partition is not the pin owner, + * - SC_ERR_NOACCESS if caller's partition is not the pad owner, * - SC_ERR_UNAVAILABLE if process not applicable * - * Refer to the SoC [Pin List](@ref PINS) for valid pin values. + * Refer to the SoC [Pad List](@ref PADS) for valid pad values. */ -sc_err_t sc_pad_set_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pin_t pin, +sc_err_t sc_pad_set_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad, uint8_t compen, bool fastfrz, uint8_t rasrcp, uint8_t rasrcn, bool nasrc_sel); @@ -439,7 +509,7 @@ sc_err_t sc_pad_set_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pin_t pin, * This function gets the compensation control specific to 28FDSOI. * * @param[in] ipc IPC handle - * @param[in] pin pin to query + * @param[in] pad pad to query * @param[in] compen pointer to return compensation/freeze mode * @param[in] fastfrz pointer to return fast freeze * @param[in] rasrcp pointer to return compensation code for PMOS @@ -452,50 +522,16 @@ sc_err_t sc_pad_set_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pin_t pin, * * Return errors: * - SC_PARM if arguments out of range or invalid, - * - SC_ERR_NOACCESS if caller's partition is not the pin owner, + * - SC_ERR_NOACCESS if caller's partition is not the pad owner, * - SC_ERR_UNAVAILABLE if process not applicable * - * Refer to the SoC [Pin List](@ref PINS) for valid pin values. + * Refer to the SoC [Pad List](@ref PADS) for valid pad values. */ -sc_err_t sc_pad_get_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pin_t pin, +sc_err_t sc_pad_get_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad, uint8_t *compen, bool *fastfrz, uint8_t *rasrcp, uint8_t *rasrcn, bool *nasrc_sel, bool *compok, uint8_t *nasrc); -/*! - * This function configures the settings for a pin. This setting is SoC - * specific. - * - * @param[in] ipc IPC handle - * @param[in] pin pin to configure - * @param[in] val value to set - * - * @return Returns an error code (SC_ERR_NONE = success). - * - * Return errors: - * - SC_PARM if arguments out of range or invalid, - * - SC_ERR_NOACCESS if caller's partition is not the pin owner - * - * Refer to the SoC [Pin List](@ref PINS) for valid pin values. - */ -sc_err_t sc_pad_set(sc_ipc_t ipc, sc_pin_t pin, uint32_t val); - -/*! - * This function gets the settings for a pin. This setting is SoC - * specific. - * - * @param[in] ipc IPC handle - * @param[in] pin pin to query - * @param[out] val pointer to return setting - * - * @return Returns an error code (SC_ERR_NONE = success). - * - * Return errors: - * - SC_PARM if arguments out of range or invalid, - * - SC_ERR_NOACCESS if caller's partition is not the pin owner - * - * Refer to the SoC [Pin List](@ref PINS) for valid pin values. - */ -sc_err_t sc_pad_get(sc_ipc_t ipc, sc_pin_t pin, uint32_t *val); +/* @} */ #endif /* _SC_PAD_API_H */ diff --git a/plat/freescale/common/include/sci/svc/pm/api.h b/plat/freescale/common/include/sci/svc/pm/api.h index a65fdb20..d6751289 100755..100644 --- a/plat/freescale/common/include/sci/svc/pm/api.h +++ b/plat/freescale/common/include/sci/svc/pm/api.h @@ -1,31 +1,8 @@ /* + * Copyright (C) 2016 Freescale Semiconductor, Inc. * Copyright 2017 NXP * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of NXP nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * SPDX-License-Identifier: GPL-2.0+ */ /*! @@ -54,10 +31,10 @@ * @name Defines for type widths */ /*@{*/ -#define SC_PM_POWER_MODE_W 2 //!< Width of sc_pm_power_mode_t -#define SC_PM_CLOCK_MODE_W 2 //!< Width of sc_pm_clock_mode_t -#define SC_PM_RESET_TYPE_W 1 //!< Width of sc_pm_reset_type_t -#define SC_PM_RESET_REASON_W 3 //!< Width of sc_pm_reset_reason_t +#define SC_PM_POWER_MODE_W 2 /*!< Width of sc_pm_power_mode_t */ +#define SC_PM_CLOCK_MODE_W 3 /*!< Width of sc_pm_clock_mode_t */ +#define SC_PM_RESET_TYPE_W 1 /*!< Width of sc_pm_reset_type_t */ +#define SC_PM_RESET_REASON_W 3 /*!< Width of sc_pm_reset_reason_t */ /*@}*/ /*! @@ -70,7 +47,7 @@ * @name Defines for ALL parameters */ /*@{*/ -#define SC_PM_CLK_ALL UINT8_MAX //!< All clocks +#define SC_PM_CLK_ALL UINT8_MAX /*!< All clocks */ /*@}*/ /* Types */ @@ -82,10 +59,10 @@ */ typedef enum sc_pm_power_mode_e { - SC_PM_PW_MODE_OFF = 0, //!< Power off - SC_PM_PW_MODE_STBY = 1, //!< Power in standby - SC_PM_PW_MODE_LP = 2, //!< Power in low-power - SC_PM_PW_MODE_ON = 3 //!< Power on + SC_PM_PW_MODE_OFF = 0, /*!< Power off */ + SC_PM_PW_MODE_STBY = 1, /*!< Power in standby */ + SC_PM_PW_MODE_LP = 2, /*!< Power in low-power */ + SC_PM_PW_MODE_ON = 3 /*!< Power on */ } sc_pm_power_mode_t; /*! @@ -93,19 +70,19 @@ typedef enum sc_pm_power_mode_e */ typedef enum sc_pm_clk_e { - SC_PM_CLK_SLV_BUS = 0, //!< Slave bus clock - SC_PM_CLK_MST_BUS = 1, //!< Master bus clock - SC_PM_CLK_PER = 2, //!< Peripheral clock - SC_PM_CLK_PHY = 3, //!< Phy clock - SC_PM_CLK_MISC = 4, //!< Misc clock - SC_PM_CLK_MISC0 = 0, //!< Misc 0 clock - SC_PM_CLK_MISC1 = 1, //!< Misc 1 clock - SC_PM_CLK_MISC2 = 2, //!< Misc 2 clock - SC_PM_CLK_MISC3 = 3, //!< Misc 3 clock - SC_PM_CLK_MISC4 = 4, //!< Misc 4 clock - SC_PM_CLK_CPU = 2, //!< CPU clock - SC_PM_CLK_PLL = 4, //!< PLL - SC_PM_CLK_BYPASS = 4 //!< Bypass clock + SC_PM_CLK_SLV_BUS = 0, /*!< Slave bus clock */ + SC_PM_CLK_MST_BUS = 1, /*!< Master bus clock */ + SC_PM_CLK_PER = 2, /*!< Peripheral clock */ + SC_PM_CLK_PHY = 3, /*!< Phy clock */ + SC_PM_CLK_MISC = 4, /*!< Misc clock */ + SC_PM_CLK_MISC0 = 0, /*!< Misc 0 clock */ + SC_PM_CLK_MISC1 = 1, /*!< Misc 1 clock */ + SC_PM_CLK_MISC2 = 2, /*!< Misc 2 clock */ + SC_PM_CLK_MISC3 = 3, /*!< Misc 3 clock */ + SC_PM_CLK_MISC4 = 4, /*!< Misc 4 clock */ + SC_PM_CLK_CPU = 2, /*!< CPU clock */ + SC_PM_CLK_PLL = 4, /*!< PLL */ + SC_PM_CLK_BYPASS = 4 /*!< Bypass clock */ } sc_pm_clk_t; /*! @@ -113,13 +90,27 @@ typedef enum sc_pm_clk_e */ typedef enum sc_pm_clk_mode_e { - SC_PM_CLK_MODE_OFF = 0, //!< Clock is disabled - SC_PM_CLK_MODE_AUTOGATE_SW = 1, //!< Clock is in SW autogate mode - SC_PM_CLK_MODE_AUTOGATE_HW = 2, //!< Clock is in HW autogate mode - SC_PM_CLK_MODE_ON = 3 //!< Clock is enabled. + SC_PM_CLK_MODE_ROM_INIT = 0, /*!< Clock is initialized by ROM. */ + SC_PM_CLK_MODE_OFF = 1, /*!< Clock is disabled */ + SC_PM_CLK_MODE_ON = 2, /*!< Clock is enabled. */ + SC_PM_CLK_MODE_AUTOGATE_SW = 3, /*!< Clock is in SW autogate mode */ + SC_PM_CLK_MODE_AUTOGATE_HW = 4, /*!< Clock is in HW autogate mode */ + SC_PM_CLK_MODE_AUTOGATE_SW_HW = 5, /*!< Clock is in SW-HW autogate mode */ } sc_pm_clk_mode_t; /*! + * This type is used to declare the clock parent. + */ +typedef enum sc_pm_clk_parent_e +{ + XTAL = 0, /*! < Parent is XTAL. */ + PLL0 = 1, /*! < Parent is PLL0 */ + PLL1 = 2, /*! < Parent is PLL1 or PLL0/2 */ + PLL2 = 3, /*! < Parent in PLL2 or PLL0/4 */ + BYPS = 4 /*! < Parent is a bypass clock. */ +} sc_pm_clk_parent_t; + +/*! * This type is used to declare clock rates. */ typedef uint32_t sc_pm_clock_rate_t; @@ -129,8 +120,8 @@ typedef uint32_t sc_pm_clock_rate_t; */ typedef enum sc_pm_reset_type_e { - SC_PM_RESET_TYPE_COLD = 0, //!< Cold reset - SC_PM_RESET_TYPE_WARM = 1 //!< Warm reset + SC_PM_RESET_TYPE_COLD = 0, /*!< Cold reset */ + SC_PM_RESET_TYPE_WARM = 1 /*!< Warm reset */ } sc_pm_reset_type_t; /*! @@ -138,14 +129,14 @@ typedef enum sc_pm_reset_type_e */ typedef enum sc_pm_reset_reason_e { - SC_PM_RESET_REASON_POR = 0, //!< Power on reset - SC_PM_RESET_REASON_WARM = 1, //!< Warm reset - SC_PM_RESET_REASON_SW = 2, //!< Software reset - SC_PM_RESET_REASON_WDOG = 3, //!< Watchdog reset - SC_PM_RESET_REASON_LOCKUP = 4, //!< Lockup reset - SC_PM_RESET_REASON_TAMPER = 5, //!< Tamper reset - SC_PM_RESET_REASON_TEMP = 6, //!< Temp reset - SC_PM_RESET_REASON_LOW_VOLT = 7, //!< Low voltage reset + SC_PM_RESET_REASON_POR = 0, /*!< Power on reset */ + SC_PM_RESET_REASON_WARM = 1, /*!< Warm reset */ + SC_PM_RESET_REASON_SW = 2, /*!< Software reset */ + SC_PM_RESET_REASON_WDOG = 3, /*!< Watchdog reset */ + SC_PM_RESET_REASON_LOCKUP = 4, /*!< Lockup reset */ + SC_PM_RESET_REASON_TAMPER = 5, /*!< Tamper reset */ + SC_PM_RESET_REASON_TEMP = 6, /*!< Temp reset */ + SC_PM_RESET_REASON_LOW_VOLT = 7, /*!< Low voltage reset */ } sc_pm_reset_reason_t; /* Functions */ @@ -302,6 +293,51 @@ sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, bool enable, bool autog); + +/*! + * This function sets the parent of a resource's clock. + * This function should only be called when the clock is disabled. + * + * @param[in] ipc IPC handle + * @param[in] resource ID of the resource + * @param[in] clk clock to affect + * @param[in] parent New parent of the clock. + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_ERR_PARM if invalid resource or clock, + * - SC_ERR_NOACCESS if caller's partition is not the resource owner + * or parent of the owner, + * - SC_ERR_UNAVAILABLE if clock not applicable to this resource + * - SC_ERR_BUSY if clock is currently enabled. + * + * Refer to the [Clock List](@ref CLOCKS) for valid clock values. + */ +sc_err_t sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, + sc_pm_clk_t clk, sc_pm_clk_parent_t parent); + +/*! + * This function gets the parent of a resource's clock. + * + * @param[in] ipc IPC handle + * @param[in] resource ID of the resource + * @param[in] clk clock to affect + * @param[out] parent pointer to return parent of clock. + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_ERR_PARM if invalid resource or clock, + * - SC_ERR_NOACCESS if caller's partition is not the resource owner + * or parent of the owner, + * - SC_ERR_UNAVAILABLE if clock not applicable to this resource + * + * Refer to the [Clock List](@ref CLOCKS) for valid clock values. + */ +sc_err_t sc_pm_get_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, + sc_pm_clk_t clk, sc_pm_clk_parent_t *parent); + /* @} */ /*! @@ -310,6 +346,31 @@ sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, */ /*! + * This function is used to reset the system. Only the owner of the + * SC_R_SYSTEM resource can do this. + * + * @param[in] ipc IPC handle + * @param[in] type reset type + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_ERR_PARM if invalid type + * + * If this function returns, then the reset did not occur due to an + * invalid parameter. + */ +sc_err_t sc_pm_reset(sc_ipc_t ipc, sc_pm_reset_type_t type); + +/*! + * This function gets a caller's reset reason. + * + * @param[in] ipc IPC handle + * @param[out] reason pointer to return reset reason + */ +sc_err_t sc_pm_reset_reason(sc_ipc_t ipc, sc_pm_reset_reason_t *reason); + +/*! * This function is used to boot a partition. * * @param[in] ipc IPC handle @@ -317,6 +378,7 @@ sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, * @param[in] resource_cpu ID of the CPU resource to start * @param[in] boot_addr 64-bit boot address * @param[in] resource_mu ID of the MU that must be powered + * @param[in] resource_dev ID of the boot device that must be powered * * @return Returns an error code (SC_ERR_NONE = success). * @@ -327,7 +389,7 @@ sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, */ sc_err_t sc_pm_boot(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rsrc_t resource_cpu, sc_faddr_t boot_addr, - sc_rsrc_t resource_mu); + sc_rsrc_t resource_mu, sc_rsrc_t resource_dev); /*! * This function is used to reboot the caller's partition. @@ -351,32 +413,6 @@ sc_err_t sc_pm_boot(sc_ipc_t ipc, sc_rm_pt_t pt, void sc_pm_reboot(sc_ipc_t ipc, sc_pm_reset_type_t type); /*! - * This function gets a caller's reset reason. - * - * @param[in] ipc IPC handle - * @param[out] reason pointer to return reset reason - */ -void sc_pm_reset_reason(sc_ipc_t ipc, sc_pm_reset_reason_t *reason); - -/*! - * This function is used to start/stop a CPU. - * - * @param[in] ipc IPC handle - * @param[in] resource ID of the CPU resource - * @param[in] enable start if true; otherwise stop - * @param[in] address 64-bit boot address - * - * @return Returns an error code (SC_ERR_NONE = success). - * - * Return errors: - * - SC_ERR_PARM if invalid resource or address, - * - SC_ERR_NOACCESS if caller's partition is not the parent of the - * resource (CPU) owner - */ -sc_err_t sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, bool enable, - sc_faddr_t address); - -/*! * This function is used to reboot a partition. * * @param[in] ipc IPC handle @@ -408,21 +444,22 @@ sc_err_t sc_pm_reboot_partition(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pm_reset_type_t type); /*! - * This function is used to reset the system. Only the owner of the - * SC_R_SYSTEM resource can do this. + * This function is used to start/stop a CPU. * * @param[in] ipc IPC handle - * @param[in] type reset type + * @param[in] resource ID of the CPU resource + * @param[in] enable start if true; otherwise stop + * @param[in] address 64-bit boot address * * @return Returns an error code (SC_ERR_NONE = success). * * Return errors: - * - SC_ERR_PARM if invalid type - * - * If this function returns, then the reset did not occur due to an - * invalid parameter. + * - SC_ERR_PARM if invalid resource or address, + * - SC_ERR_NOACCESS if caller's partition is not the parent of the + * resource (CPU) owner */ -sc_err_t sc_pm_reset(sc_ipc_t ipc, sc_pm_reset_type_t type); +sc_err_t sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, bool enable, + sc_faddr_t address); /* @} */ diff --git a/plat/freescale/common/include/sci/svc/rm/api.h b/plat/freescale/common/include/sci/svc/rm/api.h index 887bf479..eb472414 100755..100644 --- a/plat/freescale/common/include/sci/svc/rm/api.h +++ b/plat/freescale/common/include/sci/svc/rm/api.h @@ -1,37 +1,14 @@ /* + * Copyright (C) 2016 Freescale Semiconductor, Inc. * Copyright 2017 NXP * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of NXP nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * SPDX-License-Identifier: GPL-2.0+ */ /*! * Header file containing the public API for the System Controller (SC) * Resource Management (RM) function. This includes functions for - * partitioning resources, pins, and memory regions. + * partitioning resources, pads, and memory regions. * * @addtogroup RM_SVC (SVC) Resource Management Service * @@ -53,20 +30,20 @@ * @name Defines for type widths */ /*@{*/ -#define SC_RM_PARTITION_W 5 //!< Width of sc_rm_pt_t -#define SC_RM_MEMREG_W 6 //!< Width of sc_rm_mr_t -#define SC_RM_DID_W 4 //!< Width of sc_rm_did_t -#define SC_RM_SID_W 6 //!< Width of sc_rm_sid_t -#define SC_RM_SPA_W 2 //!< Width of sc_rm_spa_t -#define SC_RM_PERM_W 3 //!< Width of sc_rm_perm_t +#define SC_RM_PARTITION_W 5 /*!< Width of sc_rm_pt_t */ +#define SC_RM_MEMREG_W 6 /*!< Width of sc_rm_mr_t */ +#define SC_RM_DID_W 4 /*!< Width of sc_rm_did_t */ +#define SC_RM_SID_W 6 /*!< Width of sc_rm_sid_t */ +#define SC_RM_SPA_W 2 /*!< Width of sc_rm_spa_t */ +#define SC_RM_PERM_W 3 /*!< Width of sc_rm_perm_t */ /*@}*/ /*! * @name Defines for ALL parameters */ /*@{*/ -#define SC_RM_PT_ALL UINT8_MAX //!< All partitions -#define SC_RM_MR_ALL UINT8_MAX //!< All memory regions +#define SC_RM_PT_ALL UINT8_MAX /*!< All partitions */ +#define SC_RM_MR_ALL UINT8_MAX /*!< All memory regions */ /*@}*/ /* Types */ @@ -97,10 +74,10 @@ typedef uint16_t sc_rm_sid_t; */ typedef enum sc_rm_spa_e { - SC_RM_SPA_PASSTHRU = 0, //!< Pass through (attribute driven by master) - SC_RM_SPA_PASSSID = 1, //!< Pass through and output on SID - SC_RM_SPA_ASSERT = 2, //!< Assert (force to be secure/privileged) - SC_RM_SPA_NEGATE = 3 //!< Negate (force to be non-secure/user) + SC_RM_SPA_PASSTHRU = 0, /*!< Pass through (attribute driven by master) */ + SC_RM_SPA_PASSSID = 1, /*!< Pass through and output on SID */ + SC_RM_SPA_ASSERT = 2, /*!< Assert (force to be secure/privileged) */ + SC_RM_SPA_NEGATE = 3 /*!< Negate (force to be non-secure/user) */ } sc_rm_spa_t; /*! @@ -109,14 +86,14 @@ typedef enum sc_rm_spa_e */ typedef enum sc_rm_perm_e { - SC_RM_PERM_NONE = 0, //!< No access - SC_RM_PERM_SEC_R = 1, //!< Secure RO - SC_RM_PERM_SECPRIV_RW = 2, //!< Secure privilege R/W - SC_RM_PERM_SEC_RW = 3, //!< Secure R/W - SC_RM_PERM_NSPRIV_R = 4, //!< Secure R/W, non-secure privilege RO - SC_RM_PERM_NS_R = 5, //!< Secure R/W, non-secure RO - SC_RM_PERM_NSPRIV_RW = 6, //!< Secure R/W, non-secure privilege R/W - SC_RM_PERM_FULL = 7 //!< Full access + SC_RM_PERM_NONE = 0, /*!< No access */ + SC_RM_PERM_SEC_R = 1, /*!< Secure RO */ + SC_RM_PERM_SECPRIV_RW = 2, /*!< Secure privilege R/W */ + SC_RM_PERM_SEC_RW = 3, /*!< Secure R/W */ + SC_RM_PERM_NSPRIV_R = 4, /*!< Secure R/W, non-secure privilege RO */ + SC_RM_PERM_NS_R = 5, /*!< Secure R/W, non-secure RO */ + SC_RM_PERM_NSPRIV_RW = 6, /*!< Secure R/W, non-secure privilege R/W */ + SC_RM_PERM_FULL = 7 /*!< Full access */ } sc_rm_perm_t; /* Functions */ @@ -175,12 +152,25 @@ sc_err_t sc_rm_partition_alloc(sc_ipc_t ipc, sc_rm_pt_t *pt, bool secure, * - SC_ERR_NOACCESS if caller's partition is not the parent of \a pt, * - SC_ERR_LOCKED if \a pt or caller's partition is locked * - * All resources, memory regions, and pins are assigned to the caller/parent. + * All resources, memory regions, and pads are assigned to the caller/parent. * The partition watchdog is disabled (even if locked). DID is freed. */ sc_err_t sc_rm_partition_free(sc_ipc_t ipc, sc_rm_pt_t pt); /*! + * This function returns the DID of a partition. + * + * @param[in] ipc IPC handle + * + * @return Returns the domain ID (DID) of the caller's partition. + * + * The DID is a SoC-specific internal ID used by the HW resource + * protection mechanism. It is only required by clients when using the + * SEMA42 module as the DID is sometimes connected to the master ID. + */ +sc_rm_did_t sc_rm_get_did(sc_ipc_t ipc); + +/*! * This function forces a partition to use a specific static DID. * * @param[in] ipc IPC handle @@ -213,7 +203,7 @@ sc_err_t sc_rm_partition_static(sc_ipc_t ipc, sc_rm_pt_t pt, * - SC_PARM if \a pt out of range, * - SC_ERR_NOACCESS if caller's partition is not the parent of \a pt * - * If a partition is locked it cannot be freed, have resources/pins assigned + * If a partition is locked it cannot be freed, have resources/pads assigned * to/from it, memory regions created/assigned, DID changed, or parent changed. */ sc_err_t sc_rm_partition_lock(sc_ipc_t ipc, sc_rm_pt_t pt); @@ -248,7 +238,7 @@ sc_err_t sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_pt_t pt_parent); /*! - * This function moves all movable resources/pins owned by a source partition + * This function moves all movable resources/pads owned by a source partition * to a destination partition. It can be used to more quickly set up a new * partition if a majority of the caller's resources are to be moved to a * new partition. @@ -259,7 +249,7 @@ sc_err_t sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt, * @param[in] pt_dst handle of partition to which resources should be * moved to * @param[in] move_rsrc boolean to indicate if resources should be moved - * @param[in] move_pins boolean to indicate if pins should be moved + * @param[in] move_pads boolean to indicate if pads should be moved * * @return Returns an error code (SC_ERR_NONE = success). * @@ -275,7 +265,7 @@ sc_err_t sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt, * - SC_ERR_LOCKED if either partition is locked */ sc_err_t sc_rm_move_all(sc_ipc_t ipc, sc_rm_pt_t pt_src, sc_rm_pt_t pt_dst, - bool move_rsrc, bool move_pins); + bool move_rsrc, bool move_pads); /* @} */ @@ -576,63 +566,63 @@ sc_err_t sc_rm_get_memreg_info(sc_ipc_t ipc, sc_rm_mr_t mr, /* @} */ /*! - * @name Pin Functions + * @name Pad Functions * @{ */ /*! - * This function assigns ownership of a pin to a partition. + * This function assigns ownership of a pad to a partition. * * @param[in] ipc IPC handle - * @param[in] pt handle of partition to which pin should + * @param[in] pt handle of partition to which pad should * be assigned - * @param[in] pin pin to assign + * @param[in] pad pad to assign * * @return Returns an error code (SC_ERR_NONE = success). * * Return errors: * - SC_ERR_NOACCESS if caller's partition is restricted, * - SC_PARM if arguments out of range or invalid, - * - SC_ERR_NOACCESS if caller's partition is not the pin owner or parent + * - SC_ERR_NOACCESS if caller's partition is not the pad owner or parent * of the owner, * - SC_ERR_LOCKED if the owning partition or \a pt is locked */ -sc_err_t sc_rm_assign_pin(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pin_t pin); +sc_err_t sc_rm_assign_pad(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pad_t pad); /*! - * This function flags pins as movable or not. + * This function flags pads as movable or not. * * @param[in] ipc IPC handle - * @param[in] pin_fst first pin for which flag should be set - * @param[in] pin_lst last pin for which flag should be set + * @param[in] pad_fst first pad for which flag should be set + * @param[in] pad_lst last pad for which flag should be set * @param[in] movable movable flag (true) is movable * * @return Returns an error code (SC_ERR_NONE = success). * * Return errors: - * - SC_PARM if pins are out of range, - * - SC_ERR_NOACCESS if caller's partition is not a parent of a pin owner, + * - SC_PARM if pads are out of range, + * - SC_ERR_NOACCESS if caller's partition is not a parent of a pad owner, * - SC_ERR_LOCKED if the owning partition is locked * - * This function is used to determine the set of pins that will be - * moved using the sc_rm_move_all() function. All pins are movable + * This function is used to determine the set of pads that will be + * moved using the sc_rm_move_all() function. All pads are movable * by default so this function is normally used to prevent a set of - * pins from moving. + * pads from moving. */ -sc_err_t sc_rm_set_pin_movable(sc_ipc_t ipc, sc_pin_t pin_fst, - sc_pin_t pin_lst, bool movable); +sc_err_t sc_rm_set_pad_movable(sc_ipc_t ipc, sc_pad_t pad_fst, + sc_pad_t pad_lst, bool movable); /*! - * This function gets ownership status of a pin. + * This function gets ownership status of a pad. * * @param[in] ipc IPC handle - * @param[in] pin pin to check + * @param[in] pad pad to check * - * @return Returns a boolean (true if caller's partition owns the pin). + * @return Returns a boolean (true if caller's partition owns the pad). * - * If \a pin is out of range then false is returned. + * If \a pad is out of range then false is returned. */ -bool sc_rm_is_pin_owned(sc_ipc_t ipc, sc_pin_t pin); +bool sc_rm_is_pad_owned(sc_ipc_t ipc, sc_pad_t pad); /* @} */ diff --git a/plat/freescale/common/include/sci/types.h b/plat/freescale/common/include/sci/types.h index aac8bd89..f1e6f638 100755..100644 --- a/plat/freescale/common/include/sci/types.h +++ b/plat/freescale/common/include/sci/types.h @@ -1,31 +1,8 @@ /* + * Copyright (C) 2016 Freescale Semiconductor, Inc. * Copyright 2017 NXP * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of NXP nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * SPDX-License-Identifier: GPL-2.0+ */ /*! @@ -45,96 +22,109 @@ * @name Defines for common frequencies */ /*@{*/ -#define SC_32KHZ 32768 //!< 32KHz -#define SC_10MHZ 10000000 //!< 10MHz -#define SC_20MHZ 20000000 //!< 20MHz -#define SC_25MHZ 25000000 //!< 25MHz -#define SC_40MHZ 40000000 //!< 40MHz -#define SC_50MHZ 50000000 //!< 50MHz -#define SC_60MHZ 60000000 //!< 60MHz -#define SC_66MHZ 66666666 //!< 66MHz -#define SC_80MHZ 80000000 //!< 80MHz -#define SC_83MHZ 83333333 //!< 83MHz -#define SC_100MHZ 100000000 //!< 100MHz -#define SC_125MHZ 125000000 //!< 125MHz -#define SC_133MHZ 133333333 //!< 133MHz -#define SC_150MHZ 150000000 //!< 150MHz -#define SC_160MHZ 160000000 //!< 160MHz -#define SC_166MHZ 166666666 //!< 160MHz -#define SC_175MHZ 175000000 //!< 175MHz -#define SC_200MHZ 200000000 //!< 200MHz -#define SC_250MHZ 250000000 //!< 250MHz -#define SC_266MHZ 266666666 //!< 266MHz -#define SC_300MHZ 300000000 //!< 300MHz -#define SC_320MHZ 320000000 //!< 320MHz -#define SC_325MHZ 325000000 //!< 325MHz -#define SC_333MHZ 333333333 //!< 333MHz -#define SC_350MHZ 350000000 //!< 350MHz -#define SC_375MHZ 375000000 //!< 375MHz -#define SC_400MHZ 400000000 //!< 400MHz -#define SC_500MHZ 500000000 //!< 500MHz -#define SC_650MHZ 650000000 //!< 650MHz -#define SC_667MHZ 666666667 //!< 667MHz -#define SC_700MHZ 700000000 //!< 700MHz -#define SC_720MHZ 720000000 //!< 720MHz -#define SC_750MHZ 750000000 //!< 750MHz -#define SC_800MHZ 800000000 //!< 800MHz -#define SC_1000MHZ 1000000000 //!< 1GHz -#define SC_1300MHZ 1300000000 //!< 1.3GHz -#define SC_1400MHZ 1400000000 //!< 1.4GHz -#define SC_1500MHZ 1500000000 //!< 1.5GHz -#define SC_1600MHZ 1600000000 //!< 1.6GHz -#define SC_1800MHZ 1800000000 //!< 1.8GHz -#define SC_2000MHZ 2000000000 //!< 2.0GHz +#define SC_32KHZ 32768 /*!< 32KHz */ +#define SC_10MHZ 10000000 /*!< 10MHz */ +#define SC_20MHZ 20000000 /*!< 20MHz */ +#define SC_25MHZ 25000000 /*!< 25MHz */ +#define SC_40MHZ 40000000 /*!< 40MHz */ +#define SC_45MHZ 45000000 /*!< 45MHz */ +#define SC_50MHZ 50000000 /*!< 50MHz */ +#define SC_60MHZ 60000000 /*!< 60MHz */ +#define SC_66MHZ 66666666 /*!< 66MHz */ +#define SC_74MHZ 74250000 /*!< 74.25MHz */ +#define SC_80MHZ 80000000 /*!< 80MHz */ +#define SC_83MHZ 83333333 /*!< 83MHz */ +#define SC_84MHZ 84375000 /*!< 84.37MHz */ +#define SC_100MHZ 100000000 /*!< 100MHz */ +#define SC_125MHZ 125000000 /*!< 125MHz */ +#define SC_133MHZ 133333333 /*!< 133MHz */ +#define SC_135MHZ 135000000 /*!< 135MHz */ +#define SC_150MHZ 150000000 /*!< 150MHz */ +#define SC_160MHZ 160000000 /*!< 160MHz */ +#define SC_166MHZ 166666666 /*!< 160MHz */ +#define SC_175MHZ 175000000 /*!< 175MHz */ +#define SC_180MHZ 180000000 /*!< 180MHz */ +#define SC_200MHZ 200000000 /*!< 200MHz */ +#define SC_250MHZ 250000000 /*!< 250MHz */ +#define SC_266MHZ 266666666 /*!< 266MHz */ +#define SC_300MHZ 300000000 /*!< 300MHz */ +#define SC_320MHZ 320000000 /*!< 320MHz */ +#define SC_325MHZ 325000000 /*!< 325MHz */ +#define SC_333MHZ 333333333 /*!< 333MHz */ +#define SC_350MHZ 350000000 /*!< 350MHz */ +#define SC_375MHZ 375000000 /*!< 375MHz */ +#define SC_400MHZ 400000000 /*!< 400MHz */ +#define SC_500MHZ 500000000 /*!< 500MHz */ +#define SC_594MHZ 594000000 /*!< 594MHz */ +#define SC_650MHZ 650000000 /*!< 650MHz */ +#define SC_667MHZ 666666667 /*!< 667MHz */ +#define SC_675MHZ 675000000 /*!< 675MHz */ +#define SC_700MHZ 700000000 /*!< 700MHz */ +#define SC_720MHZ 720000000 /*!< 720MHz */ +#define SC_750MHZ 750000000 /*!< 750MHz */ +#define SC_800MHZ 800000000 /*!< 800MHz */ +#define SC_900MHZ 900000000 /*!< 900MHz */ +#define SC_1000MHZ 1000000000 /*!< 1GHz */ +#define SC_1056MHZ 1056000000 /*!< 1.056GHz */ +#define SC_1188MHZ 1188000000 /*!< 1.188GHz */ +#define SC_1300MHZ 1300000000 /*!< 1.3GHz */ +#define SC_1400MHZ 1400000000 /*!< 1.4GHz */ +#define SC_1500MHZ 1500000000 /*!< 1.5GHz */ +#define SC_1600MHZ 1600000000 /*!< 1.6GHz */ +#define SC_1800MHZ 1800000000 /*!< 1.8GHz */ +#define SC_2000MHZ 2000000000 /*!< 2.0GHz */ +#define SC_2112MHZ 2112000000 /*!< 2.12GHz */ + /*@}*/ /*! * @name Defines for 24M related frequencies */ /*@{*/ -#define SC_12MHZ 12000000 //!< 12MHz -#define SC_19MHZ 19800000 //!< 19.8MHz -#define SC_24MHZ 24000000 //!< 24MHz -#define SC_120MHZ 120000000 //!< 120MHz -#define SC_132MHZ 132000000 //!< 132MHz -#define SC_192MHZ 192000000 //!< 192MHz -#define SC_211MHZ 211200000 //!< 211.2MHz -#define SC_240MHZ 240000000 //!< 240MHz -#define SC_264MHZ 264000000 //!< 264MHz -#define SC_352MHZ 352000000 //!< 352MHz -#define SC_360MHZ 360000000 //!< 360MHz -#define SC_384MHZ 384000000 //!< 384MHz -#define SC_396MHZ 396000000 //!< 396MHz -#define SC_480MHZ 480000000 //!< 480MHz -#define SC_600MHZ 600000000 //!< 600MHz -#define SC_792MHZ 792000000 //!< 792MHz -#define SC_960MHZ 960000000 //!< 960MHz -#define SC_1056MHZ 1056000000 //!< 1056MHz -#define SC_1200MHZ 1200000000 //!< 1.2GHz -#define SC_2400MHZ 2400000000 //!< 2.4GHz +#define SC_12MHZ 12000000 /*!< 12MHz */ +#define SC_19MHZ 19800000 /*!< 19.8MHz */ +#define SC_24MHZ 24000000 /*!< 24MHz */ +#define SC_120MHZ 120000000 /*!< 120MHz */ +#define SC_132MHZ 132000000 /*!< 132MHz */ +#define SC_192MHZ 192000000 /*!< 192MHz */ +#define SC_211MHZ 211200000 /*!< 211.2MHz */ +#define SC_240MHZ 240000000 /*!< 240MHz */ +#define SC_264MHZ 264000000 /*!< 264MHz */ +#define SC_352MHZ 352000000 /*!< 352MHz */ +#define SC_360MHZ 360000000 /*!< 360MHz */ +#define SC_384MHZ 384000000 /*!< 384MHz */ +#define SC_396MHZ 396000000 /*!< 396MHz */ +#define SC_480MHZ 480000000 /*!< 480MHz */ +#define SC_600MHZ 600000000 /*!< 600MHz */ +#define SC_744MHZ 744000000 /*!< 744MHz */ +#define SC_792MHZ 792000000 /*!< 792MHz */ +#define SC_960MHZ 960000000 /*!< 960MHz */ +#define SC_1056MHZ 1056000000 /*!< 1056MHz */ +#define SC_1200MHZ 1200000000 /*!< 1.2GHz */ +#define SC_2400MHZ 2400000000 /*!< 2.4GHz */ /*@}*/ /*! * @name Defines for A/V related frequencies */ /*@{*/ -#define SC_62MHZ 62937500 //!< 62.9375MHz -#define SC_755MHZ 755250000 //!< 755.25MHz +#define SC_62MHZ 62937500 /*!< 62.9375MHz */ +#define SC_755MHZ 755250000 /*!< 755.25MHz */ /*@}*/ /*! * @name Defines for type widths */ /*@{*/ -#define SC_FADDR_W 36 //!< Width of sc_faddr_t -#define SC_BOOL_W 1 //!< Width of bool -#define SC_ERR_W 4 //!< Width of sc_err_t -#define SC_RSRC_W 10 //!< Width of sc_rsrc_t -#define SC_CTRL_W 5 //!< Width of sc_ctrl_t +#define SC_FADDR_W 36 /*!< Width of sc_faddr_t */ +#define SC_BOOL_W 1 /*!< Width of bool */ +#define SC_ERR_W 4 /*!< Width of sc_err_t */ +#define SC_RSRC_W 10 /*!< Width of sc_rsrc_t */ +#define SC_CTRL_W 6 /*!< Width of sc_ctrl_t */ /*@}*/ -#define SC_R_ALL UINT16_MAX //!< All resources -#define SC_P_ALL UINT16_MAX //!< All pins +#define SC_R_ALL UINT16_MAX /*!< All resources */ +#define SC_P_ALL UINT16_MAX /*!< All pads */ /*! * This type is used to store a system (full-size) address. @@ -146,16 +136,17 @@ typedef uint64_t sc_faddr_t; */ typedef enum sc_err_e { - SC_ERR_NONE = 0, //!< Success - SC_ERR_VERSION = 1, //!< Incompatible API version - SC_ERR_CONFIG = 2, //!< Configuration error - SC_ERR_PARM = 3, //!< Bad parameter - SC_ERR_NOACCESS = 4, //!< Permission error (no access) - SC_ERR_LOCKED = 5, //!< Permission error (locked) - SC_ERR_UNAVAILABLE = 6, //!< Unavailable (out of resources) - SC_ERR_NOTFOUND = 7, //!< Not found - SC_ERR_NOPOWER = 8, //!< No power - SC_ERR_IPC = 9, //!< Generic IPC error + SC_ERR_NONE = 0, /*!< Success */ + SC_ERR_VERSION = 1, /*!< Incompatible API version */ + SC_ERR_CONFIG = 2, /*!< Configuration error */ + SC_ERR_PARM = 3, /*!< Bad parameter */ + SC_ERR_NOACCESS = 4, /*!< Permission error (no access) */ + SC_ERR_LOCKED = 5, /*!< Permission error (locked) */ + SC_ERR_UNAVAILABLE = 6, /*!< Unavailable (out of resources) */ + SC_ERR_NOTFOUND = 7, /*!< Not found */ + SC_ERR_NOPOWER = 8, /*!< No power */ + SC_ERR_IPC = 9, /*!< Generic IPC error */ + SC_ERR_BUSY = 10, /*!< Resource is currently busy/active */ SC_ERR_LAST } sc_err_t; @@ -574,9 +565,9 @@ typedef enum sc_rsrc_e SC_R_CSI_1_PWM_0 = 405, SC_R_CSI_1_I2C_0 = 406, SC_R_HDMI = 407, - SC_R_HDMI_BYPASS = 408, + SC_R_HDMI_I2S = 408, SC_R_HDMI_I2C_0 = 409, - SC_R_AUDIO_PLL_2 = 410, + SC_R_HDMI_PLL_0 = 410, SC_R_HDMI_RX = 411, SC_R_HDMI_RX_BYPASS = 412, SC_R_HDMI_RX_I2C_0 = 413, @@ -680,6 +671,16 @@ typedef enum sc_rsrc_e SC_R_A35_3 = 511, SC_R_HIFI = 512, SC_R_HIFI_RAM = 513, + SC_R_CAAM_JR1_OUT = 514, + SC_R_CAAM_JR2_OUT = 515, + SC_R_CAAM_JR3_OUT = 516, + SC_R_VPU_DEC = 517, + SC_R_VPU_ENC = 518, + SC_R_CAAM_JR0 = 519, + SC_R_CAAM_JR0_OUT = 520, + SC_R_PMIC_2 = 521, + SC_R_DBLOGIC = 522, + SC_R_HDMI_PLL_1 = 523, SC_R_LAST } sc_rsrc_t; @@ -718,15 +719,25 @@ typedef enum sc_ctrl_e SC_C_DISABLE_50 = 26, SC_C_DISABLE_125 = 27, SC_C_SEL_125 = 28, + SC_C_MODE = 29, + SC_C_SYNC_CTRL0 = 30, + SC_C_KACHUNK_CNT = 31, + SC_C_KACHUNK_SEL = 32, + SC_C_SYNC_CTRL1 = 33, + SC_C_DPI_RESET = 34, + SC_C_MIPI_RESET = 35, + SC_C_DUAL_MODE = 36, + SC_C_VOLTAGE = 37, + SC_C_PXL_LINK_SEL = 38, SC_C_LAST } sc_ctrl_t; /*! - * This type is used to indicate a pin. Valid values are SoC specific. + * This type is used to indicate a pad. Valid values are SoC specific. * - * Refer to the SoC [Pin List](@ref PINS) for valid pin values. + * Refer to the SoC [Pad List](@ref PADS) for valid pad values. */ -typedef uint16_t sc_pin_t; +typedef uint16_t sc_pad_t; /* Extra documentation of standard types */ diff --git a/plat/freescale/common/sci/ipc.c b/plat/freescale/common/sci/ipc.c index e1650d25..664350bd 100755..100644 --- a/plat/freescale/common/sci/ipc.c +++ b/plat/freescale/common/sci/ipc.c @@ -96,7 +96,7 @@ void sc_ipc_read(sc_ipc_t ipc, void *data) /* Read remaining words */ while (count < msg->size) { MU_ReceiveMsg(base, count % MU_RR_COUNT, - &(msg->DATA.d32[count - 1])); + &(msg->DATA.u32[count - 1])); count++; } } @@ -122,7 +122,7 @@ void sc_ipc_write(sc_ipc_t ipc, void *data) /* Write remaining words */ while (count < msg->size) { MU_SendMessage(base, count % MU_TR_COUNT, - msg->DATA.d32[count - 1]); + msg->DATA.u32[count - 1]); count++; } } diff --git a/plat/freescale/common/sci/svc/pad/pad_rpc_clnt.c b/plat/freescale/common/sci/svc/pad/pad_rpc_clnt.c index 3bc7740b..4b0ef948 100644 --- a/plat/freescale/common/sci/svc/pad/pad_rpc_clnt.c +++ b/plat/freescale/common/sci/svc/pad/pad_rpc_clnt.c @@ -1,31 +1,8 @@ /* + * Copyright (C) 2016 Freescale Semiconductor, Inc. * Copyright 2017 NXP * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of NXP nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * SPDX-License-Identifier: GPL-2.0+ */ /*! @@ -51,7 +28,7 @@ /* Local Functions */ -sc_err_t sc_pad_set_mux(sc_ipc_t ipc, sc_pin_t pin, +sc_err_t sc_pad_set_mux(sc_ipc_t ipc, sc_pad_t pad, uint8_t mux, sc_pad_config_t config, sc_pad_iso_t iso) { sc_rpc_msg_t msg; @@ -60,10 +37,10 @@ sc_err_t sc_pad_set_mux(sc_ipc_t ipc, sc_pin_t pin, RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PAD; RPC_FUNC(&msg) = PAD_FUNC_SET_MUX; - RPC_D16(&msg, 0) = pin; - RPC_D8(&msg, 2) = mux; - RPC_D8(&msg, 3) = config; - RPC_D8(&msg, 4) = iso; + RPC_U16(&msg, 0) = pad; + RPC_U8(&msg, 2) = mux; + RPC_U8(&msg, 3) = config; + RPC_U8(&msg, 4) = iso; RPC_SIZE(&msg) = 3; sc_call_rpc(ipc, &msg, false); @@ -72,40 +49,40 @@ sc_err_t sc_pad_set_mux(sc_ipc_t ipc, sc_pin_t pin, return (sc_err_t) result; } -sc_err_t sc_pad_set_gp(sc_ipc_t ipc, sc_pin_t pin, uint32_t ctrl) +sc_err_t sc_pad_get_mux(sc_ipc_t ipc, sc_pad_t pad, + uint8_t *mux, sc_pad_config_t *config, sc_pad_iso_t *iso) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = PAD_FUNC_SET_GP; - RPC_D32(&msg, 0) = ctrl; - RPC_D16(&msg, 4) = pin; - RPC_SIZE(&msg) = 3; + RPC_FUNC(&msg) = PAD_FUNC_GET_MUX; + RPC_U16(&msg, 0) = pad; + RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); result = RPC_R8(&msg); + if (mux != NULL) + *mux = RPC_U8(&msg, 0); + if (config != NULL) + *config = RPC_U8(&msg, 1); + if (iso != NULL) + *iso = RPC_U8(&msg, 2); return (sc_err_t) result; } -sc_err_t sc_pad_set_gp_28lpp(sc_ipc_t ipc, sc_pin_t pin, - sc_pad_28lpp_dse_t dse, bool sre, bool hys, bool pe, - sc_pad_28lpp_ps_t ps) +sc_err_t sc_pad_set_gp(sc_ipc_t ipc, sc_pad_t pad, uint32_t ctrl) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = PAD_FUNC_SET_GP_28LPP; - RPC_D16(&msg, 0) = pin; - RPC_D8(&msg, 2) = dse; - RPC_D8(&msg, 3) = ps; - RPC_D8(&msg, 4) = sre; - RPC_D8(&msg, 5) = hys; - RPC_D8(&msg, 6) = pe; + RPC_FUNC(&msg) = PAD_FUNC_SET_GP; + RPC_U32(&msg, 0) = ctrl; + RPC_U16(&msg, 4) = pad; RPC_SIZE(&msg) = 3; sc_call_rpc(ipc, &msg, false); @@ -114,27 +91,26 @@ sc_err_t sc_pad_set_gp_28lpp(sc_ipc_t ipc, sc_pin_t pin, return (sc_err_t) result; } -sc_err_t sc_pad_set_wakeup(sc_ipc_t ipc, sc_pin_t pin, - sc_pad_wakeup_t wakeup) +sc_err_t sc_pad_get_gp(sc_ipc_t ipc, sc_pad_t pad, uint32_t *ctrl) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = PAD_FUNC_SET_WAKEUP; - RPC_D16(&msg, 0) = pin; - RPC_D8(&msg, 2) = wakeup; + RPC_FUNC(&msg) = PAD_FUNC_GET_GP; + RPC_U16(&msg, 0) = pad; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); + if (ctrl != NULL) + *ctrl = RPC_U32(&msg, 0); result = RPC_R8(&msg); return (sc_err_t) result; } -sc_err_t sc_pad_set_all(sc_ipc_t ipc, sc_pin_t pin, uint8_t mux, - sc_pad_config_t config, sc_pad_iso_t iso, uint32_t ctrl, +sc_err_t sc_pad_set_wakeup(sc_ipc_t ipc, sc_pad_t pad, sc_pad_wakeup_t wakeup) { sc_rpc_msg_t msg; @@ -142,14 +118,10 @@ sc_err_t sc_pad_set_all(sc_ipc_t ipc, sc_pin_t pin, uint8_t mux, RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = PAD_FUNC_SET_ALL; - RPC_D32(&msg, 0) = ctrl; - RPC_D16(&msg, 4) = pin; - RPC_D8(&msg, 6) = mux; - RPC_D8(&msg, 7) = config; - RPC_D8(&msg, 8) = iso; - RPC_D8(&msg, 9) = wakeup; - RPC_SIZE(&msg) = 4; + RPC_FUNC(&msg) = PAD_FUNC_SET_WAKEUP; + RPC_U16(&msg, 0) = pad; + RPC_U8(&msg, 2) = wakeup; + RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -157,140 +129,133 @@ sc_err_t sc_pad_set_all(sc_ipc_t ipc, sc_pin_t pin, uint8_t mux, return (sc_err_t) result; } -sc_err_t sc_pad_get_mux(sc_ipc_t ipc, sc_pin_t pin, - uint8_t *mux, sc_pad_config_t *config, sc_pad_iso_t *iso) +sc_err_t sc_pad_get_wakeup(sc_ipc_t ipc, sc_pad_t pad, + sc_pad_wakeup_t *wakeup) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = PAD_FUNC_GET_MUX; - RPC_D16(&msg, 0) = pin; + RPC_FUNC(&msg) = PAD_FUNC_GET_WAKEUP; + RPC_U16(&msg, 0) = pad; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); result = RPC_R8(&msg); - if (mux != NULL) - *mux = RPC_D8(&msg, 0); - if (config != NULL) - *config = RPC_D8(&msg, 1); - if (iso != NULL) - *iso = RPC_D8(&msg, 2); + if (wakeup != NULL) + *wakeup = RPC_U8(&msg, 0); return (sc_err_t) result; } -sc_err_t sc_pad_get_gp(sc_ipc_t ipc, sc_pin_t pin, uint32_t *ctrl) +sc_err_t sc_pad_set_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t mux, + sc_pad_config_t config, sc_pad_iso_t iso, uint32_t ctrl, + sc_pad_wakeup_t wakeup) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = PAD_FUNC_GET_GP; - RPC_D16(&msg, 0) = pin; - RPC_SIZE(&msg) = 2; + RPC_FUNC(&msg) = PAD_FUNC_SET_ALL; + RPC_U32(&msg, 0) = ctrl; + RPC_U16(&msg, 4) = pad; + RPC_U8(&msg, 6) = mux; + RPC_U8(&msg, 7) = config; + RPC_U8(&msg, 8) = iso; + RPC_U8(&msg, 9) = wakeup; + RPC_SIZE(&msg) = 4; sc_call_rpc(ipc, &msg, false); - if (ctrl != NULL) - *ctrl = RPC_D32(&msg, 0); result = RPC_R8(&msg); return (sc_err_t) result; } -sc_err_t sc_pad_get_gp_28lpp(sc_ipc_t ipc, sc_pin_t pin, - sc_pad_28lpp_dse_t *dse, bool *sre, bool *hys, bool *pe, - sc_pad_28lpp_ps_t *ps) +sc_err_t sc_pad_get_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t *mux, + sc_pad_config_t *config, sc_pad_iso_t *iso, uint32_t *ctrl, + sc_pad_wakeup_t *wakeup) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = PAD_FUNC_GET_GP_28LPP; - RPC_D16(&msg, 0) = pin; + RPC_FUNC(&msg) = PAD_FUNC_GET_ALL; + RPC_U16(&msg, 0) = pad; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); + if (ctrl != NULL) + *ctrl = RPC_U32(&msg, 0); result = RPC_R8(&msg); - if (dse != NULL) - *dse = RPC_D8(&msg, 0); - if (ps != NULL) - *ps = RPC_D8(&msg, 1); - if (sre != NULL) - *sre = RPC_D8(&msg, 2); - if (hys != NULL) - *hys = RPC_D8(&msg, 3); - if (pe != NULL) - *pe = RPC_D8(&msg, 4); + if (mux != NULL) + *mux = RPC_U8(&msg, 4); + if (config != NULL) + *config = RPC_U8(&msg, 5); + if (iso != NULL) + *iso = RPC_U8(&msg, 6); + if (wakeup != NULL) + *wakeup = RPC_U8(&msg, 7); return (sc_err_t) result; } -sc_err_t sc_pad_get_wakeup(sc_ipc_t ipc, sc_pin_t pin, - sc_pad_wakeup_t *wakeup) +sc_err_t sc_pad_set(sc_ipc_t ipc, sc_pad_t pad, uint32_t val) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = PAD_FUNC_GET_WAKEUP; - RPC_D16(&msg, 0) = pin; - RPC_SIZE(&msg) = 2; + RPC_FUNC(&msg) = PAD_FUNC_SET; + RPC_U32(&msg, 0) = val; + RPC_U16(&msg, 4) = pad; + RPC_SIZE(&msg) = 3; sc_call_rpc(ipc, &msg, false); result = RPC_R8(&msg); - if (wakeup != NULL) - *wakeup = RPC_D8(&msg, 0); return (sc_err_t) result; } -sc_err_t sc_pad_get_all(sc_ipc_t ipc, sc_pin_t pin, uint8_t *mux, - sc_pad_config_t *config, sc_pad_iso_t *iso, uint32_t *ctrl, - sc_pad_wakeup_t *wakeup) +sc_err_t sc_pad_get(sc_ipc_t ipc, sc_pad_t pad, uint32_t *val) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = PAD_FUNC_GET_ALL; - RPC_D16(&msg, 0) = pin; + RPC_FUNC(&msg) = PAD_FUNC_GET; + RPC_U16(&msg, 0) = pad; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); - if (ctrl != NULL) - *ctrl = RPC_D32(&msg, 0); + if (val != NULL) + *val = RPC_U32(&msg, 0); result = RPC_R8(&msg); - if (mux != NULL) - *mux = RPC_D8(&msg, 4); - if (config != NULL) - *config = RPC_D8(&msg, 5); - if (iso != NULL) - *iso = RPC_D8(&msg, 6); - if (wakeup != NULL) - *wakeup = RPC_D8(&msg, 7); return (sc_err_t) result; } -sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pin_t pin, - sc_pad_28fdsoi_dse_t dse, sc_pad_28fdsoi_ps_t ps) +sc_err_t sc_pad_set_gp_28lpp(sc_ipc_t ipc, sc_pad_t pad, + sc_pad_28lpp_dse_t dse, bool sre, bool hys, bool pe, + sc_pad_28lpp_ps_t ps) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = PAD_FUNC_SET_GP_28FDSOI; - RPC_D16(&msg, 0) = pin; - RPC_D8(&msg, 2) = dse; - RPC_D8(&msg, 3) = ps; - RPC_SIZE(&msg) = 2; + RPC_FUNC(&msg) = PAD_FUNC_SET_GP_28LPP; + RPC_U16(&msg, 0) = pad; + RPC_U8(&msg, 2) = dse; + RPC_U8(&msg, 3) = ps; + RPC_U8(&msg, 4) = sre; + RPC_U8(&msg, 5) = hys; + RPC_U8(&msg, 6) = pe; + RPC_SIZE(&msg) = 3; sc_call_rpc(ipc, &msg, false); @@ -298,45 +263,48 @@ sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pin_t pin, return (sc_err_t) result; } -sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pin_t pin, - sc_pad_28fdsoi_dse_t *dse, sc_pad_28fdsoi_ps_t *ps) +sc_err_t sc_pad_get_gp_28lpp(sc_ipc_t ipc, sc_pad_t pad, + sc_pad_28lpp_dse_t *dse, bool *sre, bool *hys, bool *pe, + sc_pad_28lpp_ps_t *ps) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = PAD_FUNC_GET_GP_28FDSOI; - RPC_D16(&msg, 0) = pin; + RPC_FUNC(&msg) = PAD_FUNC_GET_GP_28LPP; + RPC_U16(&msg, 0) = pad; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); result = RPC_R8(&msg); if (dse != NULL) - *dse = RPC_D8(&msg, 0); + *dse = RPC_U8(&msg, 0); if (ps != NULL) - *ps = RPC_D8(&msg, 1); + *ps = RPC_U8(&msg, 1); + if (sre != NULL) + *sre = RPC_U8(&msg, 2); + if (hys != NULL) + *hys = RPC_U8(&msg, 3); + if (pe != NULL) + *pe = RPC_U8(&msg, 4); return (sc_err_t) result; } -sc_err_t sc_pad_set_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pin_t pin, - uint8_t compen, bool fastfrz, uint8_t rasrcp, uint8_t rasrcn, - bool nasrc_sel) +sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad, + sc_pad_28fdsoi_dse_t dse, sc_pad_28fdsoi_ps_t ps) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = PAD_FUNC_SET_GP_28FDSOI_COMP; - RPC_D16(&msg, 0) = pin; - RPC_D8(&msg, 2) = compen; - RPC_D8(&msg, 3) = rasrcp; - RPC_D8(&msg, 4) = rasrcn; - RPC_D8(&msg, 5) = fastfrz; - RPC_D8(&msg, 6) = nasrc_sel; - RPC_SIZE(&msg) = 3; + RPC_FUNC(&msg) = PAD_FUNC_SET_GP_28FDSOI; + RPC_U16(&msg, 0) = pad; + RPC_U8(&msg, 2) = dse; + RPC_U8(&msg, 3) = ps; + RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -344,49 +312,44 @@ sc_err_t sc_pad_set_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pin_t pin, return (sc_err_t) result; } -sc_err_t sc_pad_get_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pin_t pin, - uint8_t *compen, bool *fastfrz, uint8_t *rasrcp, uint8_t *rasrcn, - bool *nasrc_sel, bool *compok, uint8_t *nasrc) +sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad, + sc_pad_28fdsoi_dse_t *dse, sc_pad_28fdsoi_ps_t *ps) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = PAD_FUNC_GET_GP_28FDSOI_COMP; - RPC_D16(&msg, 0) = pin; + RPC_FUNC(&msg) = PAD_FUNC_GET_GP_28FDSOI; + RPC_U16(&msg, 0) = pad; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); result = RPC_R8(&msg); - if (compen != NULL) - *compen = RPC_D8(&msg, 0); - if (rasrcp != NULL) - *rasrcp = RPC_D8(&msg, 1); - if (rasrcn != NULL) - *rasrcn = RPC_D8(&msg, 2); - if (nasrc != NULL) - *nasrc = RPC_D8(&msg, 3); - if (fastfrz != NULL) - *fastfrz = RPC_D8(&msg, 4); - if (nasrc_sel != NULL) - *nasrc_sel = RPC_D8(&msg, 5); - if (compok != NULL) - *compok = RPC_D8(&msg, 6); + if (dse != NULL) + *dse = RPC_U8(&msg, 0); + if (ps != NULL) + *ps = RPC_U8(&msg, 1); return (sc_err_t) result; } -sc_err_t sc_pad_set(sc_ipc_t ipc, sc_pin_t pin, uint32_t val) +sc_err_t sc_pad_set_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad, + uint8_t compen, bool fastfrz, uint8_t rasrcp, uint8_t rasrcn, + bool nasrc_sel) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = PAD_FUNC_SET; - RPC_D32(&msg, 0) = val; - RPC_D16(&msg, 4) = pin; + RPC_FUNC(&msg) = PAD_FUNC_SET_GP_28FDSOI_COMP; + RPC_U16(&msg, 0) = pad; + RPC_U8(&msg, 2) = compen; + RPC_U8(&msg, 3) = rasrcp; + RPC_U8(&msg, 4) = rasrcn; + RPC_U8(&msg, 5) = fastfrz; + RPC_U8(&msg, 6) = nasrc_sel; RPC_SIZE(&msg) = 3; sc_call_rpc(ipc, &msg, false); @@ -395,22 +358,36 @@ sc_err_t sc_pad_set(sc_ipc_t ipc, sc_pin_t pin, uint32_t val) return (sc_err_t) result; } -sc_err_t sc_pad_get(sc_ipc_t ipc, sc_pin_t pin, uint32_t *val) +sc_err_t sc_pad_get_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad, + uint8_t *compen, bool *fastfrz, uint8_t *rasrcp, uint8_t *rasrcn, + bool *nasrc_sel, bool *compok, uint8_t *nasrc) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = PAD_FUNC_GET; - RPC_D16(&msg, 0) = pin; + RPC_FUNC(&msg) = PAD_FUNC_GET_GP_28FDSOI_COMP; + RPC_U16(&msg, 0) = pad; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); - if (val != NULL) - *val = RPC_D32(&msg, 0); result = RPC_R8(&msg); + if (compen != NULL) + *compen = RPC_U8(&msg, 0); + if (rasrcp != NULL) + *rasrcp = RPC_U8(&msg, 1); + if (rasrcn != NULL) + *rasrcn = RPC_U8(&msg, 2); + if (nasrc != NULL) + *nasrc = RPC_U8(&msg, 3); + if (fastfrz != NULL) + *fastfrz = RPC_U8(&msg, 4); + if (nasrc_sel != NULL) + *nasrc_sel = RPC_U8(&msg, 5); + if (compok != NULL) + *compok = RPC_U8(&msg, 6); return (sc_err_t) result; } diff --git a/plat/freescale/common/sci/svc/pad/rpc.h b/plat/freescale/common/sci/svc/pad/rpc.h index 25f2ce7e..f0f32aff 100644 --- a/plat/freescale/common/sci/svc/pad/rpc.h +++ b/plat/freescale/common/sci/svc/pad/rpc.h @@ -1,31 +1,8 @@ /* + * Copyright (C) 2016 Freescale Semiconductor, Inc. * Copyright 2017 NXP * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of NXP nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * SPDX-License-Identifier: GPL-2.0+ */ /*! @@ -49,23 +26,23 @@ */ typedef enum pad_func_e { - PAD_FUNC_UNKNOWN, //!< Unknown function - PAD_FUNC_SET_MUX, //!< Index for pad_set_mux() RPC call - PAD_FUNC_SET_GP, //!< Index for pad_set_gp() RPC call - PAD_FUNC_SET_GP_28LPP, //!< Index for pad_set_gp_28lpp() RPC call - PAD_FUNC_SET_WAKEUP, //!< Index for pad_set_wakeup() RPC call - PAD_FUNC_SET_ALL, //!< Index for pad_set_all() RPC call - PAD_FUNC_GET_MUX, //!< Index for pad_get_mux() RPC call - PAD_FUNC_GET_GP, //!< Index for pad_get_gp() RPC call - PAD_FUNC_GET_GP_28LPP, //!< Index for pad_get_gp_28lpp() RPC call - PAD_FUNC_GET_WAKEUP, //!< Index for pad_get_wakeup() RPC call - PAD_FUNC_GET_ALL, //!< Index for pad_get_all() RPC call - PAD_FUNC_SET_GP_28FDSOI, //!< Index for pad_set_gp_28fdsoi() RPC call - PAD_FUNC_GET_GP_28FDSOI, //!< Index for pad_get_gp_28fdsoi() RPC call - PAD_FUNC_SET_GP_28FDSOI_COMP, //!< Index for pad_set_gp_28fdsoi_comp() RPC call - PAD_FUNC_GET_GP_28FDSOI_COMP, //!< Index for pad_get_gp_28fdsoi_comp() RPC call - PAD_FUNC_SET, //!< Index for pad_set() RPC call - PAD_FUNC_GET, //!< Index for pad_get() RPC call + PAD_FUNC_UNKNOWN = 0, /*!< Unknown function */ + PAD_FUNC_SET_MUX = 1, /*!< Index for pad_set_mux() RPC call */ + PAD_FUNC_GET_MUX = 6, /*!< Index for pad_get_mux() RPC call */ + PAD_FUNC_SET_GP = 2, /*!< Index for pad_set_gp() RPC call */ + PAD_FUNC_GET_GP = 7, /*!< Index for pad_get_gp() RPC call */ + PAD_FUNC_SET_WAKEUP = 4, /*!< Index for pad_set_wakeup() RPC call */ + PAD_FUNC_GET_WAKEUP = 9, /*!< Index for pad_get_wakeup() RPC call */ + PAD_FUNC_SET_ALL = 5, /*!< Index for pad_set_all() RPC call */ + PAD_FUNC_GET_ALL = 10, /*!< Index for pad_get_all() RPC call */ + PAD_FUNC_SET = 15, /*!< Index for pad_set() RPC call */ + PAD_FUNC_GET = 16, /*!< Index for pad_get() RPC call */ + PAD_FUNC_SET_GP_28LPP = 3, /*!< Index for pad_set_gp_28lpp() RPC call */ + PAD_FUNC_GET_GP_28LPP = 8, /*!< Index for pad_get_gp_28lpp() RPC call */ + PAD_FUNC_SET_GP_28FDSOI = 11, /*!< Index for pad_set_gp_28fdsoi() RPC call */ + PAD_FUNC_GET_GP_28FDSOI = 12, /*!< Index for pad_get_gp_28fdsoi() RPC call */ + PAD_FUNC_SET_GP_28FDSOI_COMP = 13, /*!< Index for pad_set_gp_28fdsoi_comp() RPC call */ + PAD_FUNC_GET_GP_28FDSOI_COMP = 14, /*!< Index for pad_get_gp_28fdsoi_comp() RPC call */ } pad_func_t; /* Functions */ diff --git a/plat/freescale/common/sci/svc/pm/pm_rpc_clnt.c b/plat/freescale/common/sci/svc/pm/pm_rpc_clnt.c index fc91fad1..96b93c1a 100755..100644 --- a/plat/freescale/common/sci/svc/pm/pm_rpc_clnt.c +++ b/plat/freescale/common/sci/svc/pm/pm_rpc_clnt.c @@ -1,31 +1,8 @@ /* + * Copyright (C) 2016 Freescale Semiconductor, Inc. * Copyright 2017 NXP * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of NXP nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * SPDX-License-Identifier: GPL-2.0+ */ /*! @@ -60,8 +37,8 @@ sc_err_t sc_pm_set_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt, RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PM; RPC_FUNC(&msg) = PM_FUNC_SET_SYS_POWER_MODE; - RPC_D8(&msg, 0) = pt; - RPC_D8(&msg, 1) = mode; + RPC_U8(&msg, 0) = pt; + RPC_U8(&msg, 1) = mode; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -79,14 +56,14 @@ sc_err_t sc_pm_get_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt, RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PM; RPC_FUNC(&msg) = PM_FUNC_GET_SYS_POWER_MODE; - RPC_D8(&msg, 0) = pt; + RPC_U8(&msg, 0) = pt; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); result = RPC_R8(&msg); if (mode != NULL) - *mode = RPC_D8(&msg, 0); + *mode = RPC_U8(&msg, 0); return (sc_err_t) result; } @@ -99,8 +76,8 @@ sc_err_t sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PM; RPC_FUNC(&msg) = PM_FUNC_SET_RESOURCE_POWER_MODE; - RPC_D16(&msg, 0) = resource; - RPC_D8(&msg, 2) = mode; + RPC_U16(&msg, 0) = resource; + RPC_U8(&msg, 2) = mode; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -118,14 +95,14 @@ sc_err_t sc_pm_get_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PM; RPC_FUNC(&msg) = PM_FUNC_GET_RESOURCE_POWER_MODE; - RPC_D16(&msg, 0) = resource; + RPC_U16(&msg, 0) = resource; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); result = RPC_R8(&msg); if (mode != NULL) - *mode = RPC_D8(&msg, 0); + *mode = RPC_U8(&msg, 0); return (sc_err_t) result; } @@ -138,14 +115,14 @@ sc_err_t sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PM; RPC_FUNC(&msg) = PM_FUNC_SET_CLOCK_RATE; - RPC_D32(&msg, 0) = *rate; - RPC_D16(&msg, 4) = resource; - RPC_D8(&msg, 6) = clk; + RPC_U32(&msg, 0) = *rate; + RPC_U16(&msg, 4) = resource; + RPC_U8(&msg, 6) = clk; RPC_SIZE(&msg) = 3; sc_call_rpc(ipc, &msg, false); - *rate = RPC_D32(&msg, 0); + *rate = RPC_U32(&msg, 0); result = RPC_R8(&msg); return (sc_err_t) result; } @@ -159,14 +136,14 @@ sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PM; RPC_FUNC(&msg) = PM_FUNC_GET_CLOCK_RATE; - RPC_D16(&msg, 0) = resource; - RPC_D8(&msg, 2) = clk; + RPC_U16(&msg, 0) = resource; + RPC_U8(&msg, 2) = clk; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); if (rate != NULL) - *rate = RPC_D32(&msg, 0); + *rate = RPC_U32(&msg, 0); result = RPC_R8(&msg); return (sc_err_t) result; } @@ -180,10 +157,10 @@ sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PM; RPC_FUNC(&msg) = PM_FUNC_CLOCK_ENABLE; - RPC_D16(&msg, 0) = resource; - RPC_D8(&msg, 2) = clk; - RPC_D8(&msg, 3) = enable; - RPC_D8(&msg, 4) = autog; + RPC_U16(&msg, 0) = resource; + RPC_U8(&msg, 2) = clk; + RPC_U8(&msg, 3) = enable; + RPC_U8(&msg, 4) = autog; RPC_SIZE(&msg) = 3; sc_call_rpc(ipc, &msg, false); @@ -192,22 +169,19 @@ sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, return (sc_err_t) result; } -sc_err_t sc_pm_boot(sc_ipc_t ipc, sc_rm_pt_t pt, - sc_rsrc_t resource_cpu, sc_faddr_t boot_addr, - sc_rsrc_t resource_mu) +sc_err_t sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, + sc_pm_clk_t clk, sc_pm_clk_parent_t parent) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PM; - RPC_FUNC(&msg) = PM_FUNC_BOOT; - RPC_D32(&msg, 0) = boot_addr >> 32; - RPC_D32(&msg, 4) = boot_addr; - RPC_D16(&msg, 8) = resource_cpu; - RPC_D16(&msg, 10) = resource_mu; - RPC_D8(&msg, 12) = pt; - RPC_SIZE(&msg) = 5; + RPC_FUNC(&msg) = PM_FUNC_SET_CLOCK_PARENT; + RPC_U16(&msg, 0) = resource; + RPC_U8(&msg, 2) = clk; + RPC_U8(&msg, 3) = parent; + RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -215,51 +189,79 @@ sc_err_t sc_pm_boot(sc_ipc_t ipc, sc_rm_pt_t pt, return (sc_err_t) result; } -void sc_pm_reboot(sc_ipc_t ipc, sc_pm_reset_type_t type) +sc_err_t sc_pm_get_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, + sc_pm_clk_t clk, sc_pm_clk_parent_t * parent) { sc_rpc_msg_t msg; + uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PM; - RPC_FUNC(&msg) = PM_FUNC_REBOOT; - RPC_D8(&msg, 0) = type; + RPC_FUNC(&msg) = PM_FUNC_GET_CLOCK_PARENT; + RPC_U16(&msg, 0) = resource; + RPC_U8(&msg, 2) = clk; RPC_SIZE(&msg) = 2; - sc_call_rpc(ipc, &msg, true); + sc_call_rpc(ipc, &msg, false); + + result = RPC_R8(&msg); + if (parent != NULL) + *parent = RPC_U8(&msg, 0); + return (sc_err_t)result; +} + +sc_err_t sc_pm_reset(sc_ipc_t ipc, sc_pm_reset_type_t type) +{ + sc_rpc_msg_t msg; + uint8_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = SC_RPC_SVC_PM; + RPC_FUNC(&msg) = PM_FUNC_RESET; + RPC_U8(&msg, 0) = type; + RPC_SIZE(&msg) = 2; + + sc_call_rpc(ipc, &msg, false); - return; + result = RPC_R8(&msg); + return (sc_err_t)result; } -void sc_pm_reset_reason(sc_ipc_t ipc, sc_pm_reset_reason_t *reason) +sc_err_t sc_pm_reset_reason(sc_ipc_t ipc, sc_pm_reset_reason_t *reason) { sc_rpc_msg_t msg; + uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PM; RPC_FUNC(&msg) = PM_FUNC_RESET_REASON; RPC_SIZE(&msg) = 1; - sc_call_rpc(ipc, &msg, true); + sc_call_rpc(ipc, &msg, false); + result = RPC_R8(&msg); if (reason != NULL) - *reason = RPC_D8(&msg, 0); - return; + *reason = RPC_U8(&msg, 0); + return (sc_err_t)result; } -sc_err_t sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, bool enable, - sc_faddr_t address) +sc_err_t sc_pm_boot(sc_ipc_t ipc, sc_rm_pt_t pt, + sc_rsrc_t resource_cpu, sc_faddr_t boot_addr, + sc_rsrc_t resource_mu, sc_rsrc_t resource_dev) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PM; - RPC_FUNC(&msg) = PM_FUNC_CPU_START; - RPC_D32(&msg, 0) = address >> 32; - RPC_D32(&msg, 4) = address; - RPC_D16(&msg, 8) = resource; - RPC_D8(&msg, 10) = enable; - RPC_SIZE(&msg) = 4; + RPC_FUNC(&msg) = PM_FUNC_BOOT; + RPC_U32(&msg, 0) = boot_addr >> 32; + RPC_U32(&msg, 4) = boot_addr; + RPC_U16(&msg, 8) = resource_cpu; + RPC_U16(&msg, 10) = resource_mu; + RPC_U16(&msg, 12) = resource_dev; + RPC_U8(&msg, 14) = pt; + RPC_SIZE(&msg) = 5; sc_call_rpc(ipc, &msg, false); @@ -267,6 +269,21 @@ sc_err_t sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, bool enable, return (sc_err_t) result; } +void sc_pm_reboot(sc_ipc_t ipc, sc_pm_reset_type_t type) +{ + sc_rpc_msg_t msg; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = SC_RPC_SVC_PM; + RPC_FUNC(&msg) = PM_FUNC_REBOOT; + RPC_U8(&msg, 0) = type; + RPC_SIZE(&msg) = 2; + + sc_call_rpc(ipc, &msg, true); + + return; +} + sc_err_t sc_pm_reboot_partition(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pm_reset_type_t type) { @@ -276,8 +293,8 @@ sc_err_t sc_pm_reboot_partition(sc_ipc_t ipc, sc_rm_pt_t pt, RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PM; RPC_FUNC(&msg) = PM_FUNC_REBOOT_PARTITION; - RPC_D8(&msg, 0) = pt; - RPC_D8(&msg, 1) = type; + RPC_U8(&msg, 0) = pt; + RPC_U8(&msg, 1) = type; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -286,16 +303,20 @@ sc_err_t sc_pm_reboot_partition(sc_ipc_t ipc, sc_rm_pt_t pt, return (sc_err_t) result; } -sc_err_t sc_pm_reset(sc_ipc_t ipc, sc_pm_reset_type_t type) +sc_err_t sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, bool enable, + sc_faddr_t address) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_PM; - RPC_FUNC(&msg) = PM_FUNC_RESET; - RPC_D8(&msg, 0) = type; - RPC_SIZE(&msg) = 2; + RPC_FUNC(&msg) = PM_FUNC_CPU_START; + RPC_U32(&msg, 0) = address >> 32; + RPC_U32(&msg, 4) = address; + RPC_U16(&msg, 8) = resource; + RPC_U8(&msg, 10) = enable; + RPC_SIZE(&msg) = 4; sc_call_rpc(ipc, &msg, false); diff --git a/plat/freescale/common/sci/svc/pm/rpc.h b/plat/freescale/common/sci/svc/pm/rpc.h index 2ce1b5c9..1f4235a2 100755..100644 --- a/plat/freescale/common/sci/svc/pm/rpc.h +++ b/plat/freescale/common/sci/svc/pm/rpc.h @@ -1,31 +1,8 @@ /* + * Copyright (C) 2016 Freescale Semiconductor, Inc. * Copyright 2017 NXP * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of NXP nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * SPDX-License-Identifier: GPL-2.0+ */ /*! @@ -49,20 +26,22 @@ */ typedef enum pm_func_e { - PM_FUNC_UNKNOWN, //!< Unknown function - PM_FUNC_SET_SYS_POWER_MODE, //!< Index for pm_set_sys_power_mode() RPC call - PM_FUNC_GET_SYS_POWER_MODE, //!< Index for pm_get_sys_power_mode() RPC call - PM_FUNC_SET_RESOURCE_POWER_MODE, //!< Index for pm_set_resource_power_mode() RPC call - PM_FUNC_GET_RESOURCE_POWER_MODE, //!< Index for pm_get_resource_power_mode() RPC call - PM_FUNC_SET_CLOCK_RATE, //!< Index for pm_set_clock_rate() RPC call - PM_FUNC_GET_CLOCK_RATE, //!< Index for pm_get_clock_rate() RPC call - PM_FUNC_CLOCK_ENABLE, //!< Index for pm_clock_enable() RPC call - PM_FUNC_BOOT, //!< Index for pm_boot() RPC call - PM_FUNC_REBOOT, //!< Index for pm_reboot() RPC call - PM_FUNC_RESET_REASON, //!< Index for pm_reset_reason() RPC call - PM_FUNC_CPU_START, //!< Index for pm_cpu_start() RPC call - PM_FUNC_REBOOT_PARTITION, //!< Index for pm_reboot_partition() RPC call - PM_FUNC_RESET, //!< Index for pm_reset() RPC call + PM_FUNC_UNKNOWN = 0, /*!< Unknown function */ + PM_FUNC_SET_SYS_POWER_MODE = 1, /*!< Index for pm_set_sys_power_mode() RPC call */ + PM_FUNC_GET_SYS_POWER_MODE = 2, /*!< Index for pm_get_sys_power_mode() RPC call */ + PM_FUNC_SET_RESOURCE_POWER_MODE = 3, /*!< Index for pm_set_resource_power_mode() RPC call */ + PM_FUNC_GET_RESOURCE_POWER_MODE = 4, /*!< Index for pm_get_resource_power_mode() RPC call */ + PM_FUNC_SET_CLOCK_RATE = 5, /*!< Index for pm_set_clock_rate() RPC call */ + PM_FUNC_GET_CLOCK_RATE = 6, /*!< Index for pm_get_clock_rate() RPC call */ + PM_FUNC_CLOCK_ENABLE = 7, /*!< Index for pm_clock_enable() RPC call */ + PM_FUNC_SET_CLOCK_PARENT = 14, /*!< Index for pm_set_clock_parent() RPC call */ + PM_FUNC_GET_CLOCK_PARENT = 15, /*!< Index for pm_get_clock_parent() RPC call */ + PM_FUNC_RESET = 13, /*!< Index for pm_reset() RPC call */ + PM_FUNC_RESET_REASON = 10, /*!< Index for pm_reset_reason() RPC call */ + PM_FUNC_BOOT = 8, /*!< Index for pm_boot() RPC call */ + PM_FUNC_REBOOT = 9, /*!< Index for pm_reboot() RPC call */ + PM_FUNC_REBOOT_PARTITION = 12, /*!< Index for pm_reboot_partition() RPC call */ + PM_FUNC_CPU_START = 11, /*!< Index for pm_cpu_start() RPC call */ } pm_func_t; /* Functions */ diff --git a/plat/freescale/common/sci/svc/rm/rm_rpc_clnt.c b/plat/freescale/common/sci/svc/rm/rm_rpc_clnt.c index a7e7e188..9cdf6177 100644 --- a/plat/freescale/common/sci/svc/rm/rm_rpc_clnt.c +++ b/plat/freescale/common/sci/svc/rm/rm_rpc_clnt.c @@ -1,6 +1,8 @@ /* + * Copyright (C) 2016 Freescale Semiconductor, Inc. * Copyright 2017 NXP * + * SPDX-License-Identifier: GPL-2.0+ */ /*! @@ -26,8 +28,7 @@ /* Local Functions */ sc_err_t sc_rm_partition_alloc(sc_ipc_t ipc, sc_rm_pt_t *pt, bool secure, - bool isolated, bool restricted, - bool confidential, bool coherent) + bool isolated, bool restricted, bool confidential, bool coherent) { sc_rpc_msg_t msg; uint8_t result; @@ -35,18 +36,18 @@ sc_err_t sc_rm_partition_alloc(sc_ipc_t ipc, sc_rm_pt_t *pt, bool secure, RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_PARTITION_ALLOC; - RPC_D8(&msg, 0) = secure; - RPC_D8(&msg, 1) = isolated; - RPC_D8(&msg, 2) = restricted; - RPC_D8(&msg, 3) = confidential; - RPC_D8(&msg, 4) = coherent; + RPC_U8(&msg, 0) = secure; + RPC_U8(&msg, 1) = isolated; + RPC_U8(&msg, 2) = restricted; + RPC_U8(&msg, 3) = confidential; + RPC_U8(&msg, 4) = coherent; RPC_SIZE(&msg) = 3; sc_call_rpc(ipc, &msg, false); result = RPC_R8(&msg); if (pt != NULL) - *pt = RPC_D8(&msg, 0); + *pt = RPC_U8(&msg, 0); return (sc_err_t)result; } @@ -58,7 +59,7 @@ sc_err_t sc_rm_partition_free(sc_ipc_t ipc, sc_rm_pt_t pt) RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_PARTITION_FREE; - RPC_D8(&msg, 0) = pt; + RPC_U8(&msg, 0) = pt; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -83,7 +84,8 @@ sc_rm_did_t sc_rm_get_did(sc_ipc_t ipc) return (sc_rm_did_t) result; } -sc_err_t sc_rm_partition_static(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_did_t did) +sc_err_t sc_rm_partition_static(sc_ipc_t ipc, sc_rm_pt_t pt, + sc_rm_did_t did) { sc_rpc_msg_t msg; uint8_t result; @@ -91,8 +93,8 @@ sc_err_t sc_rm_partition_static(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_did_t did) RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_PARTITION_STATIC; - RPC_D8(&msg, 0) = pt; - RPC_D8(&msg, 1) = did; + RPC_U8(&msg, 0) = pt; + RPC_U8(&msg, 1) = did; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -109,7 +111,7 @@ sc_err_t sc_rm_partition_lock(sc_ipc_t ipc, sc_rm_pt_t pt) RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_PARTITION_LOCK; - RPC_D8(&msg, 0) = pt; + RPC_U8(&msg, 0) = pt; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -132,11 +134,12 @@ sc_err_t sc_rm_get_partition(sc_ipc_t ipc, sc_rm_pt_t *pt) result = RPC_R8(&msg); if (pt != NULL) - *pt = RPC_D8(&msg, 0); + *pt = RPC_U8(&msg, 0); return (sc_err_t)result; } -sc_err_t sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_pt_t pt_parent) +sc_err_t sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt, + sc_rm_pt_t pt_parent) { sc_rpc_msg_t msg; uint8_t result; @@ -144,8 +147,8 @@ sc_err_t sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_pt_t pt_parent) RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_SET_PARENT; - RPC_D8(&msg, 0) = pt; - RPC_D8(&msg, 1) = pt_parent; + RPC_U8(&msg, 0) = pt; + RPC_U8(&msg, 1) = pt_parent; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -155,7 +158,7 @@ sc_err_t sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_pt_t pt_parent) } sc_err_t sc_rm_move_all(sc_ipc_t ipc, sc_rm_pt_t pt_src, sc_rm_pt_t pt_dst, - bool move_rsrc, bool move_pins) + bool move_rsrc, bool move_pads) { sc_rpc_msg_t msg; uint8_t result; @@ -163,10 +166,10 @@ sc_err_t sc_rm_move_all(sc_ipc_t ipc, sc_rm_pt_t pt_src, sc_rm_pt_t pt_dst, RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_MOVE_ALL; - RPC_D8(&msg, 0) = pt_src; - RPC_D8(&msg, 1) = pt_dst; - RPC_D8(&msg, 2) = move_rsrc; - RPC_D8(&msg, 3) = move_pins; + RPC_U8(&msg, 0) = pt_src; + RPC_U8(&msg, 1) = pt_dst; + RPC_U8(&msg, 2) = move_rsrc; + RPC_U8(&msg, 3) = move_pads; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -175,7 +178,8 @@ sc_err_t sc_rm_move_all(sc_ipc_t ipc, sc_rm_pt_t pt_src, sc_rm_pt_t pt_dst, return (sc_err_t)result; } -sc_err_t sc_rm_assign_resource(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rsrc_t resource) +sc_err_t sc_rm_assign_resource(sc_ipc_t ipc, sc_rm_pt_t pt, + sc_rsrc_t resource) { sc_rpc_msg_t msg; uint8_t result; @@ -183,8 +187,8 @@ sc_err_t sc_rm_assign_resource(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rsrc_t resource) RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_ASSIGN_RESOURCE; - RPC_D16(&msg, 0) = resource; - RPC_D8(&msg, 2) = pt; + RPC_U16(&msg, 0) = resource; + RPC_U8(&msg, 2) = pt; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -202,9 +206,9 @@ sc_err_t sc_rm_set_resource_movable(sc_ipc_t ipc, sc_rsrc_t resource_fst, RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_SET_RESOURCE_MOVABLE; - RPC_D16(&msg, 0) = resource_fst; - RPC_D16(&msg, 2) = resource_lst; - RPC_D8(&msg, 4) = movable; + RPC_U16(&msg, 0) = resource_fst; + RPC_U16(&msg, 2) = resource_lst; + RPC_U8(&msg, 4) = movable; RPC_SIZE(&msg) = 3; sc_call_rpc(ipc, &msg, false); @@ -214,8 +218,7 @@ sc_err_t sc_rm_set_resource_movable(sc_ipc_t ipc, sc_rsrc_t resource_fst, } sc_err_t sc_rm_set_master_attributes(sc_ipc_t ipc, sc_rsrc_t resource, - sc_rm_spa_t sa, sc_rm_spa_t pa, - bool smmu_bypass) + sc_rm_spa_t sa, sc_rm_spa_t pa, bool smmu_bypass) { sc_rpc_msg_t msg; uint8_t result; @@ -223,10 +226,10 @@ sc_err_t sc_rm_set_master_attributes(sc_ipc_t ipc, sc_rsrc_t resource, RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_SET_MASTER_ATTRIBUTES; - RPC_D16(&msg, 0) = resource; - RPC_D8(&msg, 2) = sa; - RPC_D8(&msg, 3) = pa; - RPC_D8(&msg, 4) = smmu_bypass; + RPC_U16(&msg, 0) = resource; + RPC_U8(&msg, 2) = sa; + RPC_U8(&msg, 3) = pa; + RPC_U8(&msg, 4) = smmu_bypass; RPC_SIZE(&msg) = 3; sc_call_rpc(ipc, &msg, false); @@ -235,7 +238,8 @@ sc_err_t sc_rm_set_master_attributes(sc_ipc_t ipc, sc_rsrc_t resource, return (sc_err_t)result; } -sc_err_t sc_rm_set_master_sid(sc_ipc_t ipc, sc_rsrc_t resource, sc_rm_sid_t sid) +sc_err_t sc_rm_set_master_sid(sc_ipc_t ipc, sc_rsrc_t resource, + sc_rm_sid_t sid) { sc_rpc_msg_t msg; uint8_t result; @@ -243,8 +247,8 @@ sc_err_t sc_rm_set_master_sid(sc_ipc_t ipc, sc_rsrc_t resource, sc_rm_sid_t sid) RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_SET_MASTER_SID; - RPC_D16(&msg, 0) = resource; - RPC_D16(&msg, 2) = sid; + RPC_U16(&msg, 0) = resource; + RPC_U16(&msg, 2) = sid; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -262,9 +266,9 @@ sc_err_t sc_rm_set_peripheral_permissions(sc_ipc_t ipc, sc_rsrc_t resource, RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_SET_PERIPHERAL_PERMISSIONS; - RPC_D16(&msg, 0) = resource; - RPC_D8(&msg, 2) = pt; - RPC_D8(&msg, 3) = perm; + RPC_U16(&msg, 0) = resource; + RPC_U8(&msg, 2) = pt; + RPC_U8(&msg, 3) = perm; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -281,7 +285,7 @@ bool sc_rm_is_resource_owned(sc_ipc_t ipc, sc_rsrc_t resource) RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_IS_RESOURCE_OWNED; - RPC_D16(&msg, 0) = resource; + RPC_U16(&msg, 0) = resource; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -298,7 +302,7 @@ bool sc_rm_is_resource_master(sc_ipc_t ipc, sc_rsrc_t resource) RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_IS_RESOURCE_MASTER; - RPC_D16(&msg, 0) = resource; + RPC_U16(&msg, 0) = resource; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -315,7 +319,7 @@ bool sc_rm_is_resource_peripheral(sc_ipc_t ipc, sc_rsrc_t resource) RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_IS_RESOURCE_PERIPHERAL; - RPC_D16(&msg, 0) = resource; + RPC_U16(&msg, 0) = resource; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -333,13 +337,13 @@ sc_err_t sc_rm_get_resource_info(sc_ipc_t ipc, sc_rsrc_t resource, RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_GET_RESOURCE_INFO; - RPC_D16(&msg, 0) = resource; + RPC_U16(&msg, 0) = resource; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); if (sid != NULL) - *sid = RPC_D16(&msg, 0); + *sid = RPC_U16(&msg, 0); result = RPC_R8(&msg); return (sc_err_t)result; } @@ -353,17 +357,17 @@ sc_err_t sc_rm_memreg_alloc(sc_ipc_t ipc, sc_rm_mr_t *mr, RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_MEMREG_ALLOC; - RPC_D32(&msg, 0) = addr_start >> 32; - RPC_D32(&msg, 4) = addr_start; - RPC_D32(&msg, 8) = addr_end >> 32; - RPC_D32(&msg, 12) = addr_end; + RPC_U32(&msg, 0) = addr_start >> 32; + RPC_U32(&msg, 4) = addr_start; + RPC_U32(&msg, 8) = addr_end >> 32; + RPC_U32(&msg, 12) = addr_end; RPC_SIZE(&msg) = 5; sc_call_rpc(ipc, &msg, false); result = RPC_R8(&msg); if (mr != NULL) - *mr = RPC_D8(&msg, 0); + *mr = RPC_U8(&msg, 0); return (sc_err_t)result; } @@ -375,7 +379,7 @@ sc_err_t sc_rm_memreg_free(sc_ipc_t ipc, sc_rm_mr_t mr) RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_MEMREG_FREE; - RPC_D8(&msg, 0) = mr; + RPC_U8(&msg, 0) = mr; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -392,8 +396,8 @@ sc_err_t sc_rm_assign_memreg(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_mr_t mr) RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_ASSIGN_MEMREG; - RPC_D8(&msg, 0) = pt; - RPC_D8(&msg, 1) = mr; + RPC_U8(&msg, 0) = pt; + RPC_U8(&msg, 1) = mr; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -411,9 +415,9 @@ sc_err_t sc_rm_set_memreg_permissions(sc_ipc_t ipc, sc_rm_mr_t mr, RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_SET_MEMREG_PERMISSIONS; - RPC_D8(&msg, 0) = mr; - RPC_D8(&msg, 1) = pt; - RPC_D8(&msg, 2) = perm; + RPC_U8(&msg, 0) = mr; + RPC_U8(&msg, 1) = pt; + RPC_U8(&msg, 2) = perm; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -430,7 +434,7 @@ bool sc_rm_is_memreg_owned(sc_ipc_t ipc, sc_rm_mr_t mr) RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_IS_MEMREG_OWNED; - RPC_D8(&msg, 0) = mr; + RPC_U8(&msg, 0) = mr; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -448,31 +452,29 @@ sc_err_t sc_rm_get_memreg_info(sc_ipc_t ipc, sc_rm_mr_t mr, RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; RPC_FUNC(&msg) = RM_FUNC_GET_MEMREG_INFO; - RPC_D8(&msg, 0) = mr; + RPC_U8(&msg, 0) = mr; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); if (addr_start != NULL) - *addr_start = - ((uint64_t) RPC_D32(&msg, 0) << 32) | RPC_D32(&msg, 4); + *addr_start = ((uint64_t) RPC_U32(&msg, 0) << 32) | RPC_U32(&msg, 4); if (addr_end != NULL) - *addr_end = - ((uint64_t) RPC_D32(&msg, 8) << 32) | RPC_D32(&msg, 12); + *addr_end = ((uint64_t) RPC_U32(&msg, 8) << 32) | RPC_U32(&msg, 12); result = RPC_R8(&msg); return (sc_err_t)result; } -sc_err_t sc_rm_assign_pin(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pin_t pin) +sc_err_t sc_rm_assign_pad(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pad_t pad) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; - RPC_FUNC(&msg) = RM_FUNC_ASSIGN_PIN; - RPC_D16(&msg, 0) = pin; - RPC_D8(&msg, 2) = pt; + RPC_FUNC(&msg) = RM_FUNC_ASSIGN_PAD; + RPC_U16(&msg, 0) = pad; + RPC_U8(&msg, 2) = pt; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -481,18 +483,18 @@ sc_err_t sc_rm_assign_pin(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pin_t pin) return (sc_err_t)result; } -sc_err_t sc_rm_set_pin_movable(sc_ipc_t ipc, sc_pin_t pin_fst, - sc_pin_t pin_lst, bool movable) +sc_err_t sc_rm_set_pad_movable(sc_ipc_t ipc, sc_pad_t pad_fst, + sc_pad_t pad_lst, bool movable) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; - RPC_FUNC(&msg) = RM_FUNC_SET_PIN_MOVABLE; - RPC_D16(&msg, 0) = pin_fst; - RPC_D16(&msg, 2) = pin_lst; - RPC_D8(&msg, 4) = movable; + RPC_FUNC(&msg) = RM_FUNC_SET_PAD_MOVABLE; + RPC_U16(&msg, 0) = pad_fst; + RPC_U16(&msg, 2) = pad_lst; + RPC_U8(&msg, 4) = movable; RPC_SIZE(&msg) = 3; sc_call_rpc(ipc, &msg, false); @@ -501,15 +503,15 @@ sc_err_t sc_rm_set_pin_movable(sc_ipc_t ipc, sc_pin_t pin_fst, return (sc_err_t)result; } -bool sc_rm_is_pin_owned(sc_ipc_t ipc, sc_pin_t pin) +bool sc_rm_is_pad_owned(sc_ipc_t ipc, sc_pad_t pad) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = SC_RPC_SVC_RM; - RPC_FUNC(&msg) = RM_FUNC_IS_PIN_OWNED; - RPC_D8(&msg, 0) = pin; + RPC_FUNC(&msg) = RM_FUNC_IS_PAD_OWNED; + RPC_U8(&msg, 0) = pad; RPC_SIZE(&msg) = 2; sc_call_rpc(ipc, &msg, false); @@ -519,3 +521,4 @@ bool sc_rm_is_pin_owned(sc_ipc_t ipc, sc_pin_t pin) } /**@}*/ + diff --git a/plat/freescale/common/sci/svc/rm/rpc.h b/plat/freescale/common/sci/svc/rm/rpc.h index 25e60243..68037470 100644 --- a/plat/freescale/common/sci/svc/rm/rpc.h +++ b/plat/freescale/common/sci/svc/rm/rpc.h @@ -24,34 +24,35 @@ /*! * This type is used to indicate RPC RM function calls. */ -typedef enum rm_func_e { - RM_FUNC_UNKNOWN = 0, /* Unknown function */ - RM_FUNC_PARTITION_ALLOC = 1, /* Index for rm_partition_alloc() RPC call */ - RM_FUNC_PARTITION_FREE = 2, /* Index for rm_partition_free() RPC call */ - RM_FUNC_GET_DID = 26, /* Index for rm_get_did() RPC call */ - RM_FUNC_PARTITION_STATIC = 3, /* Index for rm_partition_static() RPC call */ - RM_FUNC_PARTITION_LOCK = 4, /* Index for rm_partition_lock() RPC call */ - RM_FUNC_GET_PARTITION = 5, /* Index for rm_get_partition() RPC call */ - RM_FUNC_SET_PARENT = 6, /* Index for rm_set_parent() RPC call */ - RM_FUNC_MOVE_ALL = 7, /* Index for rm_move_all() RPC call */ - RM_FUNC_ASSIGN_RESOURCE = 8, /* Index for rm_assign_resource() RPC call */ - RM_FUNC_SET_RESOURCE_MOVABLE = 9, /* Index for rm_set_resource_movable() RPC call */ - RM_FUNC_SET_MASTER_ATTRIBUTES = 10, /* Index for rm_set_master_attributes() RPC call */ - RM_FUNC_SET_MASTER_SID = 11, /* Index for rm_set_master_sid() RPC call */ - RM_FUNC_SET_PERIPHERAL_PERMISSIONS = 12, /* Index for rm_set_peripheral_permissions() RPC call */ - RM_FUNC_IS_RESOURCE_OWNED = 13, /* Index for rm_is_resource_owned() RPC call */ - RM_FUNC_IS_RESOURCE_MASTER = 14, /* Index for rm_is_resource_master() RPC call */ - RM_FUNC_IS_RESOURCE_PERIPHERAL = 15, /* Index for rm_is_resource_peripheral() RPC call */ - RM_FUNC_GET_RESOURCE_INFO = 16, /* Index for rm_get_resource_info() RPC call */ - RM_FUNC_MEMREG_ALLOC = 17, /* Index for rm_memreg_alloc() RPC call */ - RM_FUNC_MEMREG_FREE = 18, /* Index for rm_memreg_free() RPC call */ - RM_FUNC_ASSIGN_MEMREG = 19, /* Index for rm_assign_memreg() RPC call */ - RM_FUNC_SET_MEMREG_PERMISSIONS = 20, /* Index for rm_set_memreg_permissions() RPC call */ - RM_FUNC_IS_MEMREG_OWNED = 21, /* Index for rm_is_memreg_owned() RPC call */ - RM_FUNC_GET_MEMREG_INFO = 22, /* Index for rm_get_memreg_info() RPC call */ - RM_FUNC_ASSIGN_PIN = 23, /* Index for rm_assign_pin() RPC call */ - RM_FUNC_SET_PIN_MOVABLE = 24, /* Index for rm_set_pin_movable() RPC call */ - RM_FUNC_IS_PIN_OWNED = 25, /* Index for rm_is_pin_owned() RPC call */ +typedef enum rm_func_e +{ + RM_FUNC_UNKNOWN = 0, /*!< Unknown function */ + RM_FUNC_PARTITION_ALLOC = 1, /*!< Index for rm_partition_alloc() RPC call */ + RM_FUNC_PARTITION_FREE = 2, /*!< Index for rm_partition_free() RPC call */ + RM_FUNC_GET_DID = 26, /*!< Index for rm_get_did() RPC call */ + RM_FUNC_PARTITION_STATIC = 3, /*!< Index for rm_partition_static() RPC call */ + RM_FUNC_PARTITION_LOCK = 4, /*!< Index for rm_partition_lock() RPC call */ + RM_FUNC_GET_PARTITION = 5, /*!< Index for rm_get_partition() RPC call */ + RM_FUNC_SET_PARENT = 6, /*!< Index for rm_set_parent() RPC call */ + RM_FUNC_MOVE_ALL = 7, /*!< Index for rm_move_all() RPC call */ + RM_FUNC_ASSIGN_RESOURCE = 8, /*!< Index for rm_assign_resource() RPC call */ + RM_FUNC_SET_RESOURCE_MOVABLE = 9, /*!< Index for rm_set_resource_movable() RPC call */ + RM_FUNC_SET_MASTER_ATTRIBUTES = 10, /*!< Index for rm_set_master_attributes() RPC call */ + RM_FUNC_SET_MASTER_SID = 11, /*!< Index for rm_set_master_sid() RPC call */ + RM_FUNC_SET_PERIPHERAL_PERMISSIONS = 12, /*!< Index for rm_set_peripheral_permissions() RPC call */ + RM_FUNC_IS_RESOURCE_OWNED = 13, /*!< Index for rm_is_resource_owned() RPC call */ + RM_FUNC_IS_RESOURCE_MASTER = 14, /*!< Index for rm_is_resource_master() RPC call */ + RM_FUNC_IS_RESOURCE_PERIPHERAL = 15, /*!< Index for rm_is_resource_peripheral() RPC call */ + RM_FUNC_GET_RESOURCE_INFO = 16, /*!< Index for rm_get_resource_info() RPC call */ + RM_FUNC_MEMREG_ALLOC = 17, /*!< Index for rm_memreg_alloc() RPC call */ + RM_FUNC_MEMREG_FREE = 18, /*!< Index for rm_memreg_free() RPC call */ + RM_FUNC_ASSIGN_MEMREG = 19, /*!< Index for rm_assign_memreg() RPC call */ + RM_FUNC_SET_MEMREG_PERMISSIONS = 20, /*!< Index for rm_set_memreg_permissions() RPC call */ + RM_FUNC_IS_MEMREG_OWNED = 21, /*!< Index for rm_is_memreg_owned() RPC call */ + RM_FUNC_GET_MEMREG_INFO = 22, /*!< Index for rm_get_memreg_info() RPC call */ + RM_FUNC_ASSIGN_PAD = 23, /*!< Index for rm_assign_pad() RPC call */ + RM_FUNC_SET_PAD_MOVABLE = 24, /*!< Index for rm_set_pad_movable() RPC call */ + RM_FUNC_IS_PAD_OWNED = 25, /*!< Index for rm_is_pad_owned() RPC call */ } rm_func_t; /* Functions */ @@ -75,3 +76,4 @@ void rm_xlate(sc_ipc_t ipc, sc_rpc_msg_t *msg); #endif /* _SC_RM_RPC_H */ /**@}*/ + |