diff options
author | Nitin Garg <nitin.garg@nxp.com> | 2017-06-06 18:54:05 -0500 |
---|---|---|
committer | Abel Vesa <abel.vesa@nxp.com> | 2018-06-08 17:34:09 +0300 |
commit | 8ea8a7eb36509f69b3ccc39f307fc0ff8c9c6ff3 (patch) | |
tree | 146e79a6416b16461c6088f30a7729f00f78d620 /plat/imx/imx8qxp/imx8qxp_bl31_setup.c | |
parent | 5c5a05fd7eb5a008710b2f1db9b63361674b9de9 (diff) |
Fix the UART PAD ctrl in last commit
missed bit 31 and 30 which are needed
Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
Diffstat (limited to 'plat/imx/imx8qxp/imx8qxp_bl31_setup.c')
-rw-r--r-- | plat/imx/imx8qxp/imx8qxp_bl31_setup.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/plat/imx/imx8qxp/imx8qxp_bl31_setup.c b/plat/imx/imx8qxp/imx8qxp_bl31_setup.c index 6737612b..f655a8ce 100644 --- a/plat/imx/imx8qxp/imx8qxp_bl31_setup.c +++ b/plat/imx/imx8qxp/imx8qxp_bl31_setup.c @@ -240,8 +240,11 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, /* Enable UART0 clock root */ sc_pm_clock_enable(ipc_handle, SC_R_UART_0, 2, true, false); -#define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \ - | (SC_PAD_28FDSOI_DSE_DV_LOW << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PD << PADRING_PULL_SHIFT)) +#define UART_PAD_CTRL (PADRING_IFMUX_EN_MASK | PADRING_GP_EN_MASK | \ + (SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_LOW << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PD << PADRING_PULL_SHIFT)) /* Configure UART pads */ sc_pad_set(ipc_handle, SC_P_UART0_RX, UART_PAD_CTRL); |