From 8ea8a7eb36509f69b3ccc39f307fc0ff8c9c6ff3 Mon Sep 17 00:00:00 2001 From: Nitin Garg Date: Tue, 6 Jun 2017 18:54:05 -0500 Subject: Fix the UART PAD ctrl in last commit missed bit 31 and 30 which are needed Signed-off-by: Nitin Garg --- plat/imx/imx8qxp/imx8qxp_bl31_setup.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'plat/imx/imx8qxp/imx8qxp_bl31_setup.c') diff --git a/plat/imx/imx8qxp/imx8qxp_bl31_setup.c b/plat/imx/imx8qxp/imx8qxp_bl31_setup.c index 6737612b..f655a8ce 100644 --- a/plat/imx/imx8qxp/imx8qxp_bl31_setup.c +++ b/plat/imx/imx8qxp/imx8qxp_bl31_setup.c @@ -240,8 +240,11 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, /* Enable UART0 clock root */ sc_pm_clock_enable(ipc_handle, SC_R_UART_0, 2, true, false); -#define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \ - | (SC_PAD_28FDSOI_DSE_DV_LOW << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PD << PADRING_PULL_SHIFT)) +#define UART_PAD_CTRL (PADRING_IFMUX_EN_MASK | PADRING_GP_EN_MASK | \ + (SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_LOW << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PD << PADRING_PULL_SHIFT)) /* Configure UART pads */ sc_pad_set(ipc_handle, SC_P_UART0_RX, UART_PAD_CTRL); -- cgit v1.2.3