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author | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2019-09-18 14:30:09 +0000 |
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committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2019-09-18 14:30:09 +0000 |
commit | ea735643cb59eeaca0619c625d77c33ab156b520 (patch) | |
tree | 7e579219db5bf87c54fca5fb5edcf975963868c6 /bl1/aarch64 | |
parent | 5f2849b64ab2da0572247c75be99c63e28e603fa (diff) | |
parent | ee006a79f622b39a35beaaf95d7b42b7078823f8 (diff) |
Merge changes from topic "db/unsigned_long" into integration
* changes:
Unsigned long should not be used as per coding guidelines
SCTLR and ACTLR are 32-bit for AArch32 and 64-bit for AArch64
Diffstat (limited to 'bl1/aarch64')
-rw-r--r-- | bl1/aarch64/bl1_arch_setup.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/bl1/aarch64/bl1_arch_setup.c b/bl1/aarch64/bl1_arch_setup.c index 624bd80f..0a1cb304 100644 --- a/bl1/aarch64/bl1_arch_setup.c +++ b/bl1/aarch64/bl1_arch_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -23,7 +23,7 @@ void bl1_arch_setup(void) ******************************************************************************/ void bl1_arch_next_el_setup(void) { - unsigned long next_sctlr; + u_register_t next_sctlr; /* Use the same endianness than the current BL */ next_sctlr = (read_sctlr_el3() & SCTLR_EE_BIT); |