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authorTeo Hall <teo.hall@nxp.com>2019-12-04 17:14:36 -0600
committerAnson Huang <Anson.Huang@nxp.com>2019-12-13 10:45:50 +0800
commite843839fada37a0b3de2a860554ed670505eb0e4 (patch)
tree14acdf4ce5818141d7a635b3d1670d3258926998
parent80ca14d68b42b4383ccd23364313feffa682d9c7 (diff)
MLK-23071: Update LPUART settings for correct behavior
Update flags for expected behavior in ATF Signed-off-by: Teo Hall <teo.hall@nxp.com>
-rw-r--r--plat/imx/common/include/imx8_lpuart.h2
-rw-r--r--plat/imx/imx8qm/imx8qm_bl31_setup.c2
-rw-r--r--plat/imx/imx8qx/imx8qx_bl31_setup.c2
3 files changed, 3 insertions, 3 deletions
diff --git a/plat/imx/common/include/imx8_lpuart.h b/plat/imx/common/include/imx8_lpuart.h
index 0ea284fd..0e480659 100644
--- a/plat/imx/common/include/imx8_lpuart.h
+++ b/plat/imx/common/include/imx8_lpuart.h
@@ -29,7 +29,7 @@
#define CTRL_RE (1 << 18)
#define FIFO_TXFE 0x80
-#define FIFO_RXFE 0x40
+#define FIFO_RXFE 0x08
#define WATER_TXWATER_OFF 1
#define WATER_RXWATER_OFF 16
diff --git a/plat/imx/imx8qm/imx8qm_bl31_setup.c b/plat/imx/imx8qm/imx8qm_bl31_setup.c
index 4c8d1325..b7732fb7 100644
--- a/plat/imx/imx8qm/imx8qm_bl31_setup.c
+++ b/plat/imx/imx8qm/imx8qm_bl31_setup.c
@@ -135,7 +135,7 @@ static int lpuart32_serial_init(unsigned int base)
mmio_write_32(IMX_BOOT_UART_BASE + CTRL, tmp);
mmio_write_32(IMX_BOOT_UART_BASE + MODIR, 0);
- mmio_write_32(IMX_BOOT_UART_BASE + FIFO, ~(FIFO_TXFE | FIFO_RXFE));
+ mmio_write_32(IMX_BOOT_UART_BASE + FIFO, mmio_read_32(IMX_BOOT_UART_BASE + FIFO) | (FIFO_TXFE | FIFO_RXFE));
mmio_write_32(IMX_BOOT_UART_BASE + MATCH, 0);
diff --git a/plat/imx/imx8qx/imx8qx_bl31_setup.c b/plat/imx/imx8qx/imx8qx_bl31_setup.c
index ca91725e..73920b75 100644
--- a/plat/imx/imx8qx/imx8qx_bl31_setup.c
+++ b/plat/imx/imx8qx/imx8qx_bl31_setup.c
@@ -130,7 +130,7 @@ static int lpuart32_serial_init(unsigned int base)
mmio_write_32(IMX_BOOT_UART_BASE + CTRL, tmp);
mmio_write_32(IMX_BOOT_UART_BASE + MODIR, 0);
- mmio_write_32(IMX_BOOT_UART_BASE + FIFO, ~(FIFO_TXFE | FIFO_RXFE));
+ mmio_write_32(IMX_BOOT_UART_BASE + FIFO, mmio_read_32(IMX_BOOT_UART_BASE + FIFO) | (FIFO_TXFE | FIFO_RXFE));
mmio_write_32(IMX_BOOT_UART_BASE + MATCH, 0);