diff options
author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2018-12-27 20:26:01 +0100 |
---|---|---|
committer | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-01-08 14:08:44 +0100 |
commit | dc03e8438f5cb1bcc077850649016e739c4677d9 (patch) | |
tree | 00f235de9552d1fddfee0eecabdc4baaf1d7417b | |
parent | c6ae55cc7389ad4dff027c483fd290de7822470e (diff) |
rcar_gen3: drivers: auth-mod: Access SCTLR in EL3
The code runs in EL3, use EL3 accessors to manipulate the cache bits.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
-rw-r--r-- | drivers/renesas/rcar/auth/auth_mod.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/renesas/rcar/auth/auth_mod.c b/drivers/renesas/rcar/auth/auth_mod.c index d9446d95..f7d8ec08 100644 --- a/drivers/renesas/rcar/auth/auth_mod.c +++ b/drivers/renesas/rcar/auth/auth_mod.c @@ -113,7 +113,7 @@ verify_image: } #if RCAR_BL2_DCACHE == 1 /* clean and disable */ - write_sctlr_el1(read_sctlr_el1() & ~SCTLR_C_BIT); + write_sctlr_el3(read_sctlr_el3() & ~SCTLR_C_BIT); dcsw_op_all(DCCISW); #endif ret = (mmio_read_32(RCAR_BOOT_KEY_CERT_NEW) == RCAR_CERT_MAGIC_NUM) ? @@ -124,7 +124,7 @@ verify_image: #if RCAR_BL2_DCACHE == 1 /* enable */ - write_sctlr_el1(read_sctlr_el1() | SCTLR_C_BIT); + write_sctlr_el3(read_sctlr_el3() | SCTLR_C_BIT); #endif #endif |