diff options
| author | Anson Huang <Anson.Huang@nxp.com> | 2019-11-22 15:48:14 +0800 |
|---|---|---|
| committer | Anson Huang <Anson.Huang@nxp.com> | 2019-12-13 10:45:49 +0800 |
| commit | 85ea25fe359d5868370b2b08add75e00d194cc54 (patch) | |
| tree | ee49f105b6b3d9c43ebf19714de39a15f2241f34 | |
| parent | 14a33a44fa242cb6565737bb9c43303c0a3ea13d (diff) | |
plat: imx8qm/imx8qxp: Update SCFW API
Sync SCFW API to commit 6dcd0242ae
Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
31 files changed, 3946 insertions, 1608 deletions
diff --git a/plat/imx/common/include/imx8qm_pads.h b/plat/imx/common/include/imx8qm_pads.h index a5c1d2ce..10028095 100644 --- a/plat/imx/common/include/imx8qm_pads.h +++ b/plat/imx/common/include/imx8qm_pads.h @@ -1,5 +1,6 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP * * SPDX-License-Identifier: BSD-3-Clause */ @@ -8,8 +9,8 @@ * Header file used to configure SoC pad list. */ -#ifndef IMX8QM_PADS_H -#define IMX8QM_PADS_H +#ifndef SC_PADS_H +#define SC_PADS_H /* Includes */ @@ -290,4 +291,5 @@ #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA 268 /* */ /*@}*/ -#endif /* IMX8QM_PADS_H */ +#endif /* SC_PADS_H */ + diff --git a/plat/imx/common/include/imx8qx_pads.h b/plat/imx/common/include/imx8qx_pads.h index 5445aa15..30480308 100644 --- a/plat/imx/common/include/imx8qx_pads.h +++ b/plat/imx/common/include/imx8qx_pads.h @@ -1,5 +1,6 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP * * SPDX-License-Identifier: BSD-3-Clause */ @@ -8,8 +9,8 @@ * Header file used to configure SoC pad list. */ -#ifndef IMX8QX_PADS_H -#define IMX8QX_PADS_H +#ifndef SC_PADS_H +#define SC_PADS_H /* Includes */ @@ -195,4 +196,4 @@ #define SC_P_COMP_CTL_GPIO_1V8_3V3_QSPI0B 173 /* */ /*@}*/ -#endif /* IMX8QX_PADS_H */ +#endif /* SC_PADS_H */ diff --git a/plat/imx/common/include/imx_clock.h b/plat/imx/common/include/imx_clock.h index d75dcff2..75f755fa 100644 --- a/plat/imx/common/include/imx_clock.h +++ b/plat/imx/common/include/imx_clock.h @@ -818,8 +818,6 @@ struct ccm_target_root_ctrl { #define CCM_TRGT_MUX_WDOG_CLK_ROOT_USB_PLL (BIT(26) | BIT(24)) #define CCM_TRGT_MUX_WDOG_CLK_ROOT_REF_1M (BIT(26) | BIT(25)) #define CCM_TRGT_MUX_WDOG_CLK_ROOT_SYS_PLL_PFD1_DIV2 ((BIT(26) | BIT(25) | BIT(24)) -#define WDOG_DEFAULT_CLK_SELECT (CCM_TARGET_ROOT_ENABLE |\ - CCM_TRGT_MUX_WDOG_CLK_ROOT_OSC_24M) /* Target CSI_MCLK_CLK_ROOT */ diff --git a/plat/imx/common/include/imx_io_mux.h b/plat/imx/common/include/imx_io_mux.h index d588cfd6..4c68fc85 100644 --- a/plat/imx/common/include/imx_io_mux.h +++ b/plat/imx/common/include/imx_io_mux.h @@ -8,7 +8,6 @@ #define IMX_IO_MUX_H #include <stdint.h> -#include <lib/utils_def.h> /* * i.MX 7Solo Applications Processor Reference Manual, Rev. 0.1, 08/2016 @@ -21,10 +20,7 @@ #define IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO11_OFFSET 0x0020 #define IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO12_OFFSET 0x0024 #define IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO13_OFFSET 0x0028 - #define IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO14_OFFSET 0x002C -#define IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO14_ALT1_SD3_CD_B BIT(0) - #define IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO15_OFFSET 0x0030 #define IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA00_OFFSET 0x0034 @@ -125,24 +121,8 @@ #define IOMUXC_SW_MUX_CTL_PAD_I2C2_SDA_OFFSET 0x0154 #define IOMUXC_SW_MUX_CTL_PAD_I2C3_SCL_OFFSET 0x0158 #define IOMUXC_SW_MUX_CTL_PAD_I2C3_SDA_OFFSET 0x015C - #define IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_OFFSET 0x0160 -#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_ALT0_I2C4_SCL 0x0 -#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_ALT1_UART5_RX_DATA BIT(0) -#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_ALT2_WDOG4_WDOG_B BIT(1) -#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_ALT3_CSI_PIXCLK (BIT(1) | BIT(0)) -#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_ALT4_USB_OTG1_ID BIT(2) -#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_ALT5_GPIO4_IO14 (BIT(2) | BIT(0)) -#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_ALT6_EPDC_VCOM0 (BIT(2) | BIT(1)) - #define IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_OFFSET 0x0164 -#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_ALT0_I2C4_SDA 0x0 -#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_ALT1_UART5_TX_DATA BIT(0) -#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_ALT2_WDOG4_WDOG_RST_B_DEB BIT(1) -#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_ALT3_CSI_MCLK (BIT(1) | BIT(0)) -#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_ALT4_USB_OTG2_ID BIT(2) -#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_ALT5_GPIO4_IO15 (BIT(1) | BIT(0)) -#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_ALT6_EPDC_VCOM1 (BIT(2) | BIT(1)) #define IOMUXC_SW_MUX_CTL_PAD_ECSPI1_SCLK_OFFSET 0x0168 #define IOMUXC_SW_MUX_CTL_PAD_ECSPI1_SCLK_ALT0_ECSPI1_SCLK 0x00 @@ -185,7 +165,6 @@ #define IOMUXC_SW_MUX_CTL_PAD_SD2_DATA1_OFFSET 0x01C4 #define IOMUXC_SW_MUX_CTL_PAD_SD2_DATA2_OFFSET 0x01C8 #define IOMUXC_SW_MUX_CTL_PAD_SD2_DATA3_OFFSET 0x01CC - #define IOMUXC_SW_MUX_CTL_PAD_SD3_CLK_OFFSET 0x01D0 #define IOMUXC_SW_MUX_CTL_PAD_SD3_CMD_OFFSET 0x01D4 #define IOMUXC_SW_MUX_CTL_PAD_SD3_DATA0_OFFSET 0x01D8 @@ -412,7 +391,6 @@ #define IOMUXC_SW_PAD_CTL_PAD_SD2_DATA1_OFFSET 0x0434 #define IOMUXC_SW_PAD_CTL_PAD_SD2_DATA2_OFFSET 0x0438 #define IOMUXC_SW_PAD_CTL_PAD_SD2_DATA3_OFFSET 0x043C - #define IOMUXC_SW_PAD_CTL_PAD_SD3_CLK_OFFSET 0x0440 #define IOMUXC_SW_PAD_CTL_PAD_SD3_CMD_OFFSET 0x0444 #define IOMUXC_SW_PAD_CTL_PAD_SD3_DATA0_OFFSET 0x0448 @@ -425,19 +403,6 @@ #define IOMUXC_SW_PAD_CTL_PAD_SD3_DATA7_OFFSET 0x0464 #define IOMUXC_SW_PAD_CTL_PAD_SD3_STROBE_OFFSET 0x0468 #define IOMUXC_SW_PAD_CTL_PAD_SD3_RESET_B_OFFSET 0x046C -#define IOMUXC_SW_PAD_CTL_PAD_SD3_DSE_0_X1 0 -#define IOMUXC_SW_PAD_CTL_PAD_SD3_DSE_1_X4 BIT(0) -#define IOMUXC_SW_PAD_CTL_PAD_SD3_DSE_2_X2 BIT(1) -#define IOMUXC_SW_PAD_CTL_PAD_SD3_DSE_3_X6 (BIT(1) | BIT(0)) -#define IOMUXC_SW_PAD_CTL_PAD_SD3_DSE_1_X4 BIT(0) -#define IOMUXC_SW_PAD_CTL_PAD_SD3_SLEW_SLOW BIT(2) -#define IOMUXC_SW_PAD_CTL_PAD_SD3_SLEW_FAST 0 -#define IOMUXC_SW_PAD_CTL_PAD_SD3_HYS BIT(3) -#define IOMUXC_SW_PAD_CTL_PAD_SD3_PE BIT(4) -#define IOMUXC_SW_PAD_CTL_PAD_SD3_PD_100K (0 << 5) -#define IOMUXC_SW_PAD_CTL_PAD_SD3_PU_5K (1 << 5) -#define IOMUXC_SW_PAD_CTL_PAD_SD3_PU_47K (2 << 5) -#define IOMUXC_SW_PAD_CTL_PAD_SD3_PU_100K (3 << 5) #define IOMUXC_SW_PAD_CTL_PAD_SAI1_RX_DATA_OFFSET 0x0470 #define IOMUXC_SW_PAD_CTL_PAD_SAI1_TX_BCLK_OFFSET 0x0474 @@ -623,15 +588,7 @@ #define IOMUXC_UART4_RTS_B_SELECT_INPUT_OFFSET 0x0708 #define IOMUXC_UART4_RX_DATA_SELECT_INPUT_OFFSET 0x070C #define IOMUXC_UART5_RTS_B_SELECT_INPUT_OFFSET 0x0710 - #define IOMUXC_UART5_RX_DATA_SELECT_INPUT_OFFSET 0x0714 -#define IOMUXC_UART5_RX_DATA_SELECT_INPUT_I2C4_SCL_ALT1 0x00 -#define IOMUXC_UART5_RX_DATA_SELECT_INPUT_I2C4_SDA_ALT1 BIT(0) -#define IOMUXC_UART5_RX_DATA_SELECT_INPUT_SAI1_RX_DATA_ALT2 BIT(1) -#define IOMUXC_UART5_RX_DATA_SELECT_INPUT_SAI1_TX_BCLK_ALT2 (BIT(1) | BIT(0)) -#define IOMUXC_UART5_RX_DATA_SELECT_INPUT_GPIO1_IO06_ALT3 BIT(2) -#define IOMUXC_UART5_RX_DATA_SELECT_INPUT_GPIO1_IO07_ALT3 (BIT(2) | BIT(1)) - #define IOMUXC_UART6_RTS_B_SELECT_INPUT_OFFSET 0x0718 #define IOMUXC_UART6_RX_DATA_SELECT_INPUT_OFFSET 0x071C #define IOMUXC_UART7_RTS_B_SELECT_INPUT_OFFSET 0x0720 diff --git a/plat/imx/common/include/sci/sci_ipc.h b/plat/imx/common/include/sci/sci_ipc.h index 1167ea36..cc8e47b2 100644..100755 --- a/plat/imx/common/include/sci/sci_ipc.h +++ b/plat/imx/common/include/sci/sci_ipc.h @@ -1,5 +1,6 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP * * SPDX-License-Identifier: BSD-3-Clause */ @@ -8,8 +9,8 @@ * Header file for the IPC implementation. */ -#ifndef SCI_IPC_H -#define SCI_IPC_H +#ifndef SC_IPC_H +#define SC_IPC_H /* Includes */ @@ -60,7 +61,7 @@ void sc_ipc_read(sc_ipc_t ipc, void *data); * * This function will block if the outgoing buffer is full. */ -void sc_ipc_write(sc_ipc_t ipc, void *data); +void sc_ipc_write(sc_ipc_t ipc, const void *data); sc_ipc_t ipc_handle; diff --git a/plat/imx/common/include/sci/sci_rpc.h b/plat/imx/common/include/sci/sci_rpc.h index 60dbc27b..046ef979 100644..100755 --- a/plat/imx/common/include/sci/sci_rpc.h +++ b/plat/imx/common/include/sci/sci_rpc.h @@ -1,5 +1,6 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP * * SPDX-License-Identifier: BSD-3-Clause */ @@ -8,33 +9,39 @@ * Header file for the RPC implementation. */ -#ifndef SCI_RPC_H -#define SCI_RPC_H +#ifndef SC_RPC_H +#define SC_RPC_H /* Includes */ -#include <stdbool.h> - #include <sci/sci_types.h> #include <sci/sci_ipc.h> +#include <stdbool.h> /* Defines */ +#define SCFW_API_VERSION_MAJOR 1U +#define SCFW_API_VERSION_MINOR 15U + #define SC_RPC_VERSION 1U #define SC_RPC_MAX_MSG 8U -#define RPC_VER(MSG) ((MSG)->version) -#define RPC_SIZE(MSG) ((MSG)->size) -#define RPC_SVC(MSG) ((MSG)->svc) -#define RPC_FUNC(MSG) ((MSG)->func) -#define RPC_R8(MSG) ((MSG)->func) -#define RPC_I32(MSG, IDX) ((MSG)->DATA.i32[(IDX) / 4U]) -#define RPC_I16(MSG, IDX) ((MSG)->DATA.i16[(IDX) / 2U]) -#define RPC_I8(MSG, IDX) ((MSG)->DATA.i8[(IDX)]) -#define RPC_U32(MSG, IDX) ((MSG)->DATA.u32[(IDX) / 4U]) -#define RPC_U16(MSG, IDX) ((MSG)->DATA.u16[(IDX) / 2U]) -#define RPC_U8(MSG, IDX) ((MSG)->DATA.u8[(IDX)]) +#define RPC_VER(MESG) ((MESG)->version) +#define RPC_SIZE(MESG) ((MESG)->size) +#define RPC_SVC(MESG) ((MESG)->svc) +#define RPC_FUNC(MESG) ((MESG)->func) +#define RPC_R8(MESG) ((MESG)->func) +#define RPC_I64(MESG, IDX) (I64(RPC_U32((MESG), (IDX))) << 32ULL) \ + | I64(RPC_U32((MESG), (IDX) + 4U)) +#define RPC_I32(MESG, IDX) ((MESG)->DATA.i32[(IDX) / 4U]) +#define RPC_I16(MESG, IDX) ((MESG)->DATA.i16[(IDX) / 2U]) +#define RPC_I8(MESG, IDX) ((MESG)->DATA.i8[(IDX)]) +#define RPC_U64(MESG, IDX) (U64(RPC_U32((MESG), (IDX))) << 32ULL) \ + | U64(RPC_U32((MESG), (IDX) + 4U)) +#define RPC_U32(MESG, IDX) ((MESG)->DATA.u32[(IDX) / 4U]) +#define RPC_U16(MESG, IDX) ((MESG)->DATA.u16[(IDX) / 2U]) +#define RPC_U8(MESG, IDX) ((MESG)->DATA.u8[(IDX)]) #define SC_RPC_SVC_UNKNOWN 0U #define SC_RPC_SVC_RETURN 1U @@ -44,7 +51,8 @@ #define SC_RPC_SVC_PAD 6U #define SC_RPC_SVC_MISC 7U #define SC_RPC_SVC_IRQ 8U -#define SC_RPC_SVC_ABORT 9U +#define SC_RPC_SVC_SECO 9U +#define SC_RPC_SVC_ABORT 10U #define SC_RPC_ASYNC_STATE_RD_START 0U #define SC_RPC_ASYNC_STATE_RD_ACTIVE 1U @@ -53,14 +61,44 @@ #define SC_RPC_ASYNC_STATE_WR_ACTIVE 4U #define SC_RPC_ASYNC_STATE_WR_DONE 5U +/* SC -> Client general-purpose MU IRQs */ #define SC_RPC_MU_GIR_SVC 0x1U +#define SC_RPC_MU_GIR_WAKE 0x2U +#define SC_RPC_MU_GIR_BOOT 0x4U #define SC_RPC_MU_GIR_DBG 0x8U +/* Client -> SC general-purpose MU IRQs */ +#define SC_RPC_MU_GIR_RST 0x1U + +#define I8(X) ((int8_t) (X)) +#define I16(X) ((int16_t) (X)) +#define I32(X) ((int32_t) (X)) +#define I64(X) ((int64_t) (X)) +#define U8(X) ((uint8_t) (X)) +#define U16(X) ((uint16_t) (X)) +#define U32(X) ((uint32_t) (X)) +#define U64(X) ((uint64_t) (X)) + +#define PTR_I8(X) ((int8_t*) (X)) +#define PTR_I16(X) ((int16_t*) (X)) +#define PTR_I32(X) ((int32_t*) (X)) +#define PTR_I64(X) ((int64_t*) (X)) +#define PTR_U8(X) ((uint8_t*) (X)) +#define PTR_U16(X) ((uint16_t*) (X)) +#define PTR_U32(X) ((uint32_t*) (X)) +#define PTR_U64(X) ((uint64_t*) (X)) + +#define U2B(X) (((X) != 0U) ? SC_TRUE : SC_FALSE) +#define U2B32(X) (((X) != 0UL) ? SC_TRUE : SC_FALSE) +#define B2U8(X) (((X) != SC_FALSE) ? U8(0x01U) : U8(0x00U)) +#define B2U16(X) (((X) != SC_FALSE) ? U16(0x01U) : U16(0x00U)) +#define B2U32(X) (((X) != SC_FALSE) ? U32(0x01U) : U32(0x00U)) + /* Types */ typedef uint8_t sc_rpc_svc_t; -typedef struct sc_rpc_msg_s { +typedef struct { uint8_t version; uint8_t size; uint8_t svc; @@ -77,7 +115,7 @@ typedef struct sc_rpc_msg_s { typedef uint8_t sc_rpc_async_state_t; -typedef struct sc_rpc_async_msg_s { +typedef struct { sc_rpc_async_state_t state; uint8_t wordIdx; sc_rpc_msg_t msg; @@ -97,32 +135,6 @@ typedef struct sc_rpc_async_msg_s { * If \a no_resp is SC_FALSE then this function waits for a response * and returns the result in \a msg. */ -void sc_call_rpc(sc_ipc_t ipc, sc_rpc_msg_t *msg, bool no_resp); - -/*! - * This is an internal function to dispath an RPC call that has - * arrived via IPC over an MU. It is called by server-side SCFW. - * - * @param[in] mu MU message arrived on - * @param[in,out] msg handle to a message - * - * The function result is returned in \a msg. - */ -void sc_rpc_dispatch(sc_rsrc_t mu, sc_rpc_msg_t *msg); - -/*! - * This function translates an RPC message and forwards on to the - * normal RPC API. It is used only by hypervisors. - * - * @param[in] ipc IPC handle - * @param[in,out] msg handle to a message - * - * This function decodes a message, calls macros to translate the - * resources, pads, addresses, partitions, memory regions, etc. and - * then forwards on to the hypervisors SCFW API.Return results are - * translated back abd placed back into the message to be returned - * to the original API. - */ -void sc_rpc_xlate(sc_ipc_t ipc, sc_rpc_msg_t *msg); +void sc_call_rpc(sc_ipc_t ipc, sc_rpc_msg_t *msg, sc_bool_t no_resp); #endif /* SCI_RPC_H */ diff --git a/plat/imx/common/include/sci/sci_scfw.h b/plat/imx/common/include/sci/sci_scfw.h index a169f88c..781c69e0 100644..100755 --- a/plat/imx/common/include/sci/sci_scfw.h +++ b/plat/imx/common/include/sci/sci_scfw.h @@ -4,8 +4,8 @@ * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef SCI_SCFW_H -#define SCI_SCFW_H +#ifndef _SC_SCFW_H +#define _SC_SCFW_H /* Includes */ @@ -33,4 +33,5 @@ typedef uint64_t sc_ipc_t; typedef uint64_t sc_ipc_id_t; -#endif /* SCI_SCFW_H */ +#endif /* _SC_SCFW_H */ + diff --git a/plat/imx/common/include/sci/sci_types.h b/plat/imx/common/include/sci/sci_types.h index 6ade01cd..32ff1026 100644..100755 --- a/plat/imx/common/include/sci/sci_types.h +++ b/plat/imx/common/include/sci/sci_types.h @@ -1,5 +1,6 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP * * SPDX-License-Identifier: BSD-3-Clause */ @@ -8,11 +9,12 @@ * Header file containing types used across multiple service APIs. */ -#ifndef SCI_TYPES_H -#define SCI_TYPES_H +#ifndef SC_TYPES_H +#define SC_TYPES_H /* Includes */ +#include <stdbool.h> #include <sci/sci_scfw.h> /* Defines */ @@ -23,6 +25,7 @@ /*@{*/ #define SC_32KHZ 32768U /* 32KHz */ #define SC_10MHZ 10000000U /* 10MHz */ +#define SC_16MHZ 16000000U /* 16MHz */ #define SC_20MHZ 20000000U /* 20MHz */ #define SC_25MHZ 25000000U /* 25MHz */ #define SC_27MHZ 27000000U /* 27MHz */ @@ -36,6 +39,7 @@ #define SC_83MHZ 83333333U /* 83MHz */ #define SC_84MHZ 84375000U /* 84.37MHz */ #define SC_100MHZ 100000000U /* 100MHz */ +#define SC_114MHZ 114000000U /* 114MHz */ #define SC_125MHZ 125000000U /* 125MHz */ #define SC_133MHZ 133333333U /* 133MHz */ #define SC_135MHZ 135000000U /* 135MHz */ @@ -56,29 +60,43 @@ #define SC_372MHZ 372000000U /* 372MHz */ #define SC_375MHZ 375000000U /* 375MHz */ #define SC_400MHZ 400000000U /* 400MHz */ +#define SC_465MHZ 465000000U /* 465MHz */ #define SC_500MHZ 500000000U /* 500MHz */ #define SC_594MHZ 594000000U /* 594MHz */ #define SC_625MHZ 625000000U /* 625MHz */ #define SC_640MHZ 640000000U /* 640MHz */ +#define SC_648MHZ 648000000U /* 648MHz */ #define SC_650MHZ 650000000U /* 650MHz */ #define SC_667MHZ 666666667U /* 667MHz */ #define SC_675MHZ 675000000U /* 675MHz */ #define SC_700MHZ 700000000U /* 700MHz */ #define SC_720MHZ 720000000U /* 720MHz */ #define SC_750MHZ 750000000U /* 750MHz */ +#define SC_753MHZ 753000000U /* 753MHz */ +#define SC_793MHZ 793000000U /* 793MHz */ #define SC_800MHZ 800000000U /* 800MHz */ #define SC_850MHZ 850000000U /* 850MHz */ +#define SC_858MHZ 858000000U /* 858MHz */ #define SC_900MHZ 900000000U /* 900MHz */ +#define SC_953MHZ 953000000U /* 953MHz */ +#define SC_963MHZ 963000000U /* 963MHz */ #define SC_1000MHZ 1000000000U /* 1GHz */ -#define SC_1056MHZ 1056000000U /* 1.056GHz */ +#define SC_1060MHZ 1060000000U /* 1.06GHz */ +#define SC_1068MHZ 1068000000U /* 1.068GHz */ +#define SC_1121MHZ 1121000000U /* 1.121GHz */ +#define SC_1173MHZ 1173000000U /* 1.173GHz */ #define SC_1188MHZ 1188000000U /* 1.188GHz */ #define SC_1260MHZ 1260000000U /* 1.26GHz */ +#define SC_1278MHZ 1278000000U /* 1.278GHz */ #define SC_1280MHZ 1280000000U /* 1.28GHz */ #define SC_1300MHZ 1300000000U /* 1.3GHz */ +#define SC_1313MHZ 1313000000U /* 1.313GHz */ +#define SC_1345MHZ 1345000000U /* 1.345GHz */ #define SC_1400MHZ 1400000000U /* 1.4GHz */ #define SC_1500MHZ 1500000000U /* 1.5GHz */ #define SC_1600MHZ 1600000000U /* 1.6GHz */ #define SC_1800MHZ 1800000000U /* 1.8GHz */ +#define SC_1860MHZ 1860000000U /* 1.86GHz */ #define SC_2000MHZ 2000000000U /* 2.0GHz */ #define SC_2112MHZ 2112000000U /* 2.12GHz */ /*@}*/ @@ -97,6 +115,7 @@ #define SC_144MHZ 144000000U /* 144MHz */ #define SC_192MHZ 192000000U /* 192MHz */ #define SC_211MHZ 211200000U /* 211.2MHz */ +#define SC_228MHZ 228000000U /* 233MHz */ #define SC_240MHZ 240000000U /* 240MHz */ #define SC_264MHZ 264000000U /* 264MHz */ #define SC_352MHZ 352000000U /* 352MHz */ @@ -104,13 +123,16 @@ #define SC_384MHZ 384000000U /* 384MHz */ #define SC_396MHZ 396000000U /* 396MHz */ #define SC_432MHZ 432000000U /* 432MHz */ +#define SC_456MHZ 456000000U /* 466MHz */ #define SC_480MHZ 480000000U /* 480MHz */ #define SC_600MHZ 600000000U /* 600MHz */ #define SC_744MHZ 744000000U /* 744MHz */ #define SC_792MHZ 792000000U /* 792MHz */ #define SC_864MHZ 864000000U /* 864MHz */ +#define SC_912MHZ 912000000U /* 912MHz */ #define SC_960MHZ 960000000U /* 960MHz */ #define SC_1056MHZ 1056000000U /* 1056MHz */ +#define SC_1104MHZ 1104000000U /* 1104MHz */ #define SC_1200MHZ 1200000000U /* 1.2GHz */ #define SC_1464MHZ 1464000000U /* 1.464GHz */ #define SC_2400MHZ 2400000000U /* 2.4GHz */ @@ -128,7 +150,6 @@ * @name Defines for type widths */ /*@{*/ -#define SC_FADDR_W 36U /* Width of sc_faddr_t */ #define SC_BOOL_W 1U /* Width of sc_bool_t */ #define SC_ERR_W 4U /* Width of sc_err_t */ #define SC_RSRC_W 10U /* Width of sc_rsrc_t */ @@ -139,8 +160,8 @@ * @name Defines for sc_bool_t */ /*@{*/ -#define SC_FALSE ((sc_bool_t) 0U) /* True */ -#define SC_TRUE ((sc_bool_t) 1U) /* False */ +#define SC_FALSE ((sc_bool_t) 0U) /* False */ +#define SC_TRUE ((sc_bool_t) 1U) /* True */ /*@}*/ /*! @@ -189,15 +210,15 @@ #define SC_R_DC_0_BLIT1 20U #define SC_R_DC_0_BLIT2 21U #define SC_R_DC_0_BLIT_OUT 22U -#define SC_R_DC_0_CAPTURE0 23U -#define SC_R_DC_0_CAPTURE1 24U +#define SC_R_PERF 23U +#define SC_R_USB_1_PHY 24U #define SC_R_DC_0_WARP 25U -#define SC_R_DC_0_INTEGRAL0 26U -#define SC_R_DC_0_INTEGRAL1 27U +#define SC_R_V2X_MU_0 26U +#define SC_R_V2X_MU_1 27U #define SC_R_DC_0_VIDEO0 28U #define SC_R_DC_0_VIDEO1 29U #define SC_R_DC_0_FRAC0 30U -#define SC_R_DC_0_FRAC1 31U +#define SC_R_V2X_MU_2 31U #define SC_R_DC_0 32U #define SC_R_GPU_2_PID0 33U #define SC_R_DC_0_PLL_0 34U @@ -206,17 +227,17 @@ #define SC_R_DC_1_BLIT1 37U #define SC_R_DC_1_BLIT2 38U #define SC_R_DC_1_BLIT_OUT 39U -#define SC_R_DC_1_CAPTURE0 40U -#define SC_R_DC_1_CAPTURE1 41U +#define SC_R_V2X_MU_3 40U +#define SC_R_V2X_MU_4 41U #define SC_R_DC_1_WARP 42U -#define SC_R_DC_1_INTEGRAL0 43U -#define SC_R_DC_1_INTEGRAL1 44U +#define SC_R_TBU_CTL 43U +#define SC_R_SECVIO 44U #define SC_R_DC_1_VIDEO0 45U #define SC_R_DC_1_VIDEO1 46U #define SC_R_DC_1_FRAC0 47U -#define SC_R_DC_1_FRAC1 48U +#define SC_R_UNUSED13 48U #define SC_R_DC_1 49U -#define SC_R_GPU_3_PID0 50U +#define SC_R_UNUSED14 50U #define SC_R_DC_1_PLL_0 51U #define SC_R_DC_1_PLL_1 52U #define SC_R_SPI_0 53U @@ -306,10 +327,10 @@ #define SC_R_DMA_1_CH29 137U #define SC_R_DMA_1_CH30 138U #define SC_R_DMA_1_CH31 139U -#define SC_R_UNUSED1 140U -#define SC_R_UNUSED2 141U -#define SC_R_UNUSED3 142U -#define SC_R_UNUSED4 143U +#define SC_R_V2X_PID0 140U +#define SC_R_V2X_PID1 141U +#define SC_R_V2X_PID2 142U +#define SC_R_V2X_PID3 143U #define SC_R_GPU_0_PID0 144U #define SC_R_GPU_0_PID1 145U #define SC_R_GPU_0_PID2 146U @@ -456,8 +477,8 @@ #define SC_R_M4_0_UART 287U #define SC_R_M4_0_I2C 288U #define SC_R_M4_0_INTMUX 289U -#define SC_R_M4_0_SIM 290U -#define SC_R_M4_0_WDOG 291U +#define SC_R_ENET_0_A0 290U +#define SC_R_ENET_0_A1 291U #define SC_R_M4_0_MU_0B 292U #define SC_R_M4_0_MU_0A0 293U #define SC_R_M4_0_MU_0A1 294U @@ -476,8 +497,8 @@ #define SC_R_M4_1_UART 307U #define SC_R_M4_1_I2C 308U #define SC_R_M4_1_INTMUX 309U -#define SC_R_M4_1_SIM 310U -#define SC_R_M4_1_WDOG 311U +#define SC_R_UNUSED17 310U +#define SC_R_UNUSED18 311U #define SC_R_M4_1_MU_0B 312U #define SC_R_M4_1_MU_0A0 313U #define SC_R_M4_1_MU_0A1 314U @@ -489,7 +510,7 @@ #define SC_R_SAI_2 320U #define SC_R_IRQSTR_SCU2 321U #define SC_R_IRQSTR_DSP 322U -#define SC_R_UNUSED5 323U +#define SC_R_ELCDIF_PLL 323U #define SC_R_OCRAM 324U #define SC_R_AUDIO_PLL_0 325U #define SC_R_PI_0 326U @@ -532,12 +553,12 @@ #define SC_R_VPU_PID5 363U #define SC_R_VPU_PID6 364U #define SC_R_VPU_PID7 365U -#define SC_R_VPU_UART 366U -#define SC_R_VPUCORE 367U -#define SC_R_VPUCORE_0 368U -#define SC_R_VPUCORE_1 369U -#define SC_R_VPUCORE_2 370U -#define SC_R_VPUCORE_3 371U +#define SC_R_ENET_0_A2 366U +#define SC_R_ENET_1_A0 367U +#define SC_R_ENET_1_A1 368U +#define SC_R_ENET_1_A2 369U +#define SC_R_ENET_1_A3 370U +#define SC_R_ENET_1_A4 371U #define SC_R_DMA_4_CH0 372U #define SC_R_DMA_4_CH1 373U #define SC_R_DMA_4_CH2 374U @@ -707,14 +728,25 @@ #define SC_R_VPU_MU_3 538U #define SC_R_VPU_ENC_1 539U #define SC_R_VPU 540U -#define SC_R_LAST 541U +#define SC_R_DMA_5_CH0 541U +#define SC_R_DMA_5_CH1 542U +#define SC_R_DMA_5_CH2 543U +#define SC_R_DMA_5_CH3 544U +#define SC_R_ATTESTATION 545U +#define SC_R_LAST 546U #define SC_R_ALL ((sc_rsrc_t) UINT16_MAX) /* All resources */ /*@}*/ +/*! + * Define for ATF/Linux. Not used by SCFW. Not a valid parameter + * for any SCFW API calls! + */ +#define SC_R_NONE 0xFFF0U + /* NOTE - please add by replacing some of the UNUSED from above! */ /*! - * Defnes for sc_ctrl_t. + * Defines for sc_ctrl_t. */ #define SC_C_TEMP 0U #define SC_C_TEMP_HI 1U @@ -762,7 +794,19 @@ #define SC_C_RST0 43U #define SC_C_RST1 44U #define SC_C_SEL0 45U -#define SC_C_LAST 46U +#define SC_C_CALIB0 46U +#define SC_C_CALIB1 47U +#define SC_C_CALIB2 48U +#define SC_C_IPG_DEBUG 49U +#define SC_C_IPG_DOZE 50U +#define SC_C_IPG_WAIT 51U +#define SC_C_IPG_STOP 52U +#define SC_C_IPG_STOP_MODE 53U +#define SC_C_IPG_STOP_ACK 54U +#define SC_C_SYNC_CTRL 55U +#define SC_C_OFS_AUDIO_ALT 56U +#define SC_C_DSP_BYP 57U +#define SC_C_LAST 58U #define SC_P_ALL ((sc_pad_t) UINT16_MAX) /* All pads */ @@ -793,7 +837,7 @@ typedef uint16_t sc_rsrc_t; /*! * This type is used to indicate a control. */ -typedef uint8_t sc_ctrl_t; +typedef uint32_t sc_ctrl_t; /*! * This type is used to indicate a pad. Valid values are SoC specific. @@ -846,4 +890,4 @@ typedef __UINT32_TYPE__ uint32_t; typedef __UINT64_TYPE__ uint64_t; #endif -#endif /* SCI_TYPES_H */ +#endif /* SC_TYPES_H */ diff --git a/plat/imx/common/include/sci/svc/irq/sci_irq_api.h b/plat/imx/common/include/sci/svc/irq/sci_irq_api.h new file mode 100644 index 00000000..78e94d76 --- /dev/null +++ b/plat/imx/common/include/sci/svc/irq/sci_irq_api.h @@ -0,0 +1,174 @@ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/*! + * Header file containing the public API for the System Controller (SC) + * Interrupt (IRQ) function. + * + * @addtogroup IRQ_SVC IRQ: Interrupt Service + * + * Module for the Interrupt (IRQ) service. + * + * @{ + */ + +#ifndef SC_IRQ_API_H +#define SC_IRQ_API_H + +/* Includes */ + +#include <sci/sci_types.h> + +/* Defines */ + +#define SC_IRQ_NUM_GROUP 7U /* Number of groups */ + +/*! + * @name Defines for sc_irq_group_t + */ +/*@{*/ +#define SC_IRQ_GROUP_TEMP 0U /* Temp interrupts */ +#define SC_IRQ_GROUP_WDOG 1U /* Watchdog interrupts */ +#define SC_IRQ_GROUP_RTC 2U /* RTC interrupts */ +#define SC_IRQ_GROUP_WAKE 3U /* Wakeup interrupts */ +#define SC_IRQ_GROUP_SYSCTR 4U /* System counter interrupts */ +#define SC_IRQ_GROUP_REBOOTED 5U /* Partition reboot complete */ +#define SC_IRQ_GROUP_REBOOT 6U /* Partition reboot starting */ +/*@}*/ + +/*! + * @name Defines for sc_irq_temp_t + */ +/*@{*/ +#define SC_IRQ_TEMP_HIGH (1UL << 0U) /* Temp alarm interrupt */ +#define SC_IRQ_TEMP_CPU0_HIGH (1UL << 1U) /* CPU0 temp alarm interrupt */ +#define SC_IRQ_TEMP_CPU1_HIGH (1UL << 2U) /* CPU1 temp alarm interrupt */ +#define SC_IRQ_TEMP_GPU0_HIGH (1UL << 3U) /* GPU0 temp alarm interrupt */ +#define SC_IRQ_TEMP_GPU1_HIGH (1UL << 4U) /* GPU1 temp alarm interrupt */ +#define SC_IRQ_TEMP_DRC0_HIGH (1UL << 5U) /* DRC0 temp alarm interrupt */ +#define SC_IRQ_TEMP_DRC1_HIGH (1UL << 6U) /* DRC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_VPU_HIGH (1UL << 7U) /* DRC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC0_HIGH (1UL << 8U) /* PMIC0 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC1_HIGH (1UL << 9U) /* PMIC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_LOW (1UL << 10U) /* Temp alarm interrupt */ +#define SC_IRQ_TEMP_CPU0_LOW (1UL << 11U) /* CPU0 temp alarm interrupt */ +#define SC_IRQ_TEMP_CPU1_LOW (1UL << 12U) /* CPU1 temp alarm interrupt */ +#define SC_IRQ_TEMP_GPU0_LOW (1UL << 13U) /* GPU0 temp alarm interrupt */ +#define SC_IRQ_TEMP_GPU1_LOW (1UL << 14U) /* GPU1 temp alarm interrupt */ +#define SC_IRQ_TEMP_DRC0_LOW (1UL << 15U) /* DRC0 temp alarm interrupt */ +#define SC_IRQ_TEMP_DRC1_LOW (1UL << 16U) /* DRC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_VPU_LOW (1UL << 17U) /* DRC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC0_LOW (1UL << 18U) /* PMIC0 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC1_LOW (1UL << 19U) /* PMIC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC2_HIGH (1UL << 20U) /* PMIC2 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC2_LOW (1UL << 21U) /* PMIC2 temp alarm interrupt */ +/*@}*/ + +/*! + * @name Defines for sc_irq_wdog_t + */ +/*@{*/ +#define SC_IRQ_WDOG (1U << 0U) /* Watchdog interrupt */ +/*@}*/ + +/*! + * @name Defines for sc_irq_rtc_t + */ +/*@{*/ +#define SC_IRQ_RTC (1U << 0U) /* RTC interrupt */ +/*@}*/ + +/*! + * @name Defines for sc_irq_wake_t + */ +/*@{*/ +#define SC_IRQ_BUTTON (1U << 0U) /* Button interrupt */ +#define SC_IRQ_PAD (1U << 1U) /* Pad wakeup */ +#define SC_IRQ_USR1 (1U << 2U) /* User defined 1 */ +#define SC_IRQ_USR2 (1U << 3U) /* User defined 2 */ +#define SC_IRQ_BC_PAD (1U << 4U) /* Pad wakeup (broadcast to all partitions) */ +#define SC_IRQ_SW_WAKE (1U << 5U) /* Software requested wake */ +#define SC_IRQ_SECVIO (1U << 6U) /* Security violation */ +/*@}*/ + +/*! + * @name Defines for sc_irq_sysctr_t + */ +/*@{*/ +#define SC_IRQ_SYSCTR (1U << 0U) /* SYSCTR interrupt */ +/*@}*/ + +/* Types */ + +/*! + * This type is used to declare an interrupt group. + */ +typedef uint8_t sc_irq_group_t; + +/*! + * This type is used to declare a bit mask of temp interrupts. + */ +typedef uint8_t sc_irq_temp_t; + +/*! + * This type is used to declare a bit mask of watchdog interrupts. + */ +typedef uint8_t sc_irq_wdog_t; + +/*! + * This type is used to declare a bit mask of RTC interrupts. + */ +typedef uint8_t sc_irq_rtc_t; + +/*! + * This type is used to declare a bit mask of wakeup interrupts. + */ +typedef uint8_t sc_irq_wake_t; + +/* Functions */ + +/*! + * This function enables/disables interrupts. If pending interrupts + * are unmasked, an interrupt will be triggered. + * + * @param[in] ipc IPC handle + * @param[in] resource MU channel + * @param[in] group group the interrupts are in + * @param[in] mask mask of interrupts to affect + * @param[in] enable state to change interrupts to + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_PARM if group invalid + */ +sc_err_t sc_irq_enable(sc_ipc_t ipc, sc_rsrc_t resource, + sc_irq_group_t group, uint32_t mask, sc_bool_t enable); + +/*! + * This function returns the current interrupt status (regardless if + * masked). Automatically clears pending interrupts. + * + * @param[in] ipc IPC handle + * @param[in] resource MU channel + * @param[in] group groups the interrupts are in + * @param[in] status status of interrupts + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_PARM if group invalid + * + * The returned \a status may show interrupts pending that are + * currently masked. + */ +sc_err_t sc_irq_status(sc_ipc_t ipc, sc_rsrc_t resource, + sc_irq_group_t group, uint32_t *status); + +#endif /* SC_IRQ_API_H */ + +/**@}*/ diff --git a/plat/imx/common/include/sci/svc/misc/sci_misc_api.h b/plat/imx/common/include/sci/svc/misc/sci_misc_api.h index d9dd49d2..6ff4d4ed 100644 --- a/plat/imx/common/include/sci/svc/misc/sci_misc_api.h +++ b/plat/imx/common/include/sci/svc/misc/sci_misc_api.h @@ -9,7 +9,7 @@ * Header file containing the public API for the System Controller (SC) * Miscellaneous (MISC) function. * - * @addtogroup MISC_SVC (SVC) Miscellaneous Service + * @addtogroup MISC_SVC MISC: Miscellaneous Service * * Module for the Miscellaneous (MISC) service. * @@ -21,8 +21,8 @@ /* Includes */ -#include <sci/svc/rm/sci_rm_api.h> #include <sci/sci_types.h> +#include <sci/svc/rm/sci_rm_api.h> /* Defines */ @@ -45,15 +45,6 @@ /*@}*/ /*! - * @name Defines for sc_misc_seco_auth_cmd_t - */ -/*@{*/ -#define SC_MISC_SECO_AUTH_SECO_FW 0U /* SECO Firmware */ -#define SC_MISC_SECO_AUTH_HDMI_TX_FW 1U /* HDMI TX Firmware */ -#define SC_MISC_SECO_AUTH_HDMI_RX_FW 2U /* HDMI RX Firmware */ -/*@}*/ - -/*! * @name Defines for sc_misc_temp_t */ /*@{*/ @@ -63,12 +54,14 @@ /*@}*/ /*! - * @name Defines for sc_misc_seco_auth_cmd_t + * @name Defines for sc_misc_bt_t */ /*@{*/ -#define SC_MISC_AUTH_CONTAINER 0U /* Authenticate container */ -#define SC_MISC_VERIFY_IMAGE 1U /* Verify image */ -#define SC_MISC_REL_CONTAINER 2U /* Release container */ +#define SC_MISC_BT_PRIMARY 0U /* Primary boot */ +#define SC_MISC_BT_SECONDARY 1U /* Secondary boot */ +#define SC_MISC_BT_RECOVERY 2U /* Recovery boot */ +#define SC_MISC_BT_MANUFACTURE 3U /* Manufacture boot */ +#define SC_MISC_BT_SERIAL 4U /* Serial boot */ /*@}*/ /* Types */ @@ -84,14 +77,14 @@ typedef uint8_t sc_misc_dma_group_t; typedef uint8_t sc_misc_boot_status_t; /*! - * This type is used to issue SECO authenticate commands. + * This type is used report boot status. */ -typedef uint8_t sc_misc_seco_auth_cmd_t; +typedef uint8_t sc_misc_temp_t; /*! - * This type is used report boot status. + * This type is used report the boot type. */ -typedef uint8_t sc_misc_temp_t; +typedef uint8_t sc_misc_bt_t; /* Functions */ @@ -192,155 +185,6 @@ sc_err_t sc_misc_set_dma_group(sc_ipc_t ipc, sc_rsrc_t resource, /* @} */ /*! - * @name Security Functions - * @{ - */ - -/*! - * This function loads a SECO image. - * - * @param[in] ipc IPC handle - * @param[in] addr_src address of image source - * @param[in] addr_dst address of image destination - * @param[in] len length of image to load - * @param[in] fw SC_TRUE = firmware load - * - * @return Returns an error code (SC_ERR_NONE = success). - * - * Return errors codes: - * - SC_ERR_PARM if word fuse index param out of range or invalid - * - SC_ERR_UNAVAILABLE if SECO not available - * - * This is used to load images via the SECO. Examples include SECO - * Firmware and IVT/CSF data used for authentication. These are usually - * loaded into SECO TCM. \a addr_src is in secure memory. - * - * See the Security Reference Manual (SRM) for more info. - */ -sc_err_t sc_misc_seco_image_load(sc_ipc_t ipc, sc_faddr_t addr_src, - sc_faddr_t addr_dst, uint32_t len, - sc_bool_t fw); - -/*! - * This function is used to authenticate a SECO image or command. - * - * @param[in] ipc IPC handle - * @param[in] cmd authenticate command - * @param[in] addr address of/or metadata - * - * @return Returns an error code (SC_ERR_NONE = success). - * - * Return errors codes: - * - SC_ERR_PARM if word fuse index param out of range or invalid - * - SC_ERR_UNAVAILABLE if SECO not available - * - * This is used to authenticate a SECO image or issue a security - * command. \a addr often points to an container. It is also - * just data (or even unused) for some commands. - * - * See the Security Reference Manual (SRM) for more info. - */ -sc_err_t sc_misc_seco_authenticate(sc_ipc_t ipc, - sc_misc_seco_auth_cmd_t cmd, - sc_faddr_t addr); - -/*! - * This function securely writes a group of fuse words. - * - * @param[in] ipc IPC handle - * @param[in] addr address of message block - * - * @return Returns and error code (SC_ERR_NONE = success). - * - * Return errors codes: - * - SC_ERR_UNAVAILABLE if SECO not available - * - * Note \a addr must be a pointer to a signed message block. - * - * See the Security Reference Manual (SRM) for more info. - */ -sc_err_t sc_misc_seco_fuse_write(sc_ipc_t ipc, sc_faddr_t addr); - -/*! - * This function securely enables debug. - * - * @param[in] ipc IPC handle - * @param[in] addr address of message block - * - * @return Returns and error code (SC_ERR_NONE = success). - * - * Return errors codes: - * - SC_ERR_UNAVAILABLE if SECO not available - * - * Note \a addr must be a pointer to a signed message block. - * - * See the Security Reference Manual (SRM) for more info. - */ -sc_err_t sc_misc_seco_enable_debug(sc_ipc_t ipc, sc_faddr_t addr); - -/*! - * This function updates the lifecycle of the device. - * - * @param[in] ipc IPC handle - * @param[in] lifecycle new lifecycle - * - * @return Returns and error code (SC_ERR_NONE = success). - * - * Return errors codes: - * - SC_ERR_UNAVAILABLE if SECO not available - * - * This message is used for going from Open to NXP Closed to OEM Closed. - * - * See the Security Reference Manual (SRM) for more info. - */ -sc_err_t sc_misc_seco_forward_lifecycle(sc_ipc_t ipc, uint32_t lifecycle); - -/*! - * This function updates the lifecycle to one of the return lifecycles. - * - * @param[in] ipc IPC handle - * @param[in] addr address of message block - * - * @return Returns and error code (SC_ERR_NONE = success). - * - * Return errors codes: - * - SC_ERR_UNAVAILABLE if SECO not available - * - * Note \a addr must be a pointer to a signed message block. - * - * To switch back to NXP states (Full Field Return), message must be signed - * by NXP SRK. For OEM States (Partial Field Return), must be signed by OEM - * SRK. - * - * See the Security Reference Manual (SRM) for more info. - */ -sc_err_t sc_misc_seco_return_lifecycle(sc_ipc_t ipc, sc_faddr_t addr); - -/*! - * This function is used to return the SECO FW build info. - * - * @param[in] ipc IPC handle - * @param[out] version pointer to return build number - * @param[out] commit pointer to return commit ID (git SHA-1) - */ -void sc_misc_seco_build_info(sc_ipc_t ipc, uint32_t *version, uint32_t *commit); - -/*! - * This function is used to return SECO chip info. - * - * @param[in] ipc IPC handle - * @param[out] lc pointer to return lifecycle - * @param[out] monotonic pointer to return monotonic counter - * @param[out] uid_l pointer to return UID (lower 32 bits) - * @param[out] uid_h pointer to return UID (upper 32 bits) - */ -sc_err_t sc_misc_seco_chip_info(sc_ipc_t ipc, uint16_t *lc, - uint16_t *monotonic, uint32_t *uid_l, - uint32_t *uid_h); - -/* @} */ - -/*! * @name Debug Functions * @{ */ @@ -376,6 +220,23 @@ sc_err_t sc_misc_waveform_capture(sc_ipc_t ipc, sc_bool_t enable); void sc_misc_build_info(sc_ipc_t ipc, uint32_t *build, uint32_t *commit); /*! + * This function is used to return the SCFW API versions. + * + * @param[in] ipc IPC handle + * @param[out] cl_maj pointer to return major part of client version + * @param[out] cl_min pointer to return minor part of client version + * @param[out] sv_maj pointer to return major part of SCFW version + * @param[out] sv_min pointer to return minor part of SCFW version + * + * Client version is the version of the API ported to and used by the caller. + * SCFW version is the version of the SCFW binary running on the CPU. + * + * Note a major version difference indicates a break in compatibility. + */ +void sc_misc_api_ver(sc_ipc_t ipc, uint16_t *cl_maj, + uint16_t *cl_min, uint16_t *sv_maj, uint16_t *sv_min); + +/*! * This function is used to return the device's unique ID. * * @param[in] ipc IPC handle @@ -462,16 +323,24 @@ sc_err_t sc_misc_boot_done(sc_ipc_t ipc, sc_rsrc_t cpu); sc_err_t sc_misc_otp_fuse_read(sc_ipc_t ipc, uint32_t word, uint32_t *val); /*! - * This function writes a given fuse word index. + * This function writes a given fuse word index. Only the owner of the + * SC_R_SYSTEM resource or a partition with access permissions to + * SC_R_SYSTEM can do this. * * @param[in] ipc IPC handle * @param[in] word fuse word index * @param[in] val fuse write value * + * The command is passed as is to SECO. SECO uses part of the + * \a word parameter to indicate if the fuse should be locked + * after programming. See the "Write common fuse" section of + * the SECO API Reference Guide for more info. + * * @return Returns and error code (SC_ERR_NONE = success). * * Return errors codes: * - SC_ERR_PARM if word fuse index param out of range or invalid + * - SC_ERR_NOACCESS if caller does not have SC_R_SYSTEM access * - SC_ERR_NOACCESS if write operation failed * - SC_ERR_LOCKED if write operation is locked */ @@ -494,6 +363,8 @@ sc_err_t sc_misc_otp_fuse_write(sc_ipc_t ipc, uint32_t word, uint32_t val); * * Return errors codes: * - SC_ERR_PARM if parameters invalid + * - SC_ERR_NOACCESS if caller does not own the resource + * - SC_ERR_NOPOWER if power domain of resource not powered */ sc_err_t sc_misc_set_temp(sc_ipc_t ipc, sc_rsrc_t resource, sc_misc_temp_t temp, int16_t celsius, int8_t tenths); @@ -511,10 +382,12 @@ sc_err_t sc_misc_set_temp(sc_ipc_t ipc, sc_rsrc_t resource, * * Return errors codes: * - SC_ERR_PARM if parameters invalid + * - SC_ERR_BUSY if temp not ready yet (time delay after power on) + * - SC_ERR_NOPOWER if power domain of resource not powered */ sc_err_t sc_misc_get_temp(sc_ipc_t ipc, sc_rsrc_t resource, - sc_misc_temp_t temp, int16_t *celsius, - int8_t *tenths); + sc_misc_temp_t temp, int16_t * celsius, + int8_t * tenths); /*! * This function returns the boot device. @@ -522,7 +395,35 @@ sc_err_t sc_misc_get_temp(sc_ipc_t ipc, sc_rsrc_t resource, * @param[in] ipc IPC handle * @param[out] dev pointer to return boot device */ -void sc_misc_get_boot_dev(sc_ipc_t ipc, sc_rsrc_t *dev); +void sc_misc_get_boot_dev(sc_ipc_t ipc, sc_rsrc_t * dev); + +/*! + * This function returns the boot type. + * + * @param[in] ipc IPC handle + * @param[out] type pointer to return boot type + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors code: + * - SC_ERR_UNAVAILABLE if type not passed by ROM + */ +sc_err_t sc_misc_get_boot_type(sc_ipc_t ipc, sc_misc_bt_t * type); + +/*! + * This function returns the boot container index. + * + * @param[in] ipc IPC handle + * @param[out] idx pointer to return index + * + * Return \a idx = 1 for first container, 2 for second. + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors code: + * - SC_ERR_UNAVAILABLE if index not passed by ROM + */ +sc_err_t sc_misc_get_boot_container(sc_ipc_t ipc, uint8_t *idx); /*! * This function returns the current status of the ON/OFF button. @@ -532,6 +433,29 @@ void sc_misc_get_boot_dev(sc_ipc_t ipc, sc_rsrc_t *dev); */ void sc_misc_get_button_status(sc_ipc_t ipc, sc_bool_t *status); +/*! + * This function returns the ROM patch checksum. + * + * @param[in] ipc IPC handle + * @param[out] checksum pointer to return checksum + * + * @return Returns and error code (SC_ERR_NONE = success). + */ +sc_err_t sc_misc_rompatch_checksum(sc_ipc_t ipc, uint32_t *checksum); + +/*! + * This function calls the board IOCTL function. + * + * @param[in] ipc IPC handle + * @param[in,out] parm1 pointer to pass parameter 1 + * @param[in,out] parm2 pointer to pass parameter 2 + * @param[in,out] parm3 pointer to pass parameter 3 + * + * @return Returns and error code (SC_ERR_NONE = success). + */ +sc_err_t sc_misc_board_ioctl(sc_ipc_t ipc, uint32_t *parm1, + uint32_t *parm2, uint32_t *parm3); + /* @} */ #endif /* SC_MISC_API_H */ diff --git a/plat/imx/common/include/sci/svc/pad/sci_pad_api.h b/plat/imx/common/include/sci/svc/pad/sci_pad_api.h index dc23eedb..05343246 100644..100755 --- a/plat/imx/common/include/sci/svc/pad/sci_pad_api.h +++ b/plat/imx/common/include/sci/svc/pad/sci_pad_api.h @@ -1,5 +1,6 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP * * SPDX-License-Identifier: BSD-3-Clause */ @@ -8,7 +9,7 @@ * Header file containing the public API for the System Controller (SC) * Pad Control (PAD) function. * - * @addtogroup PAD_SVC (SVC) Pad Service + * @addtogroup PAD_SVC PAD: Pad Service * * Module for the Pad Control (PAD) service. * @@ -42,18 +43,21 @@ * * Pads are managed as a resource by the Resource Manager (RM). They have * assigned owners and only the owners can configure the pads. Some of the - * pads are reserved for use by the SCFW itself and this can be overriden + * pads are reserved for use by the SCFW itself and this can be overridden * with the implementation of board_config_sc(). Additionally, pads may * be assigned to various other partitions via the implementation of * board_system_config(). * * Note muxing two input pads to the same IP functional signal will * result in undefined behavior. + * + * @includedoc pad/details.dox + * * @{ */ -#ifndef SCI_PAD_API_H -#define SCI_PAD_API_H +#ifndef SC_PAD_API_H +#define SC_PAD_API_H /* Includes */ @@ -66,7 +70,7 @@ * @name Defines for type widths */ /*@{*/ -#define SC_PAD_MUX_W 3 /* Width of mux parameter */ +#define SC_PAD_MUX_W 3U /* Width of mux parameter */ /*@}*/ /*! @@ -156,7 +160,7 @@ typedef uint8_t sc_pad_config_t; * This type is used to declare a pad low-power isolation config. * ISO_LATE is the most common setting. ISO_EARLY is only used when * an output pad is directly determined by another input pad. The - * other two are only used when SW wants to directly contol isolation. + * other two are only used when SW wants to directly control isolation. */ typedef uint8_t sc_pad_iso_t; @@ -504,7 +508,7 @@ sc_err_t sc_pad_set_gp_28fdsoi_hsic(sc_ipc_t ipc, sc_pad_t pad, */ sc_err_t sc_pad_get_gp_28fdsoi_hsic(sc_ipc_t ipc, sc_pad_t pad, sc_pad_28fdsoi_dse_t *dse, sc_bool_t *hys, - sc_pad_28fdsoi_pus_t *pus, sc_bool_t *pke, + sc_pad_28fdsoi_pus_t * pus, sc_bool_t *pke, sc_bool_t *pue); /*! @@ -567,6 +571,6 @@ sc_err_t sc_pad_get_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad, /* @} */ -#endif /* SCI_PAD_API_H */ +#endif /* SC_PAD_API_H */ /**@}*/ diff --git a/plat/imx/common/include/sci/svc/pm/sci_pm_api.h b/plat/imx/common/include/sci/svc/pm/sci_pm_api.h index 76ca5c4e..8cf18485 100644 --- a/plat/imx/common/include/sci/svc/pm/sci_pm_api.h +++ b/plat/imx/common/include/sci/svc/pm/sci_pm_api.h @@ -1,5 +1,6 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP * * SPDX-License-Identifier: BSD-3-Clause */ @@ -9,15 +10,17 @@ * Power Management (PM) function. This includes functions for power state * control, clock control, reset control, and wake-up event control. * - * @addtogroup PM_SVC (SVC) Power Management Service + * @addtogroup PM_SVC PM: Power Management Service * * Module for the Power Management (PM) service. * + * @includedoc pm/details.dox + * * @{ */ -#ifndef SCI_PM_API_H -#define SCI_PM_API_H +#ifndef SC_PM_API_H +#define SC_PM_API_H /* Includes */ @@ -30,10 +33,10 @@ * @name Defines for type widths */ /*@{*/ -#define SC_PM_POWER_MODE_W 2 /* Width of sc_pm_power_mode_t */ -#define SC_PM_CLOCK_MODE_W 3 /* Width of sc_pm_clock_mode_t */ -#define SC_PM_RESET_TYPE_W 2 /* Width of sc_pm_reset_type_t */ -#define SC_PM_RESET_REASON_W 3 /* Width of sc_pm_reset_reason_t */ +#define SC_PM_POWER_MODE_W 2U /* Width of sc_pm_power_mode_t */ +#define SC_PM_CLOCK_MODE_W 3U /* Width of sc_pm_clock_mode_t */ +#define SC_PM_RESET_TYPE_W 2U /* Width of sc_pm_reset_type_t */ +#define SC_PM_RESET_REASON_W 4U /* Width of sc_pm_reset_reason_t */ /*@}*/ /*! @@ -46,7 +49,7 @@ * @name Defines for ALL parameters */ /*@{*/ -#define SC_PM_CLK_ALL UINT8_MAX /* All clocks */ +#define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /* All clocks */ /*@}*/ /*! @@ -82,9 +85,9 @@ * @name Defines for sc_pm_clk_mode_t */ /*@{*/ -#define SC_PM_CLK_MODE_ROM_INIT 0U /* Clock is initialized by ROM. */ +#define SC_PM_CLK_MODE_ROM_INIT 0U /* Clock is initialized by ROM */ #define SC_PM_CLK_MODE_OFF 1U /* Clock is disabled */ -#define SC_PM_CLK_MODE_ON 2U /* Clock is enabled. */ +#define SC_PM_CLK_MODE_ON 2U /* Clock is enabled */ #define SC_PM_CLK_MODE_AUTOGATE_SW 3U /* Clock is in SW autogate mode */ #define SC_PM_CLK_MODE_AUTOGATE_HW 4U /* Clock is in HW autogate mode */ #define SC_PM_CLK_MODE_AUTOGATE_SW_HW 5U /* Clock is in SW-HW autogate mode */ @@ -94,7 +97,7 @@ * @name Defines for sc_pm_clk_parent_t */ /*@{*/ -#define SC_PM_PARENT_XTAL 0U /* Parent is XTAL. */ +#define SC_PM_PARENT_XTAL 0U /* Parent is XTAL */ #define SC_PM_PARENT_PLL0 1U /* Parent is PLL0 */ #define SC_PM_PARENT_PLL1 2U /* Parent is PLL1 or PLL0/2 */ #define SC_PM_PARENT_PLL2 3U /* Parent in PLL2 or PLL0/4 */ @@ -111,28 +114,22 @@ /*@}*/ /*! - * @name Defines for sc_pm_reset_cause_t - */ -/*@{*/ -#define SC_PM_RESET_CAUSE_TEMP 0U /* Reset due to temp panic alarm */ -#define SC_PM_RESET_CAUSE_FAULT 1U /* Reset due to fault exception */ -#define SC_PM_RESET_CAUSE_IRQ 2U /* Reset due to SCU reset IRQ */ -#define SC_PM_RESET_CAUSE_WDOG 3U /* Reset due to SW WDOG */ -#define SC_PM_RESET_CAUSE_API 4U /* Reset due to pm_reset() or monitor */ -/*@}*/ - -/*! * @name Defines for sc_pm_reset_reason_t */ /*@{*/ #define SC_PM_RESET_REASON_POR 0U /* Power on reset */ -#define SC_PM_RESET_REASON_WARM 1U /* Warm reset */ +#define SC_PM_RESET_REASON_JTAG 1U /* JTAG reset */ #define SC_PM_RESET_REASON_SW 2U /* Software reset */ -#define SC_PM_RESET_REASON_WDOG 3U /* Watchdog reset */ -#define SC_PM_RESET_REASON_LOCKUP 4U /* Lockup reset */ -#define SC_PM_RESET_REASON_TAMPER 5U /* Tamper reset */ -#define SC_PM_RESET_REASON_TEMP 6U /* Temp reset */ -#define SC_PM_RESET_REASON_LOW_VOLT 7U /* Low voltage reset */ +#define SC_PM_RESET_REASON_WDOG 3U /* Partition watchdog reset */ +#define SC_PM_RESET_REASON_LOCKUP 4U /* SCU lockup reset */ +#define SC_PM_RESET_REASON_SNVS 5U /* SNVS reset */ +#define SC_PM_RESET_REASON_TEMP 6U /* Temp panic reset */ +#define SC_PM_RESET_REASON_MSI 7U /* MSI reset */ +#define SC_PM_RESET_REASON_UECC 8U /* ECC reset */ +#define SC_PM_RESET_REASON_SCFW_WDOG 9U /* SCFW watchdog reset */ +#define SC_PM_RESET_REASON_ROM_WDOG 10U /* SCU ROM watchdog reset */ +#define SC_PM_RESET_REASON_SECO 11U /* SECO reset */ +#define SC_PM_RESET_REASON_SCFW_FAULT 12U /* SCFW fault reset */ /*@}*/ /*! @@ -191,11 +188,6 @@ typedef uint32_t sc_pm_clock_rate_t; typedef uint8_t sc_pm_reset_type_t; /*! - * This type is used to declare a desired reset type. - */ -typedef uint8_t sc_pm_reset_cause; - -/*! * This type is used to declare a reason for a reset. */ typedef uint8_t sc_pm_reset_reason_t; @@ -219,7 +211,8 @@ typedef uint8_t sc_pm_wake_src_t; /*! * This function sets the system power mode. Only the owner of the - * SC_R_SYSTEM resource can do this. + * SC_R_SYSTEM resource or a partition with access permissions to + * SC_R_SYSTEM can do this. * * @param[in] ipc IPC handle * @param[in] mode power mode to apply @@ -228,7 +221,7 @@ typedef uint8_t sc_pm_wake_src_t; * * Return errors: * - SC_ERR_PARM if invalid mode, - * - SC_ERR_NOACCESS if caller not the owner of SC_R_SYSTEM + * - SC_ERR_NOACCESS if caller does not have SC_R_SYSTEM access * * @see sc_pm_set_sys_power_mode(). */ @@ -272,6 +265,23 @@ sc_err_t sc_pm_get_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pm_power_mode_t *mode); /*! + * This function sends a wake interrupt to a partition. + * + * @param[in] ipc IPC handle + * @param[in] pt handle of partition to wake + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * An SC_IRQ_SW_WAKE interrupt is sent to all MUs owned by the + * partition that have this interrupt enabled. The CPU using an + * MU will exit a low-power state to service the MU interrupt. + * + * Return errors: + * - SC_ERR_PARM if invalid partition + */ +sc_err_t sc_pm_partition_wake(sc_ipc_t ipc, sc_rm_pt_t pt); + +/*! * This function sets the power mode of a resource. * * @param[in] ipc IPC handle @@ -282,9 +292,13 @@ sc_err_t sc_pm_get_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt, * * Return errors: * - SC_ERR_PARM if invalid resource or mode, + * - SC_ERR_PARM if resource is the MU used to make the call, * - SC_ERR_NOACCESS if caller's partition is not the resource owner * or parent of the owner * + * Resources must be at SC_PM_PW_MODE_LP mode or higher to access them, + * otherwise the master will get a bus error or hang. + * * This function will record the individual resource power mode * and change it if the requested mode is lower than or equal to the * partition power mode set with sc_pm_set_partition_power_mode(). @@ -294,7 +308,7 @@ sc_err_t sc_pm_get_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt, * Note some resources are still not accessible even when powered up if bus * transactions go through a fabric not powered up. Examples of this are * resources in display and capture subsystems which require the display - * controller or the imaging subsytem to be powered up first. + * controller or the imaging subsystem to be powered up first. * * Not that resources are grouped into power domains by the underlying * hardware. If any resource in the domain is on, the entire power domain @@ -307,6 +321,34 @@ sc_err_t sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_power_mode_t mode); /*! +* This function sets the power mode for all the resources owned +* by a child partition. +* +* @param[in] ipc IPC handle +* @param[in] pt handle of child partition +* @param[in] mode power mode to apply +* @param[in] exclude resource to exclude +* +* @return Returns an error code (SC_ERR_NONE = success). +* +* Return errors: +* - SC_ERR_PARM if invalid partition or mode, +* - SC_ERR_NOACCESS if caller's partition is not the parent +* (with grant) of \a pt +* +* This functions loops through all the resources owned by \a pt +* and sets the power mode to \a mode. It will skip setting +* \a exclude (SC_R_LAST to skip none). +* +* This function can only be called by the parent. It is used to +* implement some aspects of virtualization. +*/ +sc_err_t sc_pm_set_resource_power_mode_all(sc_ipc_t ipc, + sc_rm_pt_t pt, + sc_pm_power_mode_t mode, + sc_rsrc_t exclude); + +/*! * This function gets the power mode of a resource. * * @param[in] ipc IPC handle @@ -322,7 +364,7 @@ sc_err_t sc_pm_get_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_power_mode_t *mode); /*! - * This function requests the low power mode some of the resources + * This function specifies the low power mode some of the resources * can enter based on their state. This API is only valid for the * following resources : SC_R_A53, SC_R_A53_0, SC_R_A53_1, SC_A53_2, * SC_A53_3, SC_R_A72, SC_R_A72_0, SC_R_A72_1, SC_R_CC1, SC_R_A35, @@ -379,6 +421,9 @@ sc_err_t sc_pm_req_cpu_low_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, * - SC_ERR_PARM if invalid resource or address, * - SC_ERR_NOACCESS if caller's partition is not the parent of the * resource (CPU) owner + * + * Note the address is limited by the hardware implementation. See the + * [CPU Start Address](@ref BOOT_ADDR) section in the Porting Guide. */ sc_err_t sc_pm_set_cpu_resume_addr(sc_ipc_t ipc, sc_rsrc_t resource, sc_faddr_t address); @@ -398,13 +443,16 @@ sc_err_t sc_pm_set_cpu_resume_addr(sc_ipc_t ipc, sc_rsrc_t resource, * - SC_ERR_PARM if invalid resource or address, * - SC_ERR_NOACCESS if caller's partition is not the parent of the * resource (CPU) owner + * + * Note the address is limited by the hardware implementation. See the + * [CPU Start Address](@ref BOOT_ADDR) section in the Porting Guide. */ sc_err_t sc_pm_set_cpu_resume(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t isPrimary, sc_faddr_t address); /*! * This function requests the power mode configuration for system-level - * interfaces including messaging units, interconnect, and memories. This API + * interfaces including messaging units, interconnect, and memories. This API * is only valid for the following resources : SC_R_A53, SC_R_A72, and * SC_R_M4_x_PID_y. For all other resources, it will return SC_ERR_PARAM. * The requested power mode will be captured and applied to system-level @@ -469,6 +517,10 @@ sc_err_t sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, * or parent of the owner, * - SC_ERR_UNAVAILABLE if clock/PLL not applicable to this resource * + * This function returns the actual clock rate of the hardware. This rate + * may be different from the original requested clock rate if the resource + * is set to a low power mode. + * * Refer to the [Clock List](@ref CLOCKS) for valid clock/PLL values. */ sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, @@ -494,7 +546,7 @@ sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, * Return errors: * - SC_ERR_PARM if invalid resource or clock, * - SC_ERR_NOACCESS if caller's partition is not the resource owner - * or parent of the owner, + * or parent (with grant) of the owner, * - SC_ERR_UNAVAILABLE if clock not applicable to this resource * * Refer to the [Clock List](@ref CLOCKS) for valid clock values. @@ -509,14 +561,14 @@ sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, * @param[in] ipc IPC handle * @param[in] resource ID of the resource * @param[in] clk clock to affect - * @param[in] parent New parent of the clock. + * @param[in] parent New parent of the clock * * @return Returns an error code (SC_ERR_NONE = success). * * Return errors: * - SC_ERR_PARM if invalid resource or clock, * - SC_ERR_NOACCESS if caller's partition is not the resource owner - * or parent of the owner, + * or parent (with grant) of the owner, * - SC_ERR_UNAVAILABLE if clock not applicable to this resource * - SC_ERR_BUSY if clock is currently enabled. * - SC_ERR_NOPOWER if resource not powered @@ -532,7 +584,7 @@ sc_err_t sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, * @param[in] ipc IPC handle * @param[in] resource ID of the resource * @param[in] clk clock to affect - * @param[out] parent pointer to return parent of clock. + * @param[out] parent pointer to return parent of clock * * @return Returns an error code (SC_ERR_NONE = success). * @@ -545,7 +597,7 @@ sc_err_t sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, * Refer to the [Clock List](@ref CLOCKS) for valid clock values. */ sc_err_t sc_pm_get_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, - sc_pm_clk_t clk, sc_pm_clk_parent_t *parent); + sc_pm_clk_t clk, sc_pm_clk_parent_t * parent); /* @} */ @@ -556,7 +608,8 @@ sc_err_t sc_pm_get_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, /*! * This function is used to reset the system. Only the owner of the - * SC_R_SYSTEM resource can do this. + * SC_R_SYSTEM resource or a partition with access permissions to + * SC_R_SYSTEM can do this. * * @param[in] ipc IPC handle * @param[in] type reset type @@ -565,7 +618,7 @@ sc_err_t sc_pm_get_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, * * Return errors: * - SC_ERR_PARM if invalid type, - * - SC_ERR_NOACCESS if caller not the owner of SC_R_SYSTEM + * - SC_ERR_NOACCESS if caller cannot access SC_R_SYSTEM * * If this function returns, then the reset did not occur due to an * invalid parameter. @@ -576,13 +629,38 @@ sc_err_t sc_pm_reset(sc_ipc_t ipc, sc_pm_reset_type_t type); * This function gets a caller's reset reason. * * @param[in] ipc IPC handle - * @param[out] reason pointer to return reset reason + * @param[out] reason pointer to return the reset reason + * + * This function returns the reason a partition was reset. If the reason + * is POR, then the system reset reason will be returned. + * + * Note depending on the connection of the WDOG_OUT signal and the OTP + * programming of the PMIC, some resets may trigger a system POR + * and the original reason will be lost. * * @return Returns an error code (SC_ERR_NONE = success). */ sc_err_t sc_pm_reset_reason(sc_ipc_t ipc, sc_pm_reset_reason_t *reason); /*! + * This function gets the partition that caused a reset. + * + * @param[in] ipc IPC handle + * @param[out] pt pointer to return the resetting partition + * + * If the reset reason obtained via sc_pm_reset_reason() is POR then the + * result from this function will be 0. Some SECO causes of reset will + * also return 0. + * + * Note depending on the connection of the WDOG_OUT signal and the OTP + * programming of the PMIC, some resets may trigger a system POR + * and the partition info will be lost. + * + * @return Returns an error code (SC_ERR_NONE = success). + */ +sc_err_t sc_pm_get_reset_part(sc_ipc_t ipc, sc_rm_pt_t *pt); + +/*! * This function is used to boot a partition. * * @param[in] ipc IPC handle @@ -598,12 +676,44 @@ sc_err_t sc_pm_reset_reason(sc_ipc_t ipc, sc_pm_reset_reason_t *reason); * - SC_ERR_PARM if invalid partition, resource, or addr, * - SC_ERR_NOACCESS if caller's partition is not the parent of the * partition to boot + * + * This must be used to boot a partition. Only a partition booted this + * way can be rebooted using the watchdog, sc_pm_boot() or + * sc_pm_reboot_partition(). + * + * Note the address is limited by the hardware implementation. See the + * [CPU Start Address](@ref BOOT_ADDR) section in the Porting Guide. */ sc_err_t sc_pm_boot(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rsrc_t resource_cpu, sc_faddr_t boot_addr, sc_rsrc_t resource_mu, sc_rsrc_t resource_dev); /*! + * This function is used to change the boot parameters for a partition. + * + * @param[in] ipc IPC handle + * @param[in] resource_cpu ID of the CPU resource to start + * @param[in] boot_addr 64-bit boot address + * @param[in] resource_mu ID of the MU that must be powered (0=none) + * @param[in] resource_dev ID of the boot device that must be powered (0=none) + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_ERR_PARM if invalid resource, or addr + * + * This function can be used to change the boot parameters for a partition. + * This can be useful if a partitions reboots differently from the initial + * boot done via sc_pm_boot() or via ROM. + * + * Note the address is limited by the hardware implementation. See the + * [CPU Start Address](@ref BOOT_ADDR) section in the Porting Guide. + */ +sc_err_t sc_pm_set_boot_parm(sc_ipc_t ipc, + sc_rsrc_t resource_cpu, sc_faddr_t boot_addr, + sc_rsrc_t resource_mu, sc_rsrc_t resource_dev); + +/*! * This function is used to reboot the caller's partition. * * @param[in] ipc IPC handle @@ -614,12 +724,8 @@ sc_err_t sc_pm_boot(sc_ipc_t ipc, sc_rm_pt_t pt, * power, clocks, etc.) is reset. The boot SW of the booting CPU must be * able to handle peripherals that that are not reset. * - * If \a type is SC_PM_RESET_TYPE_WARM, then only the boot CPU is reset. - * SC state (partitions, power, clocks, etc.) are NOT reset. The boot SW - * of the booting CPU must be able to handle peripherals and SC state that - * that are not reset. - * - * If \a type is SC_PM_RESET_TYPE_BOARD, then return with no action. + * If \a type is SC_PM_RESET_TYPE_WARM or SC_PM_RESET_TYPE_BOARD, then + * returns SC_ERR_PARM as these are not supported. * * If this function returns, then the reset did not occur due to an * invalid parameter. @@ -638,28 +744,42 @@ void sc_pm_reboot(sc_ipc_t ipc, sc_pm_reset_type_t type); * power, clocks, etc.) is reset. The boot SW of the booting CPU must be * able to handle peripherals that that are not reset. * - * If \a type is SC_PM_RESET_TYPE_WARM, then only the boot CPU is reset. - * SC state (partitions, power, clocks, etc.) are NOT reset. The boot SW - * of the booting CPU must be able to handle peripherals and SC state that - * that are not reset. - * - * If \a type is SC_PM_RESET_TYPE_BOARD, then return with no action. + * If \a type is SC_PM_RESET_TYPE_WARM or SC_PM_RESET_TYPE_BOARD, then + * returns SC_ERR_PARM as these are not supported. * * @return Returns an error code (SC_ERR_NONE = success). * * Return errors: * - SC_ERR_PARM if invalid partition or type - * - SC_ERR_NOACCESS if caller's partition is not the parent of \a pt, + * - SC_ERR_NOACCESS if caller's partition is not the parent of \a pt + * and the caller does not have access to SC_R_SYSTEM * * Most peripherals owned by the partition will be reset if * possible. SC state (partitions, power, clocks, etc.) is reset. The * boot SW of the booting CPU must be able to handle peripherals that * that are not reset. + * + * If board_reboot_part() returns a non-0 mask, then the reboot will + * be delayed until all partitions indicated in the mask have called + * sc_pm_reboot_continue() to continue the boot. */ sc_err_t sc_pm_reboot_partition(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pm_reset_type_t type); /*! + * This function is used to continue the reboot a partition. + * + * @param[in] ipc IPC handle + * @param[in] pt handle of partition to continue + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_ERR_PARM if invalid partition + */ +sc_err_t sc_pm_reboot_continue(sc_ipc_t ipc, sc_rm_pt_t pt); + +/*! * This function is used to start/stop a CPU. * * @param[in] ipc IPC handle @@ -673,12 +793,83 @@ sc_err_t sc_pm_reboot_partition(sc_ipc_t ipc, sc_rm_pt_t pt, * - SC_ERR_PARM if invalid resource or address, * - SC_ERR_NOACCESS if caller's partition is not the parent of the * resource (CPU) owner + * + * This function is usually used to start a secondary CPU in the + * same partition as the caller. It is not used to start the first + * CPU in a dedicated partition. That would be started by calling + * sc_pm_boot(). + * + * A CPU started with sc_pm_cpu_start() will not restart as a result + * of a watchdog event or calling sc_pm_reboot() or sc_pm_reboot_partition(). + * Those will reboot that partition which will start the CPU started with + * sc_pm_boot(). + * + * Note the address is limited by the hardware implementation. See the + * [CPU Start Address](@ref BOOT_ADDR) section in the Porting Guide. */ sc_err_t sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable, sc_faddr_t address); +/*! + * This function is used to reset a CPU. + * + * @param[in] ipc IPC handle + * @param[in] resource ID of the CPU resource + * @param[in] address 64-bit boot address + * + * This function does not return anything as the calling core may have been + * reset. It can still fail if the resource or address is invalid. It can also + * fail if the caller's partition is not the owner of the CPU, not the parent + * of the CPU resource owner, or has access to SC_R_SYSTEM. Will also fail if + * the resource is not powered on. No indication of failure is returned. + * + * Note this just resets the CPU. None of the peripherals or bus fabric used by + * the CPU is reset. State configured in the SCFW is not reset. The SW running + * on the core has to understand and deal with this. + * + * The address is limited by the hardware implementation. See the + * [CPU Start Address](@ref BOOT_ADDR) section in the Porting Guide. + */ +void sc_pm_cpu_reset(sc_ipc_t ipc, sc_rsrc_t resource, sc_faddr_t address); + +/*! + * This function is used to reset a peripheral. + * + * @param[in] ipc IPC handle + * @param[in] resource resource to reset + * + * This function will reset a resource. Most resources cannot be reset unless + * the SoC design specifically allows it. In the case on MUs, the IPC/RPC + * protocol is also reset. Note a caller cannot reset an MU that this API + * call is sent on. + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_ERR_PARM if invalid resource, + * - SC_ERR_PARM if resource is the MU used to make the call, + * - SC_ERR_NOACCESS if caller's partition is not the resource owner or parent + * (with grant) of the owner, + * - SC_ERR_BUSY if the resource cannot be reset due to power state of buses, + * - SC_ERR_UNAVAILABLE if the resource cannot be reset due to hardware limitations + */ +sc_err_t sc_pm_resource_reset(sc_ipc_t ipc, sc_rsrc_t resource); + +/*! + * This function returns a bool indicating if a partition was started. + * + * @param[in] ipc IPC handle + * @param[in] pt handle of partition to check + * + * @return Returns a bool (SC_TRUE = started). + * + * Note this indicates if a partition was started. It does not indicate if a + * partition is currently running or in a low power state. + */ +sc_bool_t sc_pm_is_partition_started(sc_ipc_t ipc, sc_rm_pt_t pt); + /* @} */ -#endif /* SCI_PM_API_H */ +#endif /* SC_PM_API_H */ /**@}*/ diff --git a/plat/imx/common/include/sci/svc/rm/sci_rm_api.h b/plat/imx/common/include/sci/svc/rm/sci_rm_api.h index df1bc401..be756921 100644..100755 --- a/plat/imx/common/include/sci/svc/rm/sci_rm_api.h +++ b/plat/imx/common/include/sci/svc/rm/sci_rm_api.h @@ -1,5 +1,6 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP * * SPDX-License-Identifier: BSD-3-Clause */ @@ -9,7 +10,7 @@ * Resource Management (RM) function. This includes functions for * partitioning resources, pads, and memory regions. * - * @addtogroup RM_SVC (SVC) Resource Management Service + * @addtogroup RM_SVC RM: Resource Management Service * * Module for the Resource Management (RM) service. * @@ -18,8 +19,8 @@ * @{ */ -#ifndef SCI_RM_API_H -#define SCI_RM_API_H +#ifndef SC_RM_API_H +#define SC_RM_API_H /* Includes */ @@ -31,12 +32,12 @@ * @name Defines for type widths */ /*@{*/ -#define SC_RM_PARTITION_W 5 /* Width of sc_rm_pt_t */ -#define SC_RM_MEMREG_W 6 /* Width of sc_rm_mr_t */ -#define SC_RM_DID_W 4 /* Width of sc_rm_did_t */ -#define SC_RM_SID_W 6 /* Width of sc_rm_sid_t */ -#define SC_RM_SPA_W 2 /* Width of sc_rm_spa_t */ -#define SC_RM_PERM_W 3 /* Width of sc_rm_perm_t */ +#define SC_RM_PARTITION_W 5U /* Width of sc_rm_pt_t */ +#define SC_RM_MEMREG_W 6U /* Width of sc_rm_mr_t */ +#define SC_RM_DID_W 4U /* Width of sc_rm_did_t */ +#define SC_RM_SID_W 6U /* Width of sc_rm_sid_t */ +#define SC_RM_SPA_W 2U /* Width of sc_rm_spa_t */ +#define SC_RM_PERM_W 3U /* Width of sc_rm_perm_t */ /*@}*/ /*! @@ -139,12 +140,21 @@ typedef uint8_t sc_rm_perm_t; * - SC_ERR_UNAVAILABLE if partition table is full (no more allocation space) * * Marking as non-secure prevents subsequent functions from configuring masters in this - * partition to assert the secure signal. If restricted then the new partition is limited - * in what functions it can call, especially those associated with managing partitions. + * partition to assert the secure signal. Basically, if TrustZone SW is used, the Cortex-A + * cores and peripherals the TZ SW will use should be in a secure partition. Almost all + * other partitions (for a non-secure OS or M4 cores) should be in non-secure partitions. + * + * Isolated should be true for almost all partitions. The exception is the non-secure + * partition for a Cortex-A core used to run a non-secure OS. This isn't isolated by + * domain but is instead isolated by the TZ security hardware. + * + * If restricted then the new partition is limited in what functions it can call, + * especially those associated with managing partitions. * * The grant option is usually used to isolate a bus master's traffic to specific * memory without isolating the peripheral interface of the master or the API - * controls of that master. + * controls of that master. This is only used when creating a sub-partition with + * no CPU. It's useful to separate out a master and the memory it uses. */ sc_err_t sc_rm_partition_alloc(sc_ipc_t ipc, sc_rm_pt_t *pt, sc_bool_t secure, sc_bool_t isolated, sc_bool_t restricted, @@ -315,14 +325,20 @@ sc_err_t sc_rm_move_all(sc_ipc_t ipc, sc_rm_pt_t pt_src, sc_rm_pt_t pt_dst, * assigned * @param[in] resource resource to assign * + * This function assigned a resource to a partition. This partition is then + * the owner. All resources always have an owner (one owner). The owner + * has various rights to make API calls affecting the resource. Ownership + * does not imply access to the peripheral itself (that is based on access + * rights). + * * @return Returns an error code (SC_ERR_NONE = success). * * This action resets the resource's master and peripheral attributes. * Privilege attribute will be PASSTHRU, security attribute will be - * ASSERT if the partition si secure and NEGATE if it is not, and + * ASSERT if the partition is secure and NEGATE if it is not, and * masters will defaulted to SMMU bypass. Access permissions will reset * to SEC_RW for the owning partition only for secure partitions, FULL for - * non-secure. DEfault is no access by other partitions. + * non-secure. Default is no access by other partitions. * * Return errors: * - SC_ERR_NOACCESS if caller's partition is restricted, @@ -364,6 +380,12 @@ sc_err_t sc_rm_set_resource_movable(sc_ipc_t ipc, sc_rsrc_t resource_fst, * @param[in] resource resource to use to identify subsystem * @param[in] movable movable flag (SC_TRUE is movable) * + * A subsystem is a physical grouping within the chip of related resources; + * this is SoC specific. This function is used to optimize moving resource + * for these groupings, for instance, an M4 core and its associated resources. + * The list of subsystems and associated resources can be found in the + * SoC-specific API document [Resources](@ref RESOURCES) chapter. + * * @return Returns an error code (SC_ERR_NONE = success). * * Return errors: @@ -393,9 +415,13 @@ sc_err_t sc_rm_set_subsys_rsrc_movable(sc_ipc_t ipc, sc_rsrc_t resource, * - SC_ERR_NOACCESS if caller's partition is not a parent of the resource owner, * - SC_ERR_LOCKED if the owning partition is locked * - * This function configures how the HW isolation will see bus transactions - * from the specified master. Note the security attribute will only be - * changed if the caller's partition is secure. + * Masters are IP blocks that generate bus transactions. This function configures + * how the isolation HW will define these bus transactions from the specified master. + * Note the security attribute will only be changed if the caller's partition is + * secure. + * + * Note an IP block can be both a master and peripheral (have both a programming model + * and generate bus transactions). */ sc_err_t sc_rm_set_master_attributes(sc_ipc_t ipc, sc_rsrc_t resource, sc_rm_spa_t sa, sc_rm_spa_t pa, @@ -442,8 +468,15 @@ sc_err_t sc_rm_set_master_sid(sc_ipc_t ipc, sc_rsrc_t resource, * - SC_ERR_LOCKED if the owning partition is locked * - SC_ERR_LOCKED if the \a pt is confidential and the caller isn't \a pt * - * This function configures how the HW isolation will restrict access to a - * peripheral based on the attributes of a transaction from bus master. + * Peripherals are IP blocks that have a programming model that can be + * accessed. + * + * This function configures how the isolation HW will restrict access to a + * peripheral based on the attributes of a transaction from bus master. It + * also allows the access permissions of SC_R_SYSTEM to be set. + * + * Note an IP block can be both a master and peripheral (have both a programming + * model and generate bus transactions). */ sc_err_t sc_rm_set_peripheral_permissions(sc_ipc_t ipc, sc_rsrc_t resource, sc_rm_pt_t pt, sc_rm_perm_t perm); @@ -461,11 +494,32 @@ sc_err_t sc_rm_set_peripheral_permissions(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t sc_rm_is_resource_owned(sc_ipc_t ipc, sc_rsrc_t resource); /*! + * This function is used to get the owner of a resource. + * + * @param[in] ipc IPC handle + * @param[in] resource resource to check + * @param[out] pt pointer to return owning partition + * + * @return Returns a boolean (SC_TRUE if the resource is a bus master). + * + * Return errors: + * - SC_PARM if arguments out of range or invalid + * + * If \a resource is out of range then SC_ERR_PARM is returned. + */ +sc_err_t sc_rm_get_resource_owner(sc_ipc_t ipc, sc_rsrc_t resource, + sc_rm_pt_t *pt); + +/*! * This function is used to test if a resource is a bus master. * * @param[in] ipc IPC handle * @param[in] resource resource to check * + * Masters are IP blocks that generate bus transactions. Note an IP block + * can be both a master and peripheral (have both a programming model + * and generate bus transactions). + * * @return Returns a boolean (SC_TRUE if the resource is a bus master). * * If \a resource is out of range then SC_FALSE is returned. @@ -478,6 +532,10 @@ sc_bool_t sc_rm_is_resource_master(sc_ipc_t ipc, sc_rsrc_t resource); * @param[in] ipc IPC handle * @param[in] resource resource to check * + * Peripherals are IP blocks that have a programming model that can be + * accessed. Note an IP block can be both a master and peripheral (have + * both a programming model and generate bus transactions) + * * @return Returns a boolean (SC_TRUE if the resource is a peripheral). * * If \a resource is out of range then SC_FALSE is returned. @@ -527,15 +585,18 @@ sc_err_t sc_rm_get_resource_info(sc_ipc_t ipc, sc_rsrc_t resource, * - SC_ERR_UNAVAILABLE if memory region table is full (no more allocation * space) * - * The area covered by the memory region must currently be owned by the caller. - * By default, the new region will have access permission set to allow the - * caller to access. + * This function will create a new memory region. The area covered by the + * new region must already exist in a memory region owned by the caller. The + * result will be two memory regions, the new one overlapping the existing + * one. The new region has higher priority. See the XRDC2 MRC documentation + * for how it resolves access permissions in this case. By default, the new + * region will have access permission set to allow the caller to access. */ sc_err_t sc_rm_memreg_alloc(sc_ipc_t ipc, sc_rm_mr_t *mr, sc_faddr_t addr_start, sc_faddr_t addr_end); /*! - * This function requests that the SC split a memory region. + * This function requests that the SC split an existing memory region. * * @param[in] ipc IPC handle * @param[in] mr handle of memory region to split @@ -556,13 +617,43 @@ sc_err_t sc_rm_memreg_alloc(sc_ipc_t ipc, sc_rm_mr_t *mr, * - SC_ERR_UNAVAILABLE if memory region table is full (no more allocation * space) * - * Note the new region must start or end on the split region. + * This function will take an existing region and split it into two, + * non-overlapping regions. Note the new region must start or end on the + * split region. */ sc_err_t sc_rm_memreg_split(sc_ipc_t ipc, sc_rm_mr_t mr, sc_rm_mr_t *mr_ret, sc_faddr_t addr_start, sc_faddr_t addr_end); /*! + * This function requests that the SC fragment a memory region. + * + * @param[in] ipc IPC handle + * @param[out] mr_ret return handle for new region; used for + * subsequent function calls + * associated with this region + * @param[in] addr_start start address of region (physical) + * @param[in] addr_end end address of region (physical) + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_ERR_LOCKED if caller's partition is locked, + * - SC_ERR_PARM if the new memory region spans multiple existing regions, + * - SC_ERR_NOACCESS if caller's partition does not own the memory containing + * the new region, + * - SC_ERR_UNAVAILABLE if memory region table is full (no more allocation + * space) + * + * This function finds the memory region containing the address range. + * It then splits it as required and returns the extracted region. The + * result is 2-3 non-overlapping regions, depending on how the new region + * aligns with existing regions. + */ +sc_err_t sc_rm_memreg_frag(sc_ipc_t ipc, sc_rm_mr_t *mr_ret, + sc_faddr_t addr_start, sc_faddr_t addr_end); + +/*! * This function frees a memory region. * * @param[in] ipc IPC handle @@ -613,6 +704,12 @@ sc_err_t sc_rm_find_memreg(sc_ipc_t ipc, sc_rm_mr_t *mr, * * @return Returns an error code (SC_ERR_NONE = success). * + * This function assigns a memory region to a partition. This partition is then + * the owner. All regions always have an owner (one owner). The owner + * has various rights to make API calls affecting the region. Ownership + * does not imply access to the memory itself (that is based on access + * rights). + * * Return errors: * - SC_PARM if arguments out of range or invalid, * - SC_ERR_NOACCESS if caller's partition is not the \a mr owner or parent @@ -631,6 +728,10 @@ sc_err_t sc_rm_assign_memreg(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_mr_t mr); * applied for * @param[in] perm permissions to apply to \a mr for \a pt * + * This operates on the memory region specified. If SC_RM_PT_ALL is specified + * then it operates on all the regions owned by the caller that exist at the + * time of the call. + * * @return Returns an error code (SC_ERR_NONE = success). * * Return errors: @@ -709,6 +810,10 @@ sc_err_t sc_rm_assign_pad(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pad_t pad); * @param[in] pad_lst last pad for which flag should be set * @param[in] movable movable flag (SC_TRUE is movable) * + * This function assigned a pad to a partition. This partition is then + * the owner. All pads always have an owner (one owner). The owner + * has various rights to make API calls affecting the pad. + * * @return Returns an error code (SC_ERR_NONE = success). * * Return errors: @@ -752,6 +857,6 @@ void sc_rm_dump(sc_ipc_t ipc); /* @} */ -#endif /* SCI_RM_API_H */ +#endif /* SC_RM_API_H */ /**@}*/ diff --git a/plat/imx/common/include/sci/svc/seco/sci_seco_api.h b/plat/imx/common/include/sci/svc/seco/sci_seco_api.h new file mode 100644 index 00000000..b7a9342f --- /dev/null +++ b/plat/imx/common/include/sci/svc/seco/sci_seco_api.h @@ -0,0 +1,778 @@ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/*! + * Header file containing the public API for the System Controller (SC) + * Security (SECO) function. + * + * @addtogroup SECO_SVC SECO: Security Service + * + * Module for the Security (SECO) service. + * + * @anchor seco_err + * + * @includedoc seco/details.dox + * + * @{ + */ + +#ifndef SC_SECO_API_H +#define SC_SECO_API_H + +/* Includes */ + +#include <sci/sci_types.h> +#include <sci/svc/rm/sci_rm_api.h> + +/* Defines */ + +/*! + * @name Defines for sc_seco_auth_cmd_t + */ +/*@{*/ +#define SC_SECO_AUTH_CONTAINER 0U /* Authenticate container */ +#define SC_SECO_VERIFY_IMAGE 1U /* Verify image */ +#define SC_SECO_REL_CONTAINER 2U /* Release container */ +#define SC_SECO_AUTH_SECO_FW 3U /* SECO Firmware */ +#define SC_SECO_AUTH_HDMI_TX_FW 4U /* HDMI TX Firmware */ +#define SC_SECO_AUTH_HDMI_RX_FW 5U /* HDMI RX Firmware */ +#define SC_SECO_EVERIFY_IMAGE 6U /* Enhanced verify image */ +/*@}*/ + +/*! + * @name Defines for seco_rng_stat_t + */ +/*@{*/ +#define SC_SECO_RNG_STAT_UNAVAILABLE 0U /* Unable to initialize the RNG */ +#define SC_SECO_RNG_STAT_INPROGRESS 1U /* Initialization is on-going */ +#define SC_SECO_RNG_STAT_READY 2U /* Initialized */ +/*@}*/ + +/* Types */ + +/*! + * This type is used to issue SECO authenticate commands. + */ +typedef uint8_t sc_seco_auth_cmd_t; + +/*! + * This type is used to return the RNG initialization status. + */ +typedef uint32_t sc_seco_rng_stat_t; + +/* Functions */ + +/*! + * @name Image Functions + * @{ + */ + +/*! + * This function loads a SECO image. + * + * @param[in] ipc IPC handle + * @param[in] addr_src address of image source + * @param[in] addr_dst address of image destination + * @param[in] len length of image to load + * @param[in] fw SC_TRUE = firmware load + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if word fuse index param out of range or invalid, + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * This is used to load images via the SECO. Examples include SECO + * Firmware and IVT/CSF data used for authentication. These are usually + * loaded into SECO TCM. \a addr_src is in secure memory. + * + * See the <em>SECO API Reference Guide</em> for more info. + */ +sc_err_t sc_seco_image_load(sc_ipc_t ipc, sc_faddr_t addr_src, + sc_faddr_t addr_dst, uint32_t len, sc_bool_t fw); + +/*! + * This function is used to authenticate a SECO image or command. + * + * @param[in] ipc IPC handle + * @param[in] cmd authenticate command + * @param[in] addr address of/or metadata + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if word fuse index param out of range or invalid, + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_BUSY if SECO is busy with another authentication request, + * - SC_ERR_FAIL if SECO response is bad, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * This is used to authenticate a SECO image or issue a security + * command. \a addr often points to an container. It is also + * just data (or even unused) for some commands. + * + * Implementation of this command depends on the underlying security + * architecture of the device. For example, on devices with SECO FW, + * the following options apply: + * + * - cmd=SC_SECO_AUTH_CONTAINER, addr=container address (sends AHAB_AUTH_CONTAINER_REQ to SECO) + * - cmd=SC_SECO_VERIFY_IMAGE, addr=image mask (sends AHAB_VERIFY_IMAGE_REQ to SECO) + * - cmd=SC_SECO_REL_CONTAINER, addr unused (sends AHAB_RELEASE_CONTAINER_REQ to SECO) + * - cmd=SC_SECO_AUTH_HDMI_TX_FW, addr unused (sends AHAB_ENABLE_HDMI_X_REQ with Subsystem=0 to SECO) + * - cmd=SC_SECO_AUTH_HDMI_RX_FW, addr unused (sends AHAB_ENABLE_HDMI_X_REQ with Subsystem=1 to SECO) + * + * See the <em>SECO API Reference Guide</em> for more info. + */ +sc_err_t sc_seco_authenticate(sc_ipc_t ipc, + sc_seco_auth_cmd_t cmd, sc_faddr_t addr); + +/*! + * This function is used to authenticate a SECO image or command. This is an + * enhanced version that has additional mask arguments. + * + * @param[in] ipc IPC handle + * @param[in] cmd authenticate command + * @param[in] addr address of/or metadata + * @param[in] mask1 metadata + * @param[in] mask2 metadata + * + * Return errors codes: + * - SC_ERR_PARM if word fuse index param out of range or invalid, + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_BUSY if SECO is busy with another authentication request, + * - SC_ERR_FAIL if SECO response is bad, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * This supports all the commands found in sc_seco_authenticate(). Those + * commands should set both masks to 0 (except SC_SECO_VERIFY_IMAGE). + + * New commands are as follows: + * + * - cmd=SC_SECO_VERIFY_IMAGE, addr unused, mask1=image mask, mask2 unused (sends AHAB_VERIFY_IMAGE_REQ to SECO) + * - cmd=SC_SECO_EVERIFY_IMAGE, addr=container address, mask1=image mask, mask2=move mask (sends AHAB_EVERIFY_IMAGE_REQ to SECO) + * + * See the <em>SECO API Reference Guide</em> for more info. + */ +sc_err_t sc_seco_enh_authenticate(sc_ipc_t ipc, + sc_seco_auth_cmd_t cmd, sc_faddr_t addr, + uint32_t mask1, uint32_t mask2); + +/* @} */ + +/*! + * @name Lifecycle Functions + * @{ + */ + +/*! + * This function updates the lifecycle of the device. + * + * @param[in] ipc IPC handle + * @param[in] change desired lifecycle transition + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * This function is used for going from Open to NXP Closed to OEM Closed. + * Note \a change is NOT the new desired lifecycle. It is a lifecycle + * transition as documented in the <em>SECO API Reference Guide</em>. + * + * If any SECO request fails or only succeeds because the part is in an + * "OEM open" lifecycle, then a request to transition from "NXP closed" + * to "OEM closed" will also fail. For example, booting a signed container + * when the OEM SRK is not fused will succeed, but as it is an abnormal + * situation, a subsequent request to transition the lifecycle will return + * an error. + */ +sc_err_t sc_seco_forward_lifecycle(sc_ipc_t ipc, uint32_t change); + +/*! + * This function updates the lifecycle to one of the return lifecycles. + * + * @param[in] ipc IPC handle + * @param[in] addr address of message block + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * Note \a addr must be a pointer to a signed message block. + * + * To switch back to NXP states (Full Field Return), message must be signed + * by NXP SRK. For OEM States (Partial Field Return), must be signed by OEM + * SRK. + * + * See the <em>SECO API Reference Guide</em> for more info. + */ +sc_err_t sc_seco_return_lifecycle(sc_ipc_t ipc, sc_faddr_t addr); + +/*! + * This function is used to commit into the fuses any new SRK revocation + * and FW version information that have been found in the primary and + * secondary containers. + * + * @param[in] ipc IPC handle + * @param[in,out] info pointer to information type to be committed + * + * The return \a info will contain what was actually committed. + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if \a info is invalid, + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + */ +sc_err_t sc_seco_commit(sc_ipc_t ipc, uint32_t *info); + +/* @} */ + +/*! + * @name Attestation Functions + * @{ + */ + +/*! + * This function is used to set the attestation mode. Only the owner of + * the SC_R_ATTESTATION resource may make this call. + * + * @param[in] ipc IPC handle + * @param[in] mode mode + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if \a mode is invalid, + * - SC_ERR_NOACCESS if SC_R_ATTESTATON not owned by caller, + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * This is used to set the SECO attestation mode. This can be prover + * or verifier. See the <em>SECO API Reference Guide</em> for more on the + * supported modes, mode values, and mode behavior. + */ +sc_err_t sc_seco_attest_mode(sc_ipc_t ipc, uint32_t mode); + +/*! + * This function is used to request attestation. Only the owner of + * the SC_R_ATTESTATION resource may make this call. + * + * @param[in] ipc IPC handle + * @param[in] nonce unique value + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_NOACCESS if SC_R_ATTESTATON not owned by caller, + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * This is used to ask SECO to perform an attestation. The result depends + * on the attestation mode. After this call, the signature can be + * requested or a verify can be requested. + * + * See the <em>SECO API Reference Guide</em> for more info. + */ +sc_err_t sc_seco_attest(sc_ipc_t ipc, uint64_t nonce); + +/*! + * This function is used to retrieve the attestation public key. + * Mode must be verifier. Only the owner of the SC_R_ATTESTATION resource + * may make this call. + * + * @param[in] ipc IPC handle + * @param[in] addr address to write response + * + * Result will be written to \a addr. The \a addr parameter must point + * to an address SECO can access. It must be 64-bit aligned. There + * should be 96 bytes of space. + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if \a addr bad or attestation has not been requested, + * - SC_ERR_NOACCESS if SC_R_ATTESTATON not owned by caller, + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * See the <em>SECO API Reference Guide</em> for more info. + */ +sc_err_t sc_seco_get_attest_pkey(sc_ipc_t ipc, sc_faddr_t addr); + +/*! + * This function is used to retrieve attestation signature and parameters. + * Mode must be provider. Only the owner of the SC_R_ATTESTATION resource + * may make this call. + * + * @param[in] ipc IPC handle + * @param[in] addr address to write response + * + * Result will be written to \a addr. The \a addr parameter must point + * to an address SECO can access. It must be 64-bit aligned. There + * should be 120 bytes of space. + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if \a addr bad or attestation has not been requested, + * - SC_ERR_NOACCESS if SC_R_ATTESTATON not owned by caller, + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * See the <em>SECO API Reference Guide</em> for more info. + */ +sc_err_t sc_seco_get_attest_sign(sc_ipc_t ipc, sc_faddr_t addr); + +/*! + * This function is used to verify attestation. Mode must be verifier. + * Only the owner of the SC_R_ATTESTATION resource may make this call. + * + * @param[in] ipc IPC handle + * @param[in] addr address of signature + * + * The \a addr parameter must point to an address SECO can access. It must be + * 64-bit aligned. + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if \a addr bad or attestation has not been requested, + * - SC_ERR_NOACCESS if SC_R_ATTESTATON not owned by caller, + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_FAIL if signature doesn't match, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * See the <em>SECO API Reference Guide</em> for more info. + */ +sc_err_t sc_seco_attest_verify(sc_ipc_t ipc, sc_faddr_t addr); + +/* @} */ + +/*! + * @name Key Functions + * @{ + */ + +/*! + * This function is used to generate a SECO key blob. + * + * @param[in] ipc IPC handle + * @param[in] id key identifier + * @param[in] load_addr load address + * @param[in] export_addr export address + * @param[in] max_size max export size + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if word fuse index param out of range or invalid, + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * This function is used to encapsulate sensitive keys in a specific structure + * called a blob, which provides both confidentiality and integrity protection. + * + * See the <em>SECO API Reference Guide</em> for more info. + */ +sc_err_t sc_seco_gen_key_blob(sc_ipc_t ipc, uint32_t id, + sc_faddr_t load_addr, sc_faddr_t export_addr, + uint16_t max_size); + +/*! + * This function is used to load a SECO key. + * + * @param[in] ipc IPC handle + * @param[in] id key identifier + * @param[in] addr key address + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if word fuse index param out of range or invalid, + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * This function is used to install private cryptographic keys encapsulated + * in a blob previously generated by SECO. The controller can be either the + * IEE or the VPU. The blob header carries the controller type and the key + * size, as provided by the user when generating the key blob. + * + * See the <em>SECO API Reference Guide</em> for more info. + */ +sc_err_t sc_seco_load_key(sc_ipc_t ipc, uint32_t id, sc_faddr_t addr); + +/* @} */ + +/*! + * @name Manufacturing Protection Functions + * @{ + */ + +/*! + * This function is used to get the manufacturing protection public key. + * + * @param[in] ipc IPC handle + * @param[in] dst_addr destination address + * @param[in] dst_size destination size + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if word fuse index param out of range or invalid, + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * This function is supported only in OEM-closed lifecycle. It generates + * the mfg public key and stores it in a specific location in the secure + * memory. + * + * See the <em>SECO API Reference Guide</em> for more info. + */ +sc_err_t sc_seco_get_mp_key(sc_ipc_t ipc, sc_faddr_t dst_addr, + uint16_t dst_size); + +/*! + * This function is used to update the manufacturing protection message + * register. + * + * @param[in] ipc IPC handle + * @param[in] addr data address + * @param[in] size size + * @param[in] lock lock_reg + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if word fuse index param out of range or invalid, + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * This function is supported only in OEM-closed lifecycle. It updates the + * content of the MPMR (Manufacturing Protection Message register of 256 + * bits). This register will be appended to the input-data message when + * generating the signature. Please refer to the CAAM block guide for details. + * + * See the <em>SECO API Reference Guide</em> for more info. + */ +sc_err_t sc_seco_update_mpmr(sc_ipc_t ipc, sc_faddr_t addr, + uint8_t size, uint8_t lock); + +/*! + * This function is used to get the manufacturing protection signature. + * + * @param[in] ipc IPC handle + * @param[in] msg_addr message address + * @param[in] msg_size message size + * @param[in] dst_addr destination address + * @param[in] dst_size destination size + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if word fuse index param out of range or invalid, + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * This function is used to generate an ECDSA signature for an input-data + * message and to store it in a specific location in the secure memory. It + * is only supported in OEM-closed lifecycle. In order to get the ECDSA + * signature, the RNG must be initialized. In case it has not been started + * an error will be returned. + * + * See the <em>SECO API Reference Guide</em> for more info. + */ +sc_err_t sc_seco_get_mp_sign(sc_ipc_t ipc, sc_faddr_t msg_addr, + uint16_t msg_size, sc_faddr_t dst_addr, + uint16_t dst_size); + +/* @} */ + +/*! + * @name Debug Functions + * @{ + */ + +/*! + * This function is used to return the SECO FW build info. + * + * @param[in] ipc IPC handle + * @param[out] version pointer to return build number + * @param[out] commit pointer to return commit ID (git SHA-1) + */ +void sc_seco_build_info(sc_ipc_t ipc, uint32_t *version, uint32_t *commit); + +/*! + * This function is used to return SECO chip info. + * + * @param[in] ipc IPC handle + * @param[out] lc pointer to return lifecycle + * @param[out] monotonic pointer to return monotonic counter + * @param[out] uid_l pointer to return UID (lower 32 bits) + * @param[out] uid_h pointer to return UID (upper 32 bits) + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + */ +sc_err_t sc_seco_chip_info(sc_ipc_t ipc, uint16_t *lc, + uint16_t *monotonic, uint32_t *uid_l, + uint32_t *uid_h); + +/*! + * This function securely enables debug. + * + * @param[in] ipc IPC handle + * @param[in] addr address of message block + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * Note \a addr must be a pointer to a signed message block. + * + * See the <em>SECO API Reference Guide</em> for more info. + */ +sc_err_t sc_seco_enable_debug(sc_ipc_t ipc, sc_faddr_t addr); + +/*! + * This function is used to return an event from the SECO error log. + * + * @param[in] ipc IPC handle + * @param[out] idx index of event to return + * @param[out] event pointer to return event + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * Read of \a idx 0 captures events from SECO. Loop starting + * with 0 until an error is returned to dump all events. + */ +sc_err_t sc_seco_get_event(sc_ipc_t ipc, uint8_t idx, uint32_t *event); + +/* @} */ + +/*! + * @name Miscellaneous Functions + * @{ + */ + +/*! + * This function securely writes a group of fuse words. + * + * @param[in] ipc IPC handle + * @param[in] addr address of message block + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * Note \a addr must be a pointer to a signed message block. + * + * See the <em>SECO API Reference Guide</em> for more info. + */ +sc_err_t sc_seco_fuse_write(sc_ipc_t ipc, sc_faddr_t addr); + +/*! + * This function applies a patch. + * + * @param[in] ipc IPC handle + * @param[in] addr address of message block + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * Note \a addr must be a pointer to a signed message block. + * + * See the <em>SECO API Reference Guide</em> for more info. + */ +sc_err_t sc_seco_patch(sc_ipc_t ipc, sc_faddr_t addr); + +/*! + * This function starts the random number generator. + * + * @param[in] ipc IPC handle + * @param[out] status pointer to return state of RNG + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * The RNG is started automatically after all CPUs are booted. This + * function can be used to start earlier and to check the status. + * + * See the <em>SECO API Reference Guide</em> for more info. + */ +sc_err_t sc_seco_start_rng(sc_ipc_t ipc, sc_seco_rng_stat_t * status); + +/*! + * This function sends a generic signed message to the + * SECO SHE/HSM components. + * + * @param[in] ipc IPC handle + * @param[in] addr address of message block + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * Note \a addr must be a pointer to a signed message block. + * + * See the <em>SECO API Reference Guide</em> for more info. + */ +sc_err_t sc_seco_sab_msg(sc_ipc_t ipc, sc_faddr_t addr); + +/*! + * This function is used to enable security violation and tamper interrupts. + * These are then reported using the IRQ service via the SC_IRQ_SECVIO + * interrupt. Note it is automatically enabled at boot. + * + * @param[in] ipc IPC handle + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_NOACCESS if caller does not own SC_R_SECVIO, + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * The security violation interrupt is self-masking. Once it is cleared in + * the SNVS it must be re-enabled using this function. + */ +sc_err_t sc_seco_secvio_enable(sc_ipc_t ipc); + +/*! + * This function is used to read/write SNVS security violation + * and tamper registers. + * + * @param[in] ipc IPC handle + * @param[in] id register ID + * @param[in] access 0=read, 1=write + * @param[in] data0 pointer to data to read or write + * @param[in] data1 pointer to data to read or write + * @param[in] data2 pointer to data to read or write + * @param[in] data3 pointer to data to read or write + * @param[in] data4 pointer to data to read or write + * @param[in] size number of valid data words + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_NOACCESS if caller does not own SC_R_SECVIO, + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * Unused data words can be passed a NULL pointer. + * + * See AHAB_MANAGE_SNVS_REQ in the <em>SECO API Reference Guide</em> for + * more info. + */ +sc_err_t sc_seco_secvio_config(sc_ipc_t ipc, uint8_t id, uint8_t access, + uint32_t *data0, uint32_t *data1, + uint32_t *data2, uint32_t *data3, + uint32_t *data4, uint8_t size); + +/*! + * This function is used to read/write SNVS security violation + * and tamper DGO registers. + * + * @param[in] ipc IPC handle + * @param[in] id regsiter ID + * @param[in] access 0=read, 1=write + * @param[in] data pointer to data to read or write + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_NOACCESS if caller does not own SC_R_SECVIO, + * - SC_ERR_UNAVAILABLE if SECO not available, + * - SC_ERR_IPC if SECO response has bad header tag or size, + * - SC_ERR_VERSION if SECO response has bad version, + * - Others, see the [Security Service Detailed Description](\ref seco_err) section + * + * See AHAB_MANAGE_SNVS_DGO_REQ in the <em>SECO API Reference Guide</em> + * for more info. + */ +sc_err_t sc_seco_secvio_dgo_config(sc_ipc_t ipc, uint8_t id, + uint8_t access, uint32_t *data); + +/* @} */ + +#endif /* SC_SECO_API_H */ + +/**@}*/ diff --git a/plat/imx/common/include/sci/svc/timer/sci_timer_api.h b/plat/imx/common/include/sci/svc/timer/sci_timer_api.h index f8423ab0..8857b108 100644..100755 --- a/plat/imx/common/include/sci/svc/timer/sci_timer_api.h +++ b/plat/imx/common/include/sci/svc/timer/sci_timer_api.h @@ -9,7 +9,7 @@ * Header file containing the public API for the System Controller (SC) * Timer function. * - * @addtogroup TIMER_SVC (SVC) Timer Service + * @addtogroup TIMER_SVC TIMER: Timer Service * * Module for the Timer service. This includes support for the watchdog, RTC, * and system counter. Note every resource partition has a watchdog it can @@ -24,6 +24,7 @@ /* Includes */ #include <sci/sci_types.h> +#include <sci/svc/rm/sci_rm_api.h> /* Defines */ @@ -85,7 +86,7 @@ sc_err_t sc_timer_set_wdog_timeout(sc_ipc_t ipc, sc_timer_wdog_time_t timeout); * @param[in] ipc IPC handle * @param[in] pre_timeout pre-timeout period for the watchdog * - * When the pre-timeout expires an IRQ will be generated. Note this timeout + * When the pre-timout expires an IRQ will be generated. Note this timeout * clears when the IRQ is triggered. An IRQ is generated for the failing * partition and all of its child partitions. * @@ -102,8 +103,15 @@ sc_err_t sc_timer_set_wdog_pre_timeout(sc_ipc_t ipc, * * @return Returns an error code (SC_ERR_NONE = success). * + * Return errors: + * - SC_ERR_NOACCESS if caller's partition is not isolated + * * If \a lock is set then the watchdog cannot be stopped or the timeout * period changed. + * + * If the calling partition is not isolated then the wdog cannot be used. + * This is always the case if a non-secure partition is running on the same + * CPU as a secure partition (e.g. Linux under TZ). See sc_rm_partition_alloc(). */ sc_err_t sc_timer_start_wdog(sc_ipc_t ipc, sc_bool_t lock); @@ -191,7 +199,8 @@ sc_err_t sc_timer_set_wdog_action(sc_ipc_t ipc, /*! * This function sets the RTC time. Only the owner of the SC_R_SYSTEM - * resource can set the time. + * resource or a partition with access permissions to SC_R_SYSTEM can + * set the time. * * @param[in] ipc IPC handle * @param[in] year year (min 1970) @@ -205,7 +214,7 @@ sc_err_t sc_timer_set_wdog_action(sc_ipc_t ipc, * * Return errors: * - SC_ERR_PARM if invalid time/date parameters, - * - SC_ERR_NOACCESS if caller's partition is not the SYSTEM owner + * - SC_ERR_NOACCESS if caller's partition cannot access SC_R_SYSTEM */ sc_err_t sc_timer_set_rtc_time(sc_ipc_t ipc, uint16_t year, uint8_t mon, uint8_t day, uint8_t hour, uint8_t min, @@ -249,7 +258,8 @@ sc_err_t sc_timer_get_rtc_sec1970(sc_ipc_t ipc, uint32_t *sec); * @param[in] min minute (0-59) * @param[in] sec second (0-59) * - * Note this alarm setting clears when the alarm is triggered. + * Note this alarm setting clears when the alarm is triggered. This is an + * absolute time. * * @return Returns an error code (SC_ERR_NONE = success). * @@ -268,6 +278,8 @@ sc_err_t sc_timer_set_rtc_alarm(sc_ipc_t ipc, uint16_t year, uint8_t mon, * * @return Returns an error code (SC_ERR_NONE = success). * + * Note this is a relative time. + * * Return errors: * - SC_ERR_PARM if invalid time/date parameters */ @@ -289,14 +301,15 @@ sc_err_t sc_timer_cancel_rtc_alarm(sc_ipc_t ipc); /*! * This function sets the RTC calibration value. Only the owner of the SC_R_SYSTEM - * resource can set the calibration. + * resource or a partition with access permissions to SC_R_SYSTEM can set the + * calibration. * * @param[in] ipc IPC handle - * @param[in] count calbration count (-16 to 15) + * @param[in] count calibration count (-16 to 15) * * The calibration value is a 5-bit value including the sign bit, which is * implemented in 2's complement. It is added or subtracted from the RTC on - * a perdiodic basis, once per 32768 cycles of the RTC clock. + * a periodic basis, once per 32768 cycles of the RTC clock. * * @return Returns an error code (SC_ERR_NONE = success). */ @@ -315,7 +328,8 @@ sc_err_t sc_timer_set_rtc_calb(sc_ipc_t ipc, int8_t count); * @param[in] ipc IPC handle * @param[in] ticks number of 8MHz cycles * - * Note this alarm setting clears when the alarm is triggered. + * Note the \a ticks parameter is an absolute time. This alarm + * setting clears when the alarm is triggered. * * @return Returns an error code (SC_ERR_NONE = success). * @@ -330,6 +344,8 @@ sc_err_t sc_timer_set_sysctr_alarm(sc_ipc_t ipc, uint64_t ticks); * @param[in] ipc IPC handle * @param[in] ticks number of 8MHz cycles * + * Note the \a ticks parameter is a relative time. + * * @return Returns an error code (SC_ERR_NONE = success). * * Return errors: diff --git a/plat/imx/common/sci/ipc.c b/plat/imx/common/sci/ipc.c index 6491ca57..f329482f 100644..100755 --- a/plat/imx/common/sci/ipc.c +++ b/plat/imx/common/sci/ipc.c @@ -1,24 +1,23 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright 2017-2019 NXP * * SPDX-License-Identifier: BSD-3-Clause */ -#include <stdlib.h> - -#include <lib/bakery_lock.h> - #include <sci/sci_scfw.h> #include <sci/sci_ipc.h> #include <sci/sci_rpc.h> +#include <stdlib.h> + #include "imx8_mu.h" +#include <lib/bakery_lock.h> DEFINE_BAKERY_LOCK(sc_ipc_bakery_lock); #define sc_ipc_lock_init() bakery_lock_init(&sc_ipc_bakery_lock) #define sc_ipc_lock() bakery_lock_get(&sc_ipc_bakery_lock) #define sc_ipc_unlock() bakery_lock_release(&sc_ipc_bakery_lock) -void sc_call_rpc(sc_ipc_t ipc, sc_rpc_msg_t *msg, bool no_resp) +void sc_call_rpc(sc_ipc_t ipc, sc_rpc_msg_t *msg, sc_bool_t no_resp) { sc_ipc_lock(); @@ -90,7 +89,7 @@ void sc_ipc_read(sc_ipc_t ipc, void *data) } } -void sc_ipc_write(sc_ipc_t ipc, void *data) +void sc_ipc_write(sc_ipc_t ipc, const void *data) { sc_rpc_msg_t *msg = (sc_rpc_msg_t *) data; uint32_t base = ipc; diff --git a/plat/imx/common/sci/sci_api.mk b/plat/imx/common/sci/sci_api.mk index 92c7190e..cf54faf6 100644..100755 --- a/plat/imx/common/sci/sci_api.mk +++ b/plat/imx/common/sci/sci_api.mk @@ -1,5 +1,5 @@ # -# Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. +# Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. # # SPDX-License-Identifier: BSD-3-Clause # @@ -10,4 +10,6 @@ BL31_SOURCES += plat/imx/common/sci/ipc.c \ plat/imx/common/sci/svc/pm/pm_rpc_clnt.c \ plat/imx/common/sci/svc/rm/rm_rpc_clnt.c \ plat/imx/common/sci/svc/timer/timer_rpc_clnt.c \ - plat/imx/common/sci/svc/misc/misc_rpc_clnt.c + plat/imx/common/sci/svc/misc/misc_rpc_clnt.c \ + plat/imx/common/sci/svc/irq/irq_rpc_clnt.c \ + plat/imx/common/sci/svc/seco/seco_rpc_clnt.c diff --git a/plat/imx/common/sci/svc/irq/irq_rpc_clnt.c b/plat/imx/common/sci/svc/irq/irq_rpc_clnt.c new file mode 100644 index 00000000..a0f49584 --- /dev/null +++ b/plat/imx/common/sci/svc/irq/irq_rpc_clnt.c @@ -0,0 +1,79 @@ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/*! + * File containing client-side RPC functions for the IRQ service. These + * functions are ported to clients that communicate to the SC. + * + * @addtogroup IRQ_SVC + * @{ + */ + +/* Includes */ + +#include <sci/sci_types.h> +#include <sci/svc/rm/sci_rm_api.h> +#include <sci/svc/irq/sci_irq_api.h> +#include <sci/sci_rpc.h> +#include "sci_irq_rpc.h" +#include <stdlib.h> + +/* Local Defines */ + +/* Local Types */ + +/* Local Functions */ + +sc_err_t sc_irq_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_irq_group_t group, + uint32_t mask, sc_bool_t enable) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_IRQ); + RPC_FUNC(&msg) = U8(IRQ_FUNC_ENABLE); + + RPC_U32(&msg, 0U) = U32(mask); + RPC_U16(&msg, 4U) = U16(resource); + RPC_U8(&msg, 6U) = U8(group); + RPC_U8(&msg, 7U) = B2U8(enable); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_irq_status(sc_ipc_t ipc, sc_rsrc_t resource, sc_irq_group_t group, + uint32_t *status) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_IRQ); + RPC_FUNC(&msg) = U8(IRQ_FUNC_STATUS); + + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(group); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + if (status != NULL) { + *status = (uint32_t)RPC_U32(&msg, 0U); + } + + return err; +} + +/**@}*/ diff --git a/plat/imx/common/sci/svc/irq/sci_irq_rpc.h b/plat/imx/common/sci/svc/irq/sci_irq_rpc.h new file mode 100644 index 00000000..72c3375e --- /dev/null +++ b/plat/imx/common/sci/svc/irq/sci_irq_rpc.h @@ -0,0 +1,46 @@ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/*! + * Header file for the IRQ RPC implementation. + * + * @addtogroup IRQ_SVC + * @{ + */ + +#ifndef SC_IRQ_RPC_H +#define SC_IRQ_RPC_H + +/* Includes */ + +/* Defines */ + +/*! + * @name Defines for RPC IRQ function calls + */ +/*@{*/ +#define IRQ_FUNC_UNKNOWN 0 /* Unknown function */ +#define IRQ_FUNC_ENABLE 1U /* Index for sc_irq_enable() RPC call */ +#define IRQ_FUNC_STATUS 2U /* Index for sc_irq_status() RPC call */ +/*@}*/ + +/* Types */ + +/* Functions */ + +/*! + * This function dispatches an incoming IRQ RPC request. + * + * @param[in] caller_pt caller partition + * @param[in] mu MU message came from + * @param[in] msg pointer to RPC message + */ +void irq_dispatch(sc_rm_pt_t caller_pt, sc_rsrc_t mu, sc_rpc_msg_t *msg); + +#endif /* SC_IRQ_RPC_H */ + +/**@}*/ diff --git a/plat/imx/common/sci/svc/misc/misc_rpc_clnt.c b/plat/imx/common/sci/svc/misc/misc_rpc_clnt.c index 080de6a9..d9553b7c 100644 --- a/plat/imx/common/sci/svc/misc/misc_rpc_clnt.c +++ b/plat/imx/common/sci/svc/misc/misc_rpc_clnt.c @@ -1,6 +1,6 @@ /* * Copyright (C) 2016 Freescale Semiconductor, Inc. - * Copyright 2017-2018 NXP + * Copyright 2017-2019 NXP * * SPDX-License-Identifier: BSD-3-Clause */ @@ -19,8 +19,9 @@ #include <sci/svc/rm/sci_rm_api.h> #include <sci/svc/misc/sci_misc_api.h> #include <sci/sci_rpc.h> -#include <stdlib.h> #include "sci_misc_rpc.h" +#include <stdlib.h> + /* Local Defines */ @@ -28,479 +29,461 @@ /* Local Functions */ -sc_err_t sc_misc_set_control(sc_ipc_t ipc, sc_rsrc_t resource, - sc_ctrl_t ctrl, uint32_t val) +sc_err_t sc_misc_set_control(sc_ipc_t ipc, sc_rsrc_t resource, sc_ctrl_t ctrl, + uint32_t val) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_SET_CONTROL; - RPC_U32(&msg, 0U) = (uint32_t)ctrl; - RPC_U32(&msg, 4U) = (uint32_t)val; - RPC_U16(&msg, 8U) = (uint16_t)resource; RPC_SIZE(&msg) = 4U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SET_CONTROL); + + RPC_U32(&msg, 0U) = U32(ctrl); + RPC_U32(&msg, 4U) = U32(val); + RPC_U16(&msg, 8U) = U16(resource); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } -sc_err_t sc_misc_get_control(sc_ipc_t ipc, sc_rsrc_t resource, - sc_ctrl_t ctrl, uint32_t *val) +sc_err_t sc_misc_get_control(sc_ipc_t ipc, sc_rsrc_t resource, sc_ctrl_t ctrl, + uint32_t *val) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_GET_CONTROL; - RPC_U32(&msg, 0U) = (uint32_t)ctrl; - RPC_U16(&msg, 4U) = (uint16_t)resource; RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_GET_CONTROL); + + RPC_U32(&msg, 0U) = U32(ctrl); + RPC_U16(&msg, 4U) = U16(resource); sc_call_rpc(ipc, &msg, SC_FALSE); - if (val != NULL) - *val = RPC_U32(&msg, 0U); + err = (sc_err_t)RPC_R8(&msg); + + if (val != NULL) { + *val = (uint32_t)RPC_U32(&msg, 0U); + } - result = RPC_R8(&msg); - return (sc_err_t)result; + return err; } sc_err_t sc_misc_set_max_dma_group(sc_ipc_t ipc, sc_rm_pt_t pt, sc_misc_dma_group_t max) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_SET_MAX_DMA_GROUP; - RPC_U8(&msg, 0U) = (uint8_t)pt; - RPC_U8(&msg, 1U) = (uint8_t)max; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SET_MAX_DMA_GROUP); + + RPC_U8(&msg, 0U) = U8(pt); + RPC_U8(&msg, 1U) = U8(max); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_misc_set_dma_group(sc_ipc_t ipc, sc_rsrc_t resource, sc_misc_dma_group_t group) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_SET_DMA_GROUP; - RPC_U16(&msg, 0U) = (uint16_t)resource; - RPC_U8(&msg, 2U) = (uint8_t)group; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SET_DMA_GROUP); + + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(group); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } -sc_err_t sc_misc_seco_image_load(sc_ipc_t ipc, sc_faddr_t addr_src, - sc_faddr_t addr_dst, uint32_t len, - sc_bool_t fw) +void sc_misc_debug_out(sc_ipc_t ipc, uint8_t ch) { sc_rpc_msg_t msg; - uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_SECO_IMAGE_LOAD; - RPC_U32(&msg, 0U) = (uint32_t)(addr_src >> 32U); - RPC_U32(&msg, 4U) = (uint32_t)addr_src; - RPC_U32(&msg, 8U) = (uint32_t)(addr_dst >> 32U); - RPC_U32(&msg, 12U) = (uint32_t)addr_dst; - RPC_U32(&msg, 16U) = (uint32_t)len; - RPC_U8(&msg, 20U) = (uint8_t)fw; - RPC_SIZE(&msg) = 7U; + RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_DEBUG_OUT); - sc_call_rpc(ipc, &msg, SC_FALSE); + RPC_U8(&msg, 0U) = U8(ch); - result = RPC_R8(&msg); - return (sc_err_t)result; + sc_call_rpc(ipc, &msg, SC_FALSE); } -sc_err_t sc_misc_seco_authenticate(sc_ipc_t ipc, - sc_misc_seco_auth_cmd_t cmd, sc_faddr_t addr) +sc_err_t sc_misc_waveform_capture(sc_ipc_t ipc, sc_bool_t enable) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_SECO_AUTHENTICATE; - RPC_U32(&msg, 0U) = (uint32_t)(addr >> 32U); - RPC_U32(&msg, 4U) = (uint32_t)addr; - RPC_U8(&msg, 8U) = (uint8_t)cmd; - RPC_SIZE(&msg) = 4U; + RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_WAVEFORM_CAPTURE); + + RPC_U8(&msg, 0U) = B2U8(enable); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } -sc_err_t sc_misc_seco_fuse_write(sc_ipc_t ipc, sc_faddr_t addr) +void sc_misc_build_info(sc_ipc_t ipc, uint32_t *build, uint32_t *commit) { sc_rpc_msg_t msg; - uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_SECO_FUSE_WRITE; - RPC_U32(&msg, 0U) = (uint32_t)(addr >> 32U); - RPC_U32(&msg, 4U) = (uint32_t)addr; - RPC_SIZE(&msg) = 3U; + RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_BUILD_INFO); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + if (build != NULL) { + *build = (uint32_t)RPC_U32(&msg, 0U); + } + if (commit != NULL) { + *commit = (uint32_t)RPC_U32(&msg, 4U); + } } -sc_err_t sc_misc_seco_enable_debug(sc_ipc_t ipc, sc_faddr_t addr) +void sc_misc_api_ver(sc_ipc_t ipc, uint16_t *cl_maj, uint16_t *cl_min, + uint16_t *sv_maj, uint16_t *sv_min) { sc_rpc_msg_t msg; - uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_SECO_ENABLE_DEBUG; - RPC_U32(&msg, 0U) = (uint32_t)(addr >> 32U); - RPC_U32(&msg, 4U) = (uint32_t)addr; - RPC_SIZE(&msg) = 3U; + RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_API_VER); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + if (cl_maj != NULL) { + *cl_maj = (uint16_t)SCFW_API_VERSION_MAJOR; + } + if (cl_min != NULL) { + *cl_min = (uint16_t)SCFW_API_VERSION_MINOR; + } + if (sv_maj != NULL) { + *sv_maj = (uint16_t)RPC_U16(&msg, 4U); + } + if (sv_min != NULL) { + *sv_min = (uint16_t)RPC_U16(&msg, 6U); + } } -sc_err_t sc_misc_seco_forward_lifecycle(sc_ipc_t ipc, uint32_t lifecycle) +void sc_misc_unique_id(sc_ipc_t ipc, uint32_t *id_l, uint32_t *id_h) { sc_rpc_msg_t msg; - uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_SECO_FORWARD_LIFECYCLE; - RPC_U32(&msg, 0U) = (uint32_t)lifecycle; - RPC_SIZE(&msg) = 2U; + RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_UNIQUE_ID); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + if (id_l != NULL) { + *id_l = (uint32_t)RPC_U32(&msg, 0U); + } + if (id_h != NULL) { + *id_h = (uint32_t)RPC_U32(&msg, 4U); + } } -sc_err_t sc_misc_seco_return_lifecycle(sc_ipc_t ipc, sc_faddr_t addr) +sc_err_t sc_misc_set_ari(sc_ipc_t ipc, sc_rsrc_t resource, + sc_rsrc_t resource_mst, uint16_t ari, sc_bool_t enable) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_SECO_RETURN_LIFECYCLE; - RPC_U32(&msg, 0U) = (uint32_t)(addr >> 32U); - RPC_U32(&msg, 4U) = (uint32_t)addr; RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SET_ARI); + + RPC_U16(&msg, 0U) = U16(resource); + RPC_U16(&msg, 2U) = U16(resource_mst); + RPC_U16(&msg, 4U) = U16(ari); + RPC_U8(&msg, 6U) = B2U8(enable); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } -void sc_misc_seco_build_info(sc_ipc_t ipc, uint32_t *version, uint32_t *commit) +void sc_misc_boot_status(sc_ipc_t ipc, sc_misc_boot_status_t status) { sc_rpc_msg_t msg; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_SECO_BUILD_INFO; - RPC_SIZE(&msg) = 1U; - - sc_call_rpc(ipc, &msg, SC_FALSE); + RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_BOOT_STATUS); - if (version != NULL) - *version = RPC_U32(&msg, 0U); + RPC_U8(&msg, 0U) = U8(status); - if (commit != NULL) - *commit = RPC_U32(&msg, 4U); + sc_call_rpc(ipc, &msg, SC_TRUE); } -sc_err_t sc_misc_seco_chip_info(sc_ipc_t ipc, uint16_t *lc, - uint16_t *monotonic, uint32_t *uid_l, - uint32_t *uid_h) +sc_err_t sc_misc_boot_done(sc_ipc_t ipc, sc_rsrc_t cpu) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_SECO_CHIP_INFO; - RPC_SIZE(&msg) = 1U; - - sc_call_rpc(ipc, &msg, SC_FALSE); - - if (uid_l != NULL) - *uid_l = RPC_U32(&msg, 0U); + RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_BOOT_DONE); - if (uid_h != NULL) - *uid_h = RPC_U32(&msg, 4U); + RPC_U16(&msg, 0U) = U16(cpu); - if (lc != NULL) - *lc = RPC_U16(&msg, 8U); + sc_call_rpc(ipc, &msg, SC_FALSE); - if (monotonic != NULL) - *monotonic = RPC_U16(&msg, 10U); + err = (sc_err_t)RPC_R8(&msg); - result = RPC_R8(&msg); - return (sc_err_t)result; + return err; } -void sc_misc_debug_out(sc_ipc_t ipc, uint8_t ch) +sc_err_t sc_misc_otp_fuse_read(sc_ipc_t ipc, uint32_t word, uint32_t *val) { sc_rpc_msg_t msg; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_DEBUG_OUT; - RPC_U8(&msg, 0U) = (uint8_t)ch; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_OTP_FUSE_READ); + + RPC_U32(&msg, 0U) = U32(word); sc_call_rpc(ipc, &msg, SC_FALSE); -} -sc_err_t sc_misc_waveform_capture(sc_ipc_t ipc, sc_bool_t enable) -{ - sc_rpc_msg_t msg; - uint8_t result; + err = (sc_err_t)RPC_R8(&msg); - RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_WAVEFORM_CAPTURE; - RPC_U8(&msg, 0U) = (uint8_t)enable; - RPC_SIZE(&msg) = 2U; + if (val != NULL) { + *val = (uint32_t)RPC_U32(&msg, 0U); + } - sc_call_rpc(ipc, &msg, SC_FALSE); - - result = RPC_R8(&msg); - return (sc_err_t)result; + return err; } -void sc_misc_build_info(sc_ipc_t ipc, uint32_t *build, uint32_t *commit) +sc_err_t sc_misc_otp_fuse_write(sc_ipc_t ipc, uint32_t word, uint32_t val) { sc_rpc_msg_t msg; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_BUILD_INFO; - RPC_SIZE(&msg) = 1U; + RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_OTP_FUSE_WRITE); + + RPC_U32(&msg, 0U) = U32(word); + RPC_U32(&msg, 4U) = U32(val); sc_call_rpc(ipc, &msg, SC_FALSE); - if (build != NULL) - *build = RPC_U32(&msg, 0U); + err = (sc_err_t)RPC_R8(&msg); - if (commit != NULL) - *commit = RPC_U32(&msg, 4U); + return err; } -void sc_misc_unique_id(sc_ipc_t ipc, uint32_t *id_l, uint32_t *id_h) +sc_err_t sc_misc_set_temp(sc_ipc_t ipc, sc_rsrc_t resource, sc_misc_temp_t temp, + int16_t celsius, int8_t tenths) { sc_rpc_msg_t msg; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_UNIQUE_ID; - RPC_SIZE(&msg) = 1U; + RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SET_TEMP); + + RPC_U16(&msg, 0U) = U16(resource); + RPC_I16(&msg, 2U) = I16(celsius); + RPC_U8(&msg, 4U) = U8(temp); + RPC_I8(&msg, 5U) = I8(tenths); sc_call_rpc(ipc, &msg, SC_FALSE); - if (id_l != NULL) - *id_l = RPC_U32(&msg, 0U); + err = (sc_err_t)RPC_R8(&msg); - if (id_h != NULL) - *id_h = RPC_U32(&msg, 4U); + return err; } -sc_err_t sc_misc_set_ari(sc_ipc_t ipc, sc_rsrc_t resource, - sc_rsrc_t resource_mst, uint16_t ari, sc_bool_t enable) +sc_err_t sc_misc_get_temp(sc_ipc_t ipc, sc_rsrc_t resource, sc_misc_temp_t temp, + int16_t * celsius, int8_t * tenths) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_SET_ARI; - RPC_U16(&msg, 0U) = (uint16_t)resource; - RPC_U16(&msg, 2U) = (uint16_t)resource_mst; - RPC_U16(&msg, 4U) = (uint16_t)ari; - RPC_U8(&msg, 6U) = (uint8_t)enable; - RPC_SIZE(&msg) = 3U; + RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_GET_TEMP); + + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(temp); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; -} + err = (sc_err_t)RPC_R8(&msg); -void sc_misc_boot_status(sc_ipc_t ipc, sc_misc_boot_status_t status) -{ - sc_rpc_msg_t msg; + if (celsius != NULL) { + *celsius = (int16_t) RPC_I16(&msg, 0U); + } + if (tenths != NULL) { + *tenths = (int8_t) RPC_I8(&msg, 2U); + } - RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_BOOT_STATUS; - RPC_U8(&msg, 0U) = (uint8_t)status; - RPC_SIZE(&msg) = 2U; - - sc_call_rpc(ipc, &msg, SC_TRUE); + return err; } -sc_err_t sc_misc_boot_done(sc_ipc_t ipc, sc_rsrc_t cpu) +void sc_misc_get_boot_dev(sc_ipc_t ipc, sc_rsrc_t * dev) { sc_rpc_msg_t msg; - uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_BOOT_DONE; - RPC_U16(&msg, 0U) = (uint16_t)cpu; - RPC_SIZE(&msg) = 2U; + RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_GET_BOOT_DEV); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + if (dev != NULL) { + *dev = (sc_rsrc_t) RPC_U16(&msg, 0U); + } } -sc_err_t sc_misc_otp_fuse_read(sc_ipc_t ipc, uint32_t word, uint32_t *val) +sc_err_t sc_misc_get_boot_type(sc_ipc_t ipc, sc_misc_bt_t * type) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_OTP_FUSE_READ; - RPC_U32(&msg, 0U) = (uint32_t)word; - RPC_SIZE(&msg) = 2U; + RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_GET_BOOT_TYPE); sc_call_rpc(ipc, &msg, SC_FALSE); - if (val != NULL) - *val = RPC_U32(&msg, 0U); + err = (sc_err_t)RPC_R8(&msg); + + if (type != NULL) { + *type = (sc_misc_bt_t) RPC_U8(&msg, 0U); + } - result = RPC_R8(&msg); - return (sc_err_t)result; + return err; } -sc_err_t sc_misc_otp_fuse_write(sc_ipc_t ipc, uint32_t word, uint32_t val) +sc_err_t sc_misc_get_boot_container(sc_ipc_t ipc, uint8_t *idx) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_OTP_FUSE_WRITE; - RPC_U32(&msg, 0U) = (uint32_t)word; - RPC_U32(&msg, 4U) = (uint32_t)val; - RPC_SIZE(&msg) = 3U; + RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_GET_BOOT_CONTAINER); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + if (idx != NULL) { + *idx = (uint8_t)RPC_U8(&msg, 0U); + } + + return err; } -sc_err_t sc_misc_set_temp(sc_ipc_t ipc, sc_rsrc_t resource, - sc_misc_temp_t temp, int16_t celsius, int8_t tenths) +void sc_misc_get_button_status(sc_ipc_t ipc, sc_bool_t *status) { sc_rpc_msg_t msg; - uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_SET_TEMP; - RPC_U16(&msg, 0U) = (uint16_t)resource; - RPC_I16(&msg, 2U) = (int16_t) celsius; - RPC_U8(&msg, 4U) = (uint8_t)temp; - RPC_I8(&msg, 5U) = (int8_t) tenths; - RPC_SIZE(&msg) = 3U; + RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_GET_BUTTON_STATUS); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + if (status != NULL) { + *status = (sc_bool_t)U2B(RPC_U8(&msg, 0U)); + } } -sc_err_t sc_misc_get_temp(sc_ipc_t ipc, sc_rsrc_t resource, - sc_misc_temp_t temp, int16_t *celsius, - int8_t *tenths) +sc_err_t sc_misc_rompatch_checksum(sc_ipc_t ipc, uint32_t *checksum) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_GET_TEMP; - RPC_U16(&msg, 0U) = (uint16_t)resource; - RPC_U8(&msg, 2U) = (uint8_t)temp; - RPC_SIZE(&msg) = 2U; + RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_ROMPATCH_CHECKSUM); sc_call_rpc(ipc, &msg, SC_FALSE); - if (celsius != NULL) - *celsius = RPC_I16(&msg, 0U); + err = (sc_err_t)RPC_R8(&msg); - result = RPC_R8(&msg); - if (tenths != NULL) - *tenths = RPC_I8(&msg, 2U); + if (checksum != NULL) { + *checksum = (uint32_t)RPC_U32(&msg, 0U); + } - return (sc_err_t)result; + return err; } -void sc_misc_get_boot_dev(sc_ipc_t ipc, sc_rsrc_t *dev) +sc_err_t sc_misc_board_ioctl(sc_ipc_t ipc, uint32_t *parm1, uint32_t *parm2, + uint32_t *parm3) { sc_rpc_msg_t msg; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_GET_BOOT_DEV; - RPC_SIZE(&msg) = 1U; - - sc_call_rpc(ipc, &msg, SC_FALSE); + RPC_SIZE(&msg) = 4U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_BOARD_IOCTL); - if (dev != NULL) - *dev = RPC_U16(&msg, 0U); -} + RPC_U32(&msg, 0U) = U32(*parm1); + RPC_U32(&msg, 4U) = U32(*parm2); + RPC_U32(&msg, 8U) = U32(*parm3); -void sc_misc_get_button_status(sc_ipc_t ipc, sc_bool_t *status) -{ - sc_rpc_msg_t msg; + sc_call_rpc(ipc, &msg, SC_FALSE); - RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t)MISC_FUNC_GET_BUTTON_STATUS; - RPC_SIZE(&msg) = 1U; + err = (sc_err_t)RPC_R8(&msg); - sc_call_rpc(ipc, &msg, SC_FALSE); + *parm1 = (uint32_t)RPC_U32(&msg, 0U); + *parm2 = (uint32_t)RPC_U32(&msg, 4U); + *parm3 = (uint32_t)RPC_U32(&msg, 8U); - if (status != NULL) - *status = RPC_U8(&msg, 0U); + return err; } /**@}*/ diff --git a/plat/imx/common/sci/svc/misc/sci_misc_rpc.h b/plat/imx/common/sci/svc/misc/sci_misc_rpc.h index 03b1a51a..d9c6ffb2 100644 --- a/plat/imx/common/sci/svc/misc/sci_misc_rpc.h +++ b/plat/imx/common/sci/svc/misc/sci_misc_rpc.h @@ -24,31 +24,28 @@ */ /*@{*/ #define MISC_FUNC_UNKNOWN 0 /* Unknown function */ -#define MISC_FUNC_SET_CONTROL 1U /* Index for misc_set_control() RPC call */ -#define MISC_FUNC_GET_CONTROL 2U /* Index for misc_get_control() RPC call */ -#define MISC_FUNC_SET_MAX_DMA_GROUP 4U /* Index for misc_set_max_dma_group() RPC call */ -#define MISC_FUNC_SET_DMA_GROUP 5U /* Index for misc_set_dma_group() RPC call */ -#define MISC_FUNC_SECO_IMAGE_LOAD 8U /* Index for misc_seco_image_load() RPC call */ -#define MISC_FUNC_SECO_AUTHENTICATE 9U /* Index for misc_seco_authenticate() RPC call */ -#define MISC_FUNC_SECO_FUSE_WRITE 20U /* Index for misc_seco_fuse_write() RPC call */ -#define MISC_FUNC_SECO_ENABLE_DEBUG 21U /* Index for misc_seco_enable_debug() RPC call */ -#define MISC_FUNC_SECO_FORWARD_LIFECYCLE 22U /* Index for misc_seco_forward_lifecycle() RPC call */ -#define MISC_FUNC_SECO_RETURN_LIFECYCLE 23U /* Index for misc_seco_return_lifecycle() RPC call */ -#define MISC_FUNC_SECO_BUILD_INFO 24U /* Index for misc_seco_build_info() RPC call */ -#define MISC_FUNC_SECO_CHIP_INFO 25U /* Index for misc_seco_chip_info() RPC call */ -#define MISC_FUNC_DEBUG_OUT 10U /* Index for misc_debug_out() RPC call */ -#define MISC_FUNC_WAVEFORM_CAPTURE 6U /* Index for misc_waveform_capture() RPC call */ -#define MISC_FUNC_BUILD_INFO 15U /* Index for misc_build_info() RPC call */ -#define MISC_FUNC_UNIQUE_ID 19U /* Index for misc_unique_id() RPC call */ -#define MISC_FUNC_SET_ARI 3U /* Index for misc_set_ari() RPC call */ -#define MISC_FUNC_BOOT_STATUS 7U /* Index for misc_boot_status() RPC call */ -#define MISC_FUNC_BOOT_DONE 14U /* Index for misc_boot_done() RPC call */ -#define MISC_FUNC_OTP_FUSE_READ 11U /* Index for misc_otp_fuse_read() RPC call */ -#define MISC_FUNC_OTP_FUSE_WRITE 17U /* Index for misc_otp_fuse_write() RPC call */ -#define MISC_FUNC_SET_TEMP 12U /* Index for misc_set_temp() RPC call */ -#define MISC_FUNC_GET_TEMP 13U /* Index for misc_get_temp() RPC call */ -#define MISC_FUNC_GET_BOOT_DEV 16U /* Index for misc_get_boot_dev() RPC call */ -#define MISC_FUNC_GET_BUTTON_STATUS 18U /* Index for misc_get_button_status() RPC call */ +#define MISC_FUNC_SET_CONTROL 1U /* Index for sc_misc_set_control() RPC call */ +#define MISC_FUNC_GET_CONTROL 2U /* Index for sc_misc_get_control() RPC call */ +#define MISC_FUNC_SET_MAX_DMA_GROUP 4U /* Index for sc_misc_set_max_dma_group() RPC call */ +#define MISC_FUNC_SET_DMA_GROUP 5U /* Index for sc_misc_set_dma_group() RPC call */ +#define MISC_FUNC_DEBUG_OUT 10U /* Index for sc_misc_debug_out() RPC call */ +#define MISC_FUNC_WAVEFORM_CAPTURE 6U /* Index for sc_misc_waveform_capture() RPC call */ +#define MISC_FUNC_BUILD_INFO 15U /* Index for sc_misc_build_info() RPC call */ +#define MISC_FUNC_API_VER 35U /* Index for sc_misc_api_ver() RPC call */ +#define MISC_FUNC_UNIQUE_ID 19U /* Index for sc_misc_unique_id() RPC call */ +#define MISC_FUNC_SET_ARI 3U /* Index for sc_misc_set_ari() RPC call */ +#define MISC_FUNC_BOOT_STATUS 7U /* Index for sc_misc_boot_status() RPC call */ +#define MISC_FUNC_BOOT_DONE 14U /* Index for sc_misc_boot_done() RPC call */ +#define MISC_FUNC_OTP_FUSE_READ 11U /* Index for sc_misc_otp_fuse_read() RPC call */ +#define MISC_FUNC_OTP_FUSE_WRITE 17U /* Index for sc_misc_otp_fuse_write() RPC call */ +#define MISC_FUNC_SET_TEMP 12U /* Index for sc_misc_set_temp() RPC call */ +#define MISC_FUNC_GET_TEMP 13U /* Index for sc_misc_get_temp() RPC call */ +#define MISC_FUNC_GET_BOOT_DEV 16U /* Index for sc_misc_get_boot_dev() RPC call */ +#define MISC_FUNC_GET_BOOT_TYPE 33U /* Index for sc_misc_get_boot_type() RPC call */ +#define MISC_FUNC_GET_BOOT_CONTAINER 36U /* Index for sc_misc_get_boot_container() RPC call */ +#define MISC_FUNC_GET_BUTTON_STATUS 18U /* Index for sc_misc_get_button_status() RPC call */ +#define MISC_FUNC_ROMPATCH_CHECKSUM 26U /* Index for sc_misc_rompatch_checksum() RPC call */ +#define MISC_FUNC_BOARD_IOCTL 34U /* Index for sc_misc_board_ioctl() RPC call */ /*@}*/ /* Types */ @@ -59,17 +56,10 @@ * This function dispatches an incoming MISC RPC request. * * @param[in] caller_pt caller partition + * @param[in] mu MU message came from * @param[in] msg pointer to RPC message */ -void misc_dispatch(sc_rm_pt_t caller_pt, sc_rpc_msg_t *msg); - -/*! - * This function translates and dispatches an MISC RPC request. - * - * @param[in] ipc IPC handle - * @param[in] msg pointer to RPC message - */ -void misc_xlate(sc_ipc_t ipc, sc_rpc_msg_t *msg); +void misc_dispatch(sc_rm_pt_t caller_pt, sc_rsrc_t mu, sc_rpc_msg_t *msg); #endif /* SC_MISC_RPC_H */ diff --git a/plat/imx/common/sci/svc/pad/pad_rpc_clnt.c b/plat/imx/common/sci/svc/pad/pad_rpc_clnt.c index 319d4696..1be5f0b2 100644 --- a/plat/imx/common/sci/svc/pad/pad_rpc_clnt.c +++ b/plat/imx/common/sci/svc/pad/pad_rpc_clnt.c @@ -1,5 +1,6 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP * * SPDX-License-Identifier: BSD-3-Clause */ @@ -14,13 +15,12 @@ /* Includes */ -#include <stdlib.h> - #include <sci/sci_types.h> #include <sci/svc/rm/sci_rm_api.h> #include <sci/svc/pad/sci_pad_api.h> #include <sci/sci_rpc.h> #include "sci_pad_rpc.h" +#include <stdlib.h> /* Local Defines */ @@ -28,134 +28,143 @@ /* Local Functions */ -sc_err_t sc_pad_set_mux(sc_ipc_t ipc, sc_pad_t pad, - uint8_t mux, sc_pad_config_t config, sc_pad_iso_t iso) +sc_err_t sc_pad_set_mux(sc_ipc_t ipc, sc_pad_t pad, uint8_t mux, + sc_pad_config_t config, sc_pad_iso_t iso) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t)PAD_FUNC_SET_MUX; - RPC_U16(&msg, 0U) = (uint16_t)pad; - RPC_U8(&msg, 2U) = (uint8_t)mux; - RPC_U8(&msg, 3U) = (uint8_t)config; - RPC_U8(&msg, 4U) = (uint8_t)iso; RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_SET_MUX); + + RPC_U16(&msg, 0U) = U16(pad); + RPC_U8(&msg, 2U) = U8(mux); + RPC_U8(&msg, 3U) = U8(config); + RPC_U8(&msg, 4U) = U8(iso); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } -sc_err_t sc_pad_get_mux(sc_ipc_t ipc, sc_pad_t pad, - uint8_t *mux, sc_pad_config_t *config, - sc_pad_iso_t *iso) +sc_err_t sc_pad_get_mux(sc_ipc_t ipc, sc_pad_t pad, uint8_t *mux, + sc_pad_config_t *config, sc_pad_iso_t *iso) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t)PAD_FUNC_GET_MUX; - RPC_U16(&msg, 0U) = (uint16_t)pad; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_GET_MUX); + + RPC_U16(&msg, 0U) = U16(pad); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); + err = (sc_err_t)RPC_R8(&msg); + if (mux != NULL) { - *mux = RPC_U8(&msg, 0U); + *mux = (uint8_t)RPC_U8(&msg, 0U); } - if (config != NULL) { - *config = RPC_U8(&msg, 1U); + *config = (sc_pad_config_t)RPC_U8(&msg, 1U); } - if (iso != NULL) { - *iso = RPC_U8(&msg, 2U); + *iso = (sc_pad_iso_t)RPC_U8(&msg, 2U); } - return (sc_err_t)result; + return err; } sc_err_t sc_pad_set_gp(sc_ipc_t ipc, sc_pad_t pad, uint32_t ctrl) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t)PAD_FUNC_SET_GP; - RPC_U32(&msg, 0U) = (uint32_t)ctrl; - RPC_U16(&msg, 4U) = (uint16_t)pad; RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_SET_GP); + + RPC_U32(&msg, 0U) = U32(ctrl); + RPC_U16(&msg, 4U) = U16(pad); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_pad_get_gp(sc_ipc_t ipc, sc_pad_t pad, uint32_t *ctrl) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t)PAD_FUNC_GET_GP; - RPC_U16(&msg, 0U) = (uint16_t)pad; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_GET_GP); + + RPC_U16(&msg, 0U) = U16(pad); sc_call_rpc(ipc, &msg, SC_FALSE); + err = (sc_err_t)RPC_R8(&msg); + if (ctrl != NULL) { - *ctrl = RPC_U32(&msg, 0U); + *ctrl = (uint32_t)RPC_U32(&msg, 0U); } - result = RPC_R8(&msg); - return (sc_err_t)result; + return err; } sc_err_t sc_pad_set_wakeup(sc_ipc_t ipc, sc_pad_t pad, sc_pad_wakeup_t wakeup) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t)PAD_FUNC_SET_WAKEUP; - RPC_U16(&msg, 0U) = (uint16_t)pad; - RPC_U8(&msg, 2U) = (uint8_t)wakeup; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_SET_WAKEUP); + + RPC_U16(&msg, 0U) = U16(pad); + RPC_U8(&msg, 2U) = U8(wakeup); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_pad_get_wakeup(sc_ipc_t ipc, sc_pad_t pad, sc_pad_wakeup_t *wakeup) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t)PAD_FUNC_GET_WAKEUP; - RPC_U16(&msg, 0U) = (uint16_t)pad; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_GET_WAKEUP); + + RPC_U16(&msg, 0U) = U16(pad); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); + err = (sc_err_t)RPC_R8(&msg); + if (wakeup != NULL) { - *wakeup = RPC_U8(&msg, 0U); + *wakeup = (sc_pad_wakeup_t)RPC_U8(&msg, 0U); } - return (sc_err_t)result; + return err; } sc_err_t sc_pad_set_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t mux, @@ -163,23 +172,25 @@ sc_err_t sc_pad_set_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t mux, sc_pad_wakeup_t wakeup) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t)PAD_FUNC_SET_ALL; - RPC_U32(&msg, 0U) = (uint32_t)ctrl; - RPC_U16(&msg, 4U) = (uint16_t)pad; - RPC_U8(&msg, 6U) = (uint8_t)mux; - RPC_U8(&msg, 7U) = (uint8_t)config; - RPC_U8(&msg, 8U) = (uint8_t)iso; - RPC_U8(&msg, 9U) = (uint8_t)wakeup; RPC_SIZE(&msg) = 4U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_SET_ALL); + + RPC_U32(&msg, 0U) = U32(ctrl); + RPC_U16(&msg, 4U) = U16(pad); + RPC_U8(&msg, 6U) = U8(mux); + RPC_U8(&msg, 7U) = U8(config); + RPC_U8(&msg, 8U) = U8(iso); + RPC_U8(&msg, 9U) = U8(wakeup); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_pad_get_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t *mux, @@ -187,97 +198,101 @@ sc_err_t sc_pad_get_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t *mux, uint32_t *ctrl, sc_pad_wakeup_t *wakeup) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t)PAD_FUNC_GET_ALL; - RPC_U16(&msg, 0U) = (uint16_t)pad; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_GET_ALL); + + RPC_U16(&msg, 0U) = U16(pad); sc_call_rpc(ipc, &msg, SC_FALSE); + err = (sc_err_t)RPC_R8(&msg); + if (ctrl != NULL) { - *ctrl = RPC_U32(&msg, 0U); + *ctrl = (uint32_t)RPC_U32(&msg, 0U); } - - result = RPC_R8(&msg); if (mux != NULL) { - *mux = RPC_U8(&msg, 4U); + *mux = (uint8_t)RPC_U8(&msg, 4U); } - if (config != NULL) { - *config = RPC_U8(&msg, 5U); + *config = (sc_pad_config_t)RPC_U8(&msg, 5U); } - if (iso != NULL) { - *iso = RPC_U8(&msg, 6U); + *iso = (sc_pad_iso_t)RPC_U8(&msg, 6U); } - if (wakeup != NULL) { - *wakeup = RPC_U8(&msg, 7U); + *wakeup = (sc_pad_wakeup_t)RPC_U8(&msg, 7U); } - return (sc_err_t)result; + return err; } sc_err_t sc_pad_set(sc_ipc_t ipc, sc_pad_t pad, uint32_t val) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t)PAD_FUNC_SET; - RPC_U32(&msg, 0U) = (uint32_t)val; - RPC_U16(&msg, 4U) = (uint16_t)pad; RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_SET); + + RPC_U32(&msg, 0U) = U32(val); + RPC_U16(&msg, 4U) = U16(pad); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_pad_get(sc_ipc_t ipc, sc_pad_t pad, uint32_t *val) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t)PAD_FUNC_GET; - RPC_U16(&msg, 0U) = (uint16_t)pad; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_GET); + + RPC_U16(&msg, 0U) = U16(pad); sc_call_rpc(ipc, &msg, SC_FALSE); + err = (sc_err_t)RPC_R8(&msg); + if (val != NULL) { - *val = RPC_U32(&msg, 0U); + *val = (uint32_t)RPC_U32(&msg, 0U); } - result = RPC_R8(&msg); - return (sc_err_t)result; + return err; } sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad, sc_pad_28fdsoi_dse_t dse, sc_pad_28fdsoi_ps_t ps) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t)PAD_FUNC_SET_GP_28FDSOI; - RPC_U16(&msg, 0U) = (uint16_t)pad; - RPC_U8(&msg, 2U) = (uint8_t)dse; - RPC_U8(&msg, 3U) = (uint8_t)ps; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_SET_GP_28FDSOI); + + RPC_U16(&msg, 0U) = U16(pad); + RPC_U8(&msg, 2U) = U8(dse); + RPC_U8(&msg, 3U) = U8(ps); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad, @@ -285,26 +300,27 @@ sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad, sc_pad_28fdsoi_ps_t *ps) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t)PAD_FUNC_GET_GP_28FDSOI; - RPC_U16(&msg, 0U) = (uint16_t)pad; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_GET_GP_28FDSOI); + + RPC_U16(&msg, 0U) = U16(pad); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); + err = (sc_err_t)RPC_R8(&msg); + if (dse != NULL) { - *dse = RPC_U8(&msg, 0U); + *dse = (sc_pad_28fdsoi_dse_t)RPC_U8(&msg, 0U); } - if (ps != NULL) { - *ps = RPC_U8(&msg, 1U); + *ps = (sc_pad_28fdsoi_ps_t)RPC_U8(&msg, 1U); } - return (sc_err_t)result; + return err; } sc_err_t sc_pad_set_gp_28fdsoi_hsic(sc_ipc_t ipc, sc_pad_t pad, @@ -313,142 +329,139 @@ sc_err_t sc_pad_set_gp_28fdsoi_hsic(sc_ipc_t ipc, sc_pad_t pad, sc_bool_t pue) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t)PAD_FUNC_SET_GP_28FDSOI_HSIC; - RPC_U16(&msg, 0U) = (uint16_t)pad; - RPC_U8(&msg, 2U) = (uint8_t)dse; - RPC_U8(&msg, 3U) = (uint8_t)pus; - RPC_U8(&msg, 4U) = (uint8_t)hys; - RPC_U8(&msg, 5U) = (uint8_t)pke; - RPC_U8(&msg, 6U) = (uint8_t)pue; RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_SET_GP_28FDSOI_HSIC); + + RPC_U16(&msg, 0U) = U16(pad); + RPC_U8(&msg, 2U) = U8(dse); + RPC_U8(&msg, 3U) = U8(pus); + RPC_U8(&msg, 4U) = B2U8(hys); + RPC_U8(&msg, 5U) = B2U8(pke); + RPC_U8(&msg, 6U) = B2U8(pue); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_pad_get_gp_28fdsoi_hsic(sc_ipc_t ipc, sc_pad_t pad, sc_pad_28fdsoi_dse_t *dse, sc_bool_t *hys, - sc_pad_28fdsoi_pus_t *pus, sc_bool_t *pke, + sc_pad_28fdsoi_pus_t * pus, sc_bool_t *pke, sc_bool_t *pue) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t)PAD_FUNC_GET_GP_28FDSOI_HSIC; - RPC_U16(&msg, 0U) = (uint16_t)pad; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_GET_GP_28FDSOI_HSIC); + + RPC_U16(&msg, 0U) = U16(pad); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); + err = (sc_err_t)RPC_R8(&msg); + if (dse != NULL) { - *dse = RPC_U8(&msg, 0U); + *dse = (sc_pad_28fdsoi_dse_t)RPC_U8(&msg, 0U); } - if (pus != NULL) { - *pus = RPC_U8(&msg, 1U); + *pus = (sc_pad_28fdsoi_pus_t) RPC_U8(&msg, 1U); } - if (hys != NULL) { - *hys = RPC_U8(&msg, 2U); + *hys = (sc_bool_t)U2B(RPC_U8(&msg, 2U)); } - if (pke != NULL) { - *pke = RPC_U8(&msg, 3U); + *pke = (sc_bool_t)U2B(RPC_U8(&msg, 3U)); } - if (pue != NULL) { - *pue = RPC_U8(&msg, 4U); + *pue = (sc_bool_t)U2B(RPC_U8(&msg, 4U)); } - return (sc_err_t)result; + return err; } -sc_err_t sc_pad_set_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad, - uint8_t compen, sc_bool_t fastfrz, - uint8_t rasrcp, uint8_t rasrcn, - sc_bool_t nasrc_sel, sc_bool_t psw_ovr) +sc_err_t sc_pad_set_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad, uint8_t compen, + sc_bool_t fastfrz, uint8_t rasrcp, + uint8_t rasrcn, sc_bool_t nasrc_sel, + sc_bool_t psw_ovr) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t)PAD_FUNC_SET_GP_28FDSOI_COMP; - RPC_U16(&msg, 0U) = (uint16_t)pad; - RPC_U8(&msg, 2U) = (uint8_t)compen; - RPC_U8(&msg, 3U) = (uint8_t)rasrcp; - RPC_U8(&msg, 4U) = (uint8_t)rasrcn; - RPC_U8(&msg, 5U) = (uint8_t)fastfrz; - RPC_U8(&msg, 6U) = (uint8_t)nasrc_sel; - RPC_U8(&msg, 7U) = (uint8_t)psw_ovr; RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_SET_GP_28FDSOI_COMP); + + RPC_U16(&msg, 0U) = U16(pad); + RPC_U8(&msg, 2U) = U8(compen); + RPC_U8(&msg, 3U) = U8(rasrcp); + RPC_U8(&msg, 4U) = U8(rasrcn); + RPC_U8(&msg, 5U) = B2U8(fastfrz); + RPC_U8(&msg, 6U) = B2U8(nasrc_sel); + RPC_U8(&msg, 7U) = B2U8(psw_ovr); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } -sc_err_t sc_pad_get_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad, - uint8_t *compen, sc_bool_t *fastfrz, - uint8_t *rasrcp, uint8_t *rasrcn, - sc_bool_t *nasrc_sel, sc_bool_t *compok, - uint8_t *nasrc, sc_bool_t *psw_ovr) +sc_err_t sc_pad_get_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad, uint8_t *compen, + sc_bool_t *fastfrz, uint8_t *rasrcp, + uint8_t *rasrcn, sc_bool_t *nasrc_sel, + sc_bool_t *compok, uint8_t *nasrc, + sc_bool_t *psw_ovr) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t)PAD_FUNC_GET_GP_28FDSOI_COMP; - RPC_U16(&msg, 0U) = (uint16_t)pad; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_GET_GP_28FDSOI_COMP); + + RPC_U16(&msg, 0U) = U16(pad); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); + err = (sc_err_t)RPC_R8(&msg); + if (compen != NULL) { - *compen = RPC_U8(&msg, 0U); + *compen = (uint8_t)RPC_U8(&msg, 0U); } - if (rasrcp != NULL) { - *rasrcp = RPC_U8(&msg, 1U); + *rasrcp = (uint8_t)RPC_U8(&msg, 1U); } - if (rasrcn != NULL) { - *rasrcn = RPC_U8(&msg, 2U); + *rasrcn = (uint8_t)RPC_U8(&msg, 2U); } - if (nasrc != NULL) { - *nasrc = RPC_U8(&msg, 3U); + *nasrc = (uint8_t)RPC_U8(&msg, 3U); } - if (fastfrz != NULL) { - *fastfrz = RPC_U8(&msg, 4U); + *fastfrz = (sc_bool_t)U2B(RPC_U8(&msg, 4U)); } - if (nasrc_sel != NULL) { - *nasrc_sel = RPC_U8(&msg, 5U); + *nasrc_sel = (sc_bool_t)U2B(RPC_U8(&msg, 5U)); } - if (compok != NULL) { - *compok = RPC_U8(&msg, 6U); + *compok = (sc_bool_t)U2B(RPC_U8(&msg, 6U)); } - if (psw_ovr != NULL) { - *psw_ovr = RPC_U8(&msg, 7U); + *psw_ovr = (sc_bool_t)U2B(RPC_U8(&msg, 7U)); } - return (sc_err_t)result; + return err; } /**@}*/ diff --git a/plat/imx/common/sci/svc/pad/sci_pad_rpc.h b/plat/imx/common/sci/svc/pad/sci_pad_rpc.h index 8e9c4bb3..b3e7f790 100644 --- a/plat/imx/common/sci/svc/pad/sci_pad_rpc.h +++ b/plat/imx/common/sci/svc/pad/sci_pad_rpc.h @@ -1,5 +1,6 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP * * SPDX-License-Identifier: BSD-3-Clause */ @@ -11,8 +12,8 @@ * @{ */ -#ifndef SCI_PAD_RPC_H -#define SCI_PAD_RPC_H +#ifndef SC_PAD_RPC_H +#define SC_PAD_RPC_H /* Includes */ @@ -23,22 +24,22 @@ */ /*@{*/ #define PAD_FUNC_UNKNOWN 0 /* Unknown function */ -#define PAD_FUNC_SET_MUX 1U /* Index for pad_set_mux() RPC call */ -#define PAD_FUNC_GET_MUX 6U /* Index for pad_get_mux() RPC call */ -#define PAD_FUNC_SET_GP 2U /* Index for pad_set_gp() RPC call */ -#define PAD_FUNC_GET_GP 7U /* Index for pad_get_gp() RPC call */ -#define PAD_FUNC_SET_WAKEUP 4U /* Index for pad_set_wakeup() RPC call */ -#define PAD_FUNC_GET_WAKEUP 9U /* Index for pad_get_wakeup() RPC call */ -#define PAD_FUNC_SET_ALL 5U /* Index for pad_set_all() RPC call */ -#define PAD_FUNC_GET_ALL 10U /* Index for pad_get_all() RPC call */ -#define PAD_FUNC_SET 15U /* Index for pad_set() RPC call */ -#define PAD_FUNC_GET 16U /* Index for pad_get() RPC call */ -#define PAD_FUNC_SET_GP_28FDSOI 11U /* Index for pad_set_gp_28fdsoi() RPC call */ -#define PAD_FUNC_GET_GP_28FDSOI 12U /* Index for pad_get_gp_28fdsoi() RPC call */ -#define PAD_FUNC_SET_GP_28FDSOI_HSIC 3U /* Index for pad_set_gp_28fdsoi_hsic() RPC call */ -#define PAD_FUNC_GET_GP_28FDSOI_HSIC 8U /* Index for pad_get_gp_28fdsoi_hsic() RPC call */ -#define PAD_FUNC_SET_GP_28FDSOI_COMP 13U /* Index for pad_set_gp_28fdsoi_comp() RPC call */ -#define PAD_FUNC_GET_GP_28FDSOI_COMP 14U /* Index for pad_get_gp_28fdsoi_comp() RPC call */ +#define PAD_FUNC_SET_MUX 1U /* Index for sc_pad_set_mux() RPC call */ +#define PAD_FUNC_GET_MUX 6U /* Index for sc_pad_get_mux() RPC call */ +#define PAD_FUNC_SET_GP 2U /* Index for sc_pad_set_gp() RPC call */ +#define PAD_FUNC_GET_GP 7U /* Index for sc_pad_get_gp() RPC call */ +#define PAD_FUNC_SET_WAKEUP 4U /* Index for sc_pad_set_wakeup() RPC call */ +#define PAD_FUNC_GET_WAKEUP 9U /* Index for sc_pad_get_wakeup() RPC call */ +#define PAD_FUNC_SET_ALL 5U /* Index for sc_pad_set_all() RPC call */ +#define PAD_FUNC_GET_ALL 10U /* Index for sc_pad_get_all() RPC call */ +#define PAD_FUNC_SET 15U /* Index for sc_pad_set() RPC call */ +#define PAD_FUNC_GET 16U /* Index for sc_pad_get() RPC call */ +#define PAD_FUNC_SET_GP_28FDSOI 11U /* Index for sc_pad_set_gp_28fdsoi() RPC call */ +#define PAD_FUNC_GET_GP_28FDSOI 12U /* Index for sc_pad_get_gp_28fdsoi() RPC call */ +#define PAD_FUNC_SET_GP_28FDSOI_HSIC 3U /* Index for sc_pad_set_gp_28fdsoi_hsic() RPC call */ +#define PAD_FUNC_GET_GP_28FDSOI_HSIC 8U /* Index for sc_pad_get_gp_28fdsoi_hsic() RPC call */ +#define PAD_FUNC_SET_GP_28FDSOI_COMP 13U /* Index for sc_pad_set_gp_28fdsoi_comp() RPC call */ +#define PAD_FUNC_GET_GP_28FDSOI_COMP 14U /* Index for sc_pad_get_gp_28fdsoi_comp() RPC call */ /*@}*/ /* Types */ @@ -49,18 +50,11 @@ * This function dispatches an incoming PAD RPC request. * * @param[in] caller_pt caller partition + * @param[in] mu MU message came from * @param[in] msg pointer to RPC message */ -void pad_dispatch(sc_rm_pt_t caller_pt, sc_rpc_msg_t *msg); +void pad_dispatch(sc_rm_pt_t caller_pt, sc_rsrc_t mu, sc_rpc_msg_t *msg); -/*! - * This function translates and dispatches an PAD RPC request. - * - * @param[in] ipc IPC handle - * @param[in] msg pointer to RPC message - */ -void pad_xlate(sc_ipc_t ipc, sc_rpc_msg_t *msg); - -#endif /* SCI_PAD_RPC_H */ +#endif /* SC_PAD_RPC_H */ /**@}*/ diff --git a/plat/imx/common/sci/svc/pm/pm_rpc_clnt.c b/plat/imx/common/sci/svc/pm/pm_rpc_clnt.c index 66a57a13..416f4fef 100644 --- a/plat/imx/common/sci/svc/pm/pm_rpc_clnt.c +++ b/plat/imx/common/sci/svc/pm/pm_rpc_clnt.c @@ -1,5 +1,6 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP * * SPDX-License-Identifier: BSD-3-Clause */ @@ -14,14 +15,12 @@ /* Includes */ -#include <stdlib.h> - #include <sci/sci_types.h> #include <sci/svc/rm/sci_rm_api.h> #include <sci/svc/pm/sci_pm_api.h> #include <sci/sci_rpc.h> - #include "sci_pm_rpc.h" +#include <stdlib.h> /* Local Defines */ @@ -32,119 +31,173 @@ sc_err_t sc_pm_set_sys_power_mode(sc_ipc_t ipc, sc_pm_power_mode_t mode) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_SET_SYS_POWER_MODE; - RPC_U8(&msg, 0U) = (uint8_t)mode; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_SET_SYS_POWER_MODE); + + RPC_U8(&msg, 0U) = U8(mode); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_pm_set_partition_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pm_power_mode_t mode) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_SET_PARTITION_POWER_MODE; - RPC_U8(&msg, 0U) = (uint8_t)pt; - RPC_U8(&msg, 1U) = (uint8_t)mode; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_SET_PARTITION_POWER_MODE); + + RPC_U8(&msg, 0U) = U8(pt); + RPC_U8(&msg, 1U) = U8(mode); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_pm_get_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pm_power_mode_t *mode) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_GET_SYS_POWER_MODE; - RPC_U8(&msg, 0U) = (uint8_t)pt; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_GET_SYS_POWER_MODE); + + RPC_U8(&msg, 0U) = U8(pt); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); + err = (sc_err_t)RPC_R8(&msg); + if (mode != NULL) { - *mode = RPC_U8(&msg, 0U); + *mode = (sc_pm_power_mode_t)RPC_U8(&msg, 0U); } - return (sc_err_t)result; + return err; +} + +sc_err_t sc_pm_partition_wake(sc_ipc_t ipc, sc_rm_pt_t pt) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_PARTITION_WAKE); + + RPC_U8(&msg, 0U) = U8(pt); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_power_mode_t mode) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_SET_RESOURCE_POWER_MODE); + + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(mode); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_pm_set_resource_power_mode_all(sc_ipc_t ipc, sc_rm_pt_t pt, + sc_pm_power_mode_t mode, + sc_rsrc_t exclude) +{ + sc_rpc_msg_t msg; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_SET_RESOURCE_POWER_MODE; - RPC_U16(&msg, 0U) = (uint16_t)resource; - RPC_U8(&msg, 2U) = (uint8_t)mode; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_SET_RESOURCE_POWER_MODE_ALL); + + RPC_U16(&msg, 0U) = U16(exclude); + RPC_U8(&msg, 2U) = U8(pt); + RPC_U8(&msg, 3U) = U8(mode); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_pm_get_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_power_mode_t *mode) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_GET_RESOURCE_POWER_MODE; - RPC_U16(&msg, 0U) = (uint16_t)resource; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_GET_RESOURCE_POWER_MODE); + + RPC_U16(&msg, 0U) = U16(resource); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); + err = (sc_err_t)RPC_R8(&msg); + if (mode != NULL) { - *mode = RPC_U8(&msg, 0U); + *mode = (sc_pm_power_mode_t)RPC_U8(&msg, 0U); } - return (sc_err_t)result; + return err; } sc_err_t sc_pm_req_low_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_power_mode_t mode) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_REQ_LOW_POWER_MODE; - RPC_U16(&msg, 0U) = (uint16_t)resource; - RPC_U8(&msg, 2U) = (uint8_t)mode; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_REQ_LOW_POWER_MODE); + + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(mode); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_pm_req_cpu_low_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, @@ -152,61 +205,67 @@ sc_err_t sc_pm_req_cpu_low_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_wake_src_t wake_src) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_REQ_CPU_LOW_POWER_MODE; - RPC_U16(&msg, 0U) = (uint16_t)resource; - RPC_U8(&msg, 2U) = (uint8_t)mode; - RPC_U8(&msg, 3U) = (uint8_t)wake_src; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_REQ_CPU_LOW_POWER_MODE); + + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(mode); + RPC_U8(&msg, 3U) = U8(wake_src); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_pm_set_cpu_resume_addr(sc_ipc_t ipc, sc_rsrc_t resource, sc_faddr_t address) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_SET_CPU_RESUME_ADDR; - RPC_U32(&msg, 0U) = (uint32_t)(address >> 32U); - RPC_U32(&msg, 4U) = (uint32_t)address; - RPC_U16(&msg, 8U) = (uint16_t)resource; RPC_SIZE(&msg) = 4U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_SET_CPU_RESUME_ADDR); + + RPC_U32(&msg, 0U) = U32(address >> 32ULL); + RPC_U32(&msg, 4U) = U32(address); + RPC_U16(&msg, 8U) = U16(resource); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_pm_set_cpu_resume(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t isPrimary, sc_faddr_t address) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_SET_CPU_RESUME; - RPC_U32(&msg, 0U) = (uint32_t)(address >> 32U); - RPC_U32(&msg, 4U) = (uint32_t)address; - RPC_U16(&msg, 8U) = (uint16_t)resource; - RPC_U8(&msg, 10U) = (uint8_t)isPrimary; RPC_SIZE(&msg) = 4U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_SET_CPU_RESUME); + + RPC_U32(&msg, 0U) = U32(address >> 32ULL); + RPC_U32(&msg, 4U) = U32(address); + RPC_U16(&msg, 8U) = U16(resource); + RPC_U8(&msg, 10U) = B2U8(isPrimary); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_pm_req_sys_if_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, @@ -215,190 +274,254 @@ sc_err_t sc_pm_req_sys_if_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_power_mode_t lpm) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_REQ_SYS_IF_POWER_MODE; - RPC_U16(&msg, 0U) = (uint16_t)resource; - RPC_U8(&msg, 2U) = (uint8_t)sys_if; - RPC_U8(&msg, 3U) = (uint8_t)hpm; - RPC_U8(&msg, 4U) = (uint8_t)lpm; RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_REQ_SYS_IF_POWER_MODE); + + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(sys_if); + RPC_U8(&msg, 3U) = U8(hpm); + RPC_U8(&msg, 4U) = U8(lpm); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } -sc_err_t sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, - sc_pm_clk_t clk, sc_pm_clock_rate_t *rate) +sc_err_t sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, + sc_pm_clock_rate_t *rate) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_SET_CLOCK_RATE; - RPC_U32(&msg, 0U) = *(uint32_t *)rate; - RPC_U16(&msg, 4U) = (uint16_t)resource; - RPC_U8(&msg, 6U) = (uint8_t)clk; RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_SET_CLOCK_RATE); + + RPC_U32(&msg, 0U) = U32(*rate); + RPC_U16(&msg, 4U) = U16(resource); + RPC_U8(&msg, 6U) = U8(clk); sc_call_rpc(ipc, &msg, SC_FALSE); - *rate = RPC_U32(&msg, 0U); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + *rate = (sc_pm_clock_rate_t)RPC_U32(&msg, 0U); + + return err; } -sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, - sc_pm_clk_t clk, sc_pm_clock_rate_t *rate) +sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, + sc_pm_clock_rate_t *rate) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_GET_CLOCK_RATE; - RPC_U16(&msg, 0U) = (uint16_t)resource; - RPC_U8(&msg, 2U) = (uint8_t)clk; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_GET_CLOCK_RATE); + + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(clk); sc_call_rpc(ipc, &msg, SC_FALSE); + err = (sc_err_t)RPC_R8(&msg); + if (rate != NULL) { - *rate = RPC_U32(&msg, 0U); + *rate = (sc_pm_clock_rate_t)RPC_U32(&msg, 0U); } - result = RPC_R8(&msg); - return (sc_err_t)result; + return err; } -sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, - sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog) +sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, + sc_bool_t enable, sc_bool_t autog) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_CLOCK_ENABLE; - RPC_U16(&msg, 0U) = (uint16_t)resource; - RPC_U8(&msg, 2U) = (uint8_t)clk; - RPC_U8(&msg, 3U) = (uint8_t)enable; - RPC_U8(&msg, 4U) = (uint8_t)autog; RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_CLOCK_ENABLE); + + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(clk); + RPC_U8(&msg, 3U) = B2U8(enable); + RPC_U8(&msg, 4U) = B2U8(autog); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, sc_pm_clk_parent_t parent) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_SET_CLOCK_PARENT; - RPC_U16(&msg, 0U) = (uint16_t)resource; - RPC_U8(&msg, 2U) = (uint8_t)clk; - RPC_U8(&msg, 3U) = (uint8_t)parent; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_SET_CLOCK_PARENT); + + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(clk); + RPC_U8(&msg, 3U) = U8(parent); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_pm_get_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, - sc_pm_clk_t clk, sc_pm_clk_parent_t *parent) + sc_pm_clk_t clk, sc_pm_clk_parent_t * parent) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_GET_CLOCK_PARENT; - RPC_U16(&msg, 0U) = (uint16_t)resource; - RPC_U8(&msg, 2U) = (uint8_t)clk; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_GET_CLOCK_PARENT); + + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(clk); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); + err = (sc_err_t)RPC_R8(&msg); + if (parent != NULL) { - *parent = RPC_U8(&msg, 0U); + *parent = (sc_pm_clk_parent_t) RPC_U8(&msg, 0U); } - return (sc_err_t)result; + return err; } sc_err_t sc_pm_reset(sc_ipc_t ipc, sc_pm_reset_type_t type) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_RESET; - RPC_U8(&msg, 0U) = (uint8_t)type; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_RESET); + + RPC_U8(&msg, 0U) = U8(type); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_pm_reset_reason(sc_ipc_t ipc, sc_pm_reset_reason_t *reason) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_RESET_REASON; RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_RESET_REASON); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); + err = (sc_err_t)RPC_R8(&msg); + if (reason != NULL) { - *reason = RPC_U8(&msg, 0U); + *reason = (sc_pm_reset_reason_t)RPC_U8(&msg, 0U); } - return (sc_err_t)result; + return err; } -sc_err_t sc_pm_boot(sc_ipc_t ipc, sc_rm_pt_t pt, - sc_rsrc_t resource_cpu, sc_faddr_t boot_addr, - sc_rsrc_t resource_mu, sc_rsrc_t resource_dev) +sc_err_t sc_pm_get_reset_part(sc_ipc_t ipc, sc_rm_pt_t *pt) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_GET_RESET_PART); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + if (pt != NULL) { + *pt = (sc_rm_pt_t)RPC_U8(&msg, 0U); + } + + return err; +} + +sc_err_t sc_pm_boot(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rsrc_t resource_cpu, + sc_faddr_t boot_addr, sc_rsrc_t resource_mu, + sc_rsrc_t resource_dev) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 5U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_BOOT); + + RPC_U32(&msg, 0U) = U32(boot_addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(boot_addr); + RPC_U16(&msg, 8U) = U16(resource_cpu); + RPC_U16(&msg, 10U) = U16(resource_mu); + RPC_U16(&msg, 12U) = U16(resource_dev); + RPC_U8(&msg, 14U) = U8(pt); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_pm_set_boot_parm(sc_ipc_t ipc, sc_rsrc_t resource_cpu, + sc_faddr_t boot_addr, sc_rsrc_t resource_mu, + sc_rsrc_t resource_dev) +{ + sc_rpc_msg_t msg; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_BOOT; - RPC_U32(&msg, 0U) = (uint32_t)(boot_addr >> 32U); - RPC_U32(&msg, 4U) = (uint32_t)boot_addr; - RPC_U16(&msg, 8U) = (uint16_t)resource_cpu; - RPC_U16(&msg, 10U) = (uint16_t)resource_mu; - RPC_U16(&msg, 12U) = (uint16_t)resource_dev; - RPC_U8(&msg, 14U) = (uint8_t)pt; RPC_SIZE(&msg) = 5U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_SET_BOOT_PARM); + + RPC_U32(&msg, 0U) = U32(boot_addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(boot_addr); + RPC_U16(&msg, 8U) = U16(resource_cpu); + RPC_U16(&msg, 10U) = U16(resource_mu); + RPC_U16(&msg, 12U) = U16(resource_dev); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } void sc_pm_reboot(sc_ipc_t ipc, sc_pm_reset_type_t type) @@ -406,54 +529,130 @@ void sc_pm_reboot(sc_ipc_t ipc, sc_pm_reset_type_t type) sc_rpc_msg_t msg; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_REBOOT; - RPC_U8(&msg, 0U) = (uint8_t)type; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_REBOOT); - sc_call_rpc(ipc, &msg, SC_TRUE); + RPC_U8(&msg, 0U) = U8(type); - return; + sc_call_rpc(ipc, &msg, SC_TRUE); } sc_err_t sc_pm_reboot_partition(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pm_reset_type_t type) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_REBOOT_PARTITION; - RPC_U8(&msg, 0U) = (uint8_t)pt; - RPC_U8(&msg, 1U) = (uint8_t)type; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_REBOOT_PARTITION); + + RPC_U8(&msg, 0U) = U8(pt); + RPC_U8(&msg, 1U) = U8(type); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_pm_reboot_continue(sc_ipc_t ipc, sc_rm_pt_t pt) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_REBOOT_CONTINUE); + + RPC_U8(&msg, 0U) = U8(pt); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable, sc_faddr_t address) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 4U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_CPU_START); + + RPC_U32(&msg, 0U) = U32(address >> 32ULL); + RPC_U32(&msg, 4U) = U32(address); + RPC_U16(&msg, 8U) = U16(resource); + RPC_U8(&msg, 10U) = B2U8(enable); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +void sc_pm_cpu_reset(sc_ipc_t ipc, sc_rsrc_t resource, sc_faddr_t address) +{ + sc_rpc_msg_t msg; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t)PM_FUNC_CPU_START; - RPC_U32(&msg, 0U) = (uint32_t)(address >> 32U); - RPC_U32(&msg, 4U) = (uint32_t)address; - RPC_U16(&msg, 8U) = (uint16_t)resource; - RPC_U8(&msg, 10U) = (uint8_t)enable; RPC_SIZE(&msg) = 4U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_CPU_RESET); + + RPC_U32(&msg, 0U) = U32(address >> 32ULL); + RPC_U32(&msg, 4U) = U32(address); + RPC_U16(&msg, 8U) = U16(resource); + + sc_call_rpc(ipc, &msg, SC_TRUE); +} + +sc_err_t sc_pm_resource_reset(sc_ipc_t ipc, sc_rsrc_t resource) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_RESOURCE_RESET); + + RPC_U16(&msg, 0U) = U16(resource); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_bool_t sc_pm_is_partition_started(sc_ipc_t ipc, sc_rm_pt_t pt) +{ + sc_rpc_msg_t msg; + sc_bool_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_IS_PARTITION_STARTED); + + RPC_U8(&msg, 0U) = U8(pt); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + result = (sc_bool_t)U2B(RPC_R8(&msg)); + + return result; } /**@}*/ diff --git a/plat/imx/common/sci/svc/pm/sci_pm_rpc.h b/plat/imx/common/sci/svc/pm/sci_pm_rpc.h index 8bad3c7b..ff1dca01 100644 --- a/plat/imx/common/sci/svc/pm/sci_pm_rpc.h +++ b/plat/imx/common/sci/svc/pm/sci_pm_rpc.h @@ -1,5 +1,6 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP * * SPDX-License-Identifier: BSD-3-Clause */ @@ -11,8 +12,8 @@ * @{ */ -#ifndef SCI_PM_RPC_H -#define SCI_PM_RPC_H +#ifndef SC_PM_RPC_H +#define SC_PM_RPC_H /* Includes */ @@ -23,27 +24,35 @@ */ /*@{*/ #define PM_FUNC_UNKNOWN 0 /* Unknown function */ -#define PM_FUNC_SET_SYS_POWER_MODE 19U /* Index for pm_set_sys_power_mode() RPC call */ -#define PM_FUNC_SET_PARTITION_POWER_MODE 1U /* Index for pm_set_partition_power_mode() RPC call */ -#define PM_FUNC_GET_SYS_POWER_MODE 2U /* Index for pm_get_sys_power_mode() RPC call */ -#define PM_FUNC_SET_RESOURCE_POWER_MODE 3U /* Index for pm_set_resource_power_mode() RPC call */ -#define PM_FUNC_GET_RESOURCE_POWER_MODE 4U /* Index for pm_get_resource_power_mode() RPC call */ -#define PM_FUNC_REQ_LOW_POWER_MODE 16U /* Index for pm_req_low_power_mode() RPC call */ -#define PM_FUNC_REQ_CPU_LOW_POWER_MODE 20U /* Index for pm_req_cpu_low_power_mode() RPC call */ -#define PM_FUNC_SET_CPU_RESUME_ADDR 17U /* Index for pm_set_cpu_resume_addr() RPC call */ -#define PM_FUNC_SET_CPU_RESUME 21U /* Index for pm_set_cpu_resume() RPC call */ -#define PM_FUNC_REQ_SYS_IF_POWER_MODE 18U /* Index for pm_req_sys_if_power_mode() RPC call */ -#define PM_FUNC_SET_CLOCK_RATE 5U /* Index for pm_set_clock_rate() RPC call */ -#define PM_FUNC_GET_CLOCK_RATE 6U /* Index for pm_get_clock_rate() RPC call */ -#define PM_FUNC_CLOCK_ENABLE 7U /* Index for pm_clock_enable() RPC call */ -#define PM_FUNC_SET_CLOCK_PARENT 14U /* Index for pm_set_clock_parent() RPC call */ -#define PM_FUNC_GET_CLOCK_PARENT 15U /* Index for pm_get_clock_parent() RPC call */ -#define PM_FUNC_RESET 13U /* Index for pm_reset() RPC call */ -#define PM_FUNC_RESET_REASON 10U /* Index for pm_reset_reason() RPC call */ -#define PM_FUNC_BOOT 8U /* Index for pm_boot() RPC call */ -#define PM_FUNC_REBOOT 9U /* Index for pm_reboot() RPC call */ -#define PM_FUNC_REBOOT_PARTITION 12U /* Index for pm_reboot_partition() RPC call */ -#define PM_FUNC_CPU_START 11U /* Index for pm_cpu_start() RPC call */ +#define PM_FUNC_SET_SYS_POWER_MODE 19U /* Index for sc_pm_set_sys_power_mode() RPC call */ +#define PM_FUNC_SET_PARTITION_POWER_MODE 1U /* Index for sc_pm_set_partition_power_mode() RPC call */ +#define PM_FUNC_GET_SYS_POWER_MODE 2U /* Index for sc_pm_get_sys_power_mode() RPC call */ +#define PM_FUNC_PARTITION_WAKE 28U /* Index for sc_pm_partition_wake() RPC call */ +#define PM_FUNC_SET_RESOURCE_POWER_MODE 3U /* Index for sc_pm_set_resource_power_mode() RPC call */ +#define PM_FUNC_SET_RESOURCE_POWER_MODE_ALL 22U /* Index for sc_pm_set_resource_power_mode_all() RPC call */ +#define PM_FUNC_GET_RESOURCE_POWER_MODE 4U /* Index for sc_pm_get_resource_power_mode() RPC call */ +#define PM_FUNC_REQ_LOW_POWER_MODE 16U /* Index for sc_pm_req_low_power_mode() RPC call */ +#define PM_FUNC_REQ_CPU_LOW_POWER_MODE 20U /* Index for sc_pm_req_cpu_low_power_mode() RPC call */ +#define PM_FUNC_SET_CPU_RESUME_ADDR 17U /* Index for sc_pm_set_cpu_resume_addr() RPC call */ +#define PM_FUNC_SET_CPU_RESUME 21U /* Index for sc_pm_set_cpu_resume() RPC call */ +#define PM_FUNC_REQ_SYS_IF_POWER_MODE 18U /* Index for sc_pm_req_sys_if_power_mode() RPC call */ +#define PM_FUNC_SET_CLOCK_RATE 5U /* Index for sc_pm_set_clock_rate() RPC call */ +#define PM_FUNC_GET_CLOCK_RATE 6U /* Index for sc_pm_get_clock_rate() RPC call */ +#define PM_FUNC_CLOCK_ENABLE 7U /* Index for sc_pm_clock_enable() RPC call */ +#define PM_FUNC_SET_CLOCK_PARENT 14U /* Index for sc_pm_set_clock_parent() RPC call */ +#define PM_FUNC_GET_CLOCK_PARENT 15U /* Index for sc_pm_get_clock_parent() RPC call */ +#define PM_FUNC_RESET 13U /* Index for sc_pm_reset() RPC call */ +#define PM_FUNC_RESET_REASON 10U /* Index for sc_pm_reset_reason() RPC call */ +#define PM_FUNC_GET_RESET_PART 26U /* Index for sc_pm_get_reset_part() RPC call */ +#define PM_FUNC_BOOT 8U /* Index for sc_pm_boot() RPC call */ +#define PM_FUNC_SET_BOOT_PARM 27U /* Index for sc_pm_set_boot_parm() RPC call */ +#define PM_FUNC_REBOOT 9U /* Index for sc_pm_reboot() RPC call */ +#define PM_FUNC_REBOOT_PARTITION 12U /* Index for sc_pm_reboot_partition() RPC call */ +#define PM_FUNC_REBOOT_CONTINUE 25U /* Index for sc_pm_reboot_continue() RPC call */ +#define PM_FUNC_CPU_START 11U /* Index for sc_pm_cpu_start() RPC call */ +#define PM_FUNC_CPU_RESET 23U /* Index for sc_pm_cpu_reset() RPC call */ +#define PM_FUNC_RESOURCE_RESET 29U /* Index for sc_pm_resource_reset() RPC call */ +#define PM_FUNC_IS_PARTITION_STARTED 24U /* Index for sc_pm_is_partition_started() RPC call */ /*@}*/ /* Types */ @@ -54,18 +63,11 @@ * This function dispatches an incoming PM RPC request. * * @param[in] caller_pt caller partition + * @param[in] mu MU message came from * @param[in] msg pointer to RPC message */ -void pm_dispatch(sc_rm_pt_t caller_pt, sc_rpc_msg_t *msg); +void pm_dispatch(sc_rm_pt_t caller_pt, sc_rsrc_t mu, sc_rpc_msg_t *msg); -/*! - * This function translates and dispatches an PM RPC request. - * - * @param[in] ipc IPC handle - * @param[in] msg pointer to RPC message - */ -void pm_xlate(sc_ipc_t ipc, sc_rpc_msg_t *msg); - -#endif /* SCI_PM_RPC_H */ +#endif /* SC_PM_RPC_H */ /**@}*/ diff --git a/plat/imx/common/sci/svc/rm/rm_rpc_clnt.c b/plat/imx/common/sci/svc/rm/rm_rpc_clnt.c index 16771a58..2a464737 100644 --- a/plat/imx/common/sci/svc/rm/rm_rpc_clnt.c +++ b/plat/imx/common/sci/svc/rm/rm_rpc_clnt.c @@ -1,5 +1,6 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP * * SPDX-License-Identifier: BSD-3-Clause */ @@ -14,13 +15,11 @@ /* Includes */ -#include <stdlib.h> - #include <sci/sci_types.h> #include <sci/svc/rm/sci_rm_api.h> #include <sci/sci_rpc.h> - #include "sci_rm_rpc.h" +#include <stdlib.h> /* Local Defines */ @@ -33,228 +32,250 @@ sc_err_t sc_rm_partition_alloc(sc_ipc_t ipc, sc_rm_pt_t *pt, sc_bool_t secure, sc_bool_t grant, sc_bool_t coherent) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_PARTITION_ALLOC; - RPC_U8(&msg, 0U) = (uint8_t)secure; - RPC_U8(&msg, 1U) = (uint8_t)isolated; - RPC_U8(&msg, 2U) = (uint8_t)restricted; - RPC_U8(&msg, 3U) = (uint8_t)grant; - RPC_U8(&msg, 4U) = (uint8_t)coherent; RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_PARTITION_ALLOC); + + RPC_U8(&msg, 0U) = B2U8(secure); + RPC_U8(&msg, 1U) = B2U8(isolated); + RPC_U8(&msg, 2U) = B2U8(restricted); + RPC_U8(&msg, 3U) = B2U8(grant); + RPC_U8(&msg, 4U) = B2U8(coherent); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); + err = (sc_err_t)RPC_R8(&msg); + if (pt != NULL) { - *pt = RPC_U8(&msg, 0U); + *pt = (sc_rm_pt_t)RPC_U8(&msg, 0U); } - return (sc_err_t)result; + return err; } sc_err_t sc_rm_set_confidential(sc_ipc_t ipc, sc_rm_pt_t pt, sc_bool_t retro) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_SET_CONFIDENTIAL; - RPC_U8(&msg, 0U) = (uint8_t)pt; - RPC_U8(&msg, 1U) = (uint8_t)retro; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_SET_CONFIDENTIAL); + + RPC_U8(&msg, 0U) = U8(pt); + RPC_U8(&msg, 1U) = B2U8(retro); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_rm_partition_free(sc_ipc_t ipc, sc_rm_pt_t pt) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_PARTITION_FREE; - RPC_U8(&msg, 0U) = (uint8_t)pt; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_PARTITION_FREE); + + RPC_U8(&msg, 0U) = U8(pt); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_rm_did_t sc_rm_get_did(sc_ipc_t ipc) { sc_rpc_msg_t msg; - uint8_t result; + sc_rm_did_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_GET_DID; RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_GET_DID); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_rm_did_t) result; + result = (sc_rm_did_t) RPC_R8(&msg); + + return result; } sc_err_t sc_rm_partition_static(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_did_t did) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_PARTITION_STATIC; - RPC_U8(&msg, 0U) = (uint8_t)pt; - RPC_U8(&msg, 1U) = (uint8_t)did; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_PARTITION_STATIC); + + RPC_U8(&msg, 0U) = U8(pt); + RPC_U8(&msg, 1U) = U8(did); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_rm_partition_lock(sc_ipc_t ipc, sc_rm_pt_t pt) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_PARTITION_LOCK; - RPC_U8(&msg, 0U) = (uint8_t)pt; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_PARTITION_LOCK); + + RPC_U8(&msg, 0U) = U8(pt); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_rm_get_partition(sc_ipc_t ipc, sc_rm_pt_t *pt) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_GET_PARTITION; RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_GET_PARTITION); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); + err = (sc_err_t)RPC_R8(&msg); + if (pt != NULL) { - *pt = RPC_U8(&msg, 0U); + *pt = (sc_rm_pt_t)RPC_U8(&msg, 0U); } - return (sc_err_t)result; + return err; } sc_err_t sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_pt_t pt_parent) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_SET_PARENT; - RPC_U8(&msg, 0U) = (uint8_t)pt; - RPC_U8(&msg, 1U) = (uint8_t)pt_parent; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_SET_PARENT); + + RPC_U8(&msg, 0U) = U8(pt); + RPC_U8(&msg, 1U) = U8(pt_parent); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_rm_move_all(sc_ipc_t ipc, sc_rm_pt_t pt_src, sc_rm_pt_t pt_dst, sc_bool_t move_rsrc, sc_bool_t move_pads) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_MOVE_ALL; - RPC_U8(&msg, 0U) = (uint8_t)pt_src; - RPC_U8(&msg, 1U) = (uint8_t)pt_dst; - RPC_U8(&msg, 2U) = (uint8_t)move_rsrc; - RPC_U8(&msg, 3U) = (uint8_t)move_pads; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_MOVE_ALL); + + RPC_U8(&msg, 0U) = U8(pt_src); + RPC_U8(&msg, 1U) = U8(pt_dst); + RPC_U8(&msg, 2U) = B2U8(move_rsrc); + RPC_U8(&msg, 3U) = B2U8(move_pads); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_rm_assign_resource(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rsrc_t resource) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_ASSIGN_RESOURCE; - RPC_U16(&msg, 0U) = (uint16_t)resource; - RPC_U8(&msg, 2U) = (uint8_t)pt; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_ASSIGN_RESOURCE); + + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(pt); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_rm_set_resource_movable(sc_ipc_t ipc, sc_rsrc_t resource_fst, sc_rsrc_t resource_lst, sc_bool_t movable) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_SET_RESOURCE_MOVABLE; - RPC_U16(&msg, 0U) = (uint16_t)resource_fst; - RPC_U16(&msg, 2U) = (uint16_t)resource_lst; - RPC_U8(&msg, 4U) = (uint8_t)movable; RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_SET_RESOURCE_MOVABLE); + + RPC_U16(&msg, 0U) = U16(resource_fst); + RPC_U16(&msg, 2U) = U16(resource_lst); + RPC_U8(&msg, 4U) = B2U8(movable); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_rm_set_subsys_rsrc_movable(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t movable) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_SET_SUBSYS_RSRC_MOVABLE; - RPC_U16(&msg, 0U) = (uint16_t)resource; - RPC_U8(&msg, 2U) = (uint8_t)movable; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_SET_SUBSYS_RSRC_MOVABLE); + + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = B2U8(movable); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_rm_set_master_attributes(sc_ipc_t ipc, sc_rsrc_t resource, @@ -262,364 +283,447 @@ sc_err_t sc_rm_set_master_attributes(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t smmu_bypass) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_SET_MASTER_ATTRIBUTES; - RPC_U16(&msg, 0U) = (uint16_t)resource; - RPC_U8(&msg, 2U) = (uint8_t)sa; - RPC_U8(&msg, 3U) = (uint8_t)pa; - RPC_U8(&msg, 4U) = (uint8_t)smmu_bypass; RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_SET_MASTER_ATTRIBUTES); + + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(sa); + RPC_U8(&msg, 3U) = U8(pa); + RPC_U8(&msg, 4U) = B2U8(smmu_bypass); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_rm_set_master_sid(sc_ipc_t ipc, sc_rsrc_t resource, sc_rm_sid_t sid) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_SET_MASTER_SID; - RPC_U16(&msg, 0U) = (uint16_t)resource; - RPC_U16(&msg, 2U) = (uint16_t)sid; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_SET_MASTER_SID); + + RPC_U16(&msg, 0U) = U16(resource); + RPC_U16(&msg, 2U) = U16(sid); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_rm_set_peripheral_permissions(sc_ipc_t ipc, sc_rsrc_t resource, sc_rm_pt_t pt, sc_rm_perm_t perm) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_SET_PERIPHERAL_PERMISSIONS; - RPC_U16(&msg, 0U) = (uint16_t)resource; - RPC_U8(&msg, 2U) = (uint8_t)pt; - RPC_U8(&msg, 3U) = (uint8_t)perm; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_SET_PERIPHERAL_PERMISSIONS); + + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(pt); + RPC_U8(&msg, 3U) = U8(perm); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_bool_t sc_rm_is_resource_owned(sc_ipc_t ipc, sc_rsrc_t resource) { sc_rpc_msg_t msg; - uint8_t result; + sc_bool_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_IS_RESOURCE_OWNED; - RPC_U16(&msg, 0U) = (uint16_t)resource; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_IS_RESOURCE_OWNED); + + RPC_U16(&msg, 0U) = U16(resource); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_bool_t)result; + result = (sc_bool_t)U2B(RPC_R8(&msg)); + + return result; +} + +sc_err_t sc_rm_get_resource_owner(sc_ipc_t ipc, sc_rsrc_t resource, + sc_rm_pt_t *pt) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_GET_RESOURCE_OWNER); + + RPC_U16(&msg, 0U) = U16(resource); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + if (pt != NULL) { + *pt = (sc_rm_pt_t)RPC_U8(&msg, 0U); + } + + return err; } sc_bool_t sc_rm_is_resource_master(sc_ipc_t ipc, sc_rsrc_t resource) { sc_rpc_msg_t msg; - uint8_t result; + sc_bool_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_IS_RESOURCE_MASTER; - RPC_U16(&msg, 0U) = (uint16_t)resource; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_IS_RESOURCE_MASTER); + + RPC_U16(&msg, 0U) = U16(resource); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_bool_t)result; + result = (sc_bool_t)U2B(RPC_R8(&msg)); + + return result; } sc_bool_t sc_rm_is_resource_peripheral(sc_ipc_t ipc, sc_rsrc_t resource) { sc_rpc_msg_t msg; - uint8_t result; + sc_bool_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_IS_RESOURCE_PERIPHERAL; - RPC_U16(&msg, 0U) = (uint16_t)resource; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_IS_RESOURCE_PERIPHERAL); + + RPC_U16(&msg, 0U) = U16(resource); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_bool_t)result; + result = (sc_bool_t)U2B(RPC_R8(&msg)); + + return result; } sc_err_t sc_rm_get_resource_info(sc_ipc_t ipc, sc_rsrc_t resource, sc_rm_sid_t *sid) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_GET_RESOURCE_INFO; - RPC_U16(&msg, 0U) = (uint16_t)resource; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_GET_RESOURCE_INFO); + + RPC_U16(&msg, 0U) = U16(resource); sc_call_rpc(ipc, &msg, SC_FALSE); + err = (sc_err_t)RPC_R8(&msg); + if (sid != NULL) { - *sid = RPC_U16(&msg, 0U); + *sid = (sc_rm_sid_t)RPC_U16(&msg, 0U); } - result = RPC_R8(&msg); - return (sc_err_t)result; + return err; } -sc_err_t sc_rm_memreg_alloc(sc_ipc_t ipc, sc_rm_mr_t *mr, - sc_faddr_t addr_start, sc_faddr_t addr_end) +sc_err_t sc_rm_memreg_alloc(sc_ipc_t ipc, sc_rm_mr_t *mr, sc_faddr_t addr_start, + sc_faddr_t addr_end) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_MEMREG_ALLOC; - RPC_U32(&msg, 0U) = (uint32_t)(addr_start >> 32U); - RPC_U32(&msg, 4U) = (uint32_t)addr_start; - RPC_U32(&msg, 8U) = (uint32_t)(addr_end >> 32U); - RPC_U32(&msg, 12U) = (uint32_t)addr_end; RPC_SIZE(&msg) = 5U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_MEMREG_ALLOC); + + RPC_U32(&msg, 0U) = U32(addr_start >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr_start); + RPC_U32(&msg, 8U) = U32(addr_end >> 32ULL); + RPC_U32(&msg, 12U) = U32(addr_end); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); + err = (sc_err_t)RPC_R8(&msg); + if (mr != NULL) { - *mr = RPC_U8(&msg, 0U); + *mr = (sc_rm_mr_t)RPC_U8(&msg, 0U); } - return (sc_err_t)result; + return err; } -sc_err_t sc_rm_memreg_split(sc_ipc_t ipc, sc_rm_mr_t mr, - sc_rm_mr_t *mr_ret, sc_faddr_t addr_start, - sc_faddr_t addr_end) +sc_err_t sc_rm_memreg_split(sc_ipc_t ipc, sc_rm_mr_t mr, sc_rm_mr_t *mr_ret, + sc_faddr_t addr_start, sc_faddr_t addr_end) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_MEMREG_SPLIT; - RPC_U32(&msg, 0U) = (uint32_t)(addr_start >> 32U); - RPC_U32(&msg, 4U) = (uint32_t)addr_start; - RPC_U32(&msg, 8U) = (uint32_t)(addr_end >> 32U); - RPC_U32(&msg, 12U) = (uint32_t)addr_end; - RPC_U8(&msg, 16U) = (uint8_t)mr; RPC_SIZE(&msg) = 6U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_MEMREG_SPLIT); + + RPC_U32(&msg, 0U) = U32(addr_start >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr_start); + RPC_U32(&msg, 8U) = U32(addr_end >> 32ULL); + RPC_U32(&msg, 12U) = U32(addr_end); + RPC_U8(&msg, 16U) = U8(mr); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + if (mr_ret != NULL) { + *mr_ret = (sc_rm_mr_t)RPC_U8(&msg, 0U); + } + + return err; +} + +sc_err_t sc_rm_memreg_frag(sc_ipc_t ipc, sc_rm_mr_t *mr_ret, + sc_faddr_t addr_start, sc_faddr_t addr_end) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 5U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_MEMREG_FRAG); + + RPC_U32(&msg, 0U) = U32(addr_start >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr_start); + RPC_U32(&msg, 8U) = U32(addr_end >> 32ULL); + RPC_U32(&msg, 12U) = U32(addr_end); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); + err = (sc_err_t)RPC_R8(&msg); + if (mr_ret != NULL) { - *mr_ret = RPC_U8(&msg, 0U); + *mr_ret = (sc_rm_mr_t)RPC_U8(&msg, 0U); } - return (sc_err_t)result; + return err; } sc_err_t sc_rm_memreg_free(sc_ipc_t ipc, sc_rm_mr_t mr) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_MEMREG_FREE; - RPC_U8(&msg, 0U) = (uint8_t)mr; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_MEMREG_FREE); + + RPC_U8(&msg, 0U) = U8(mr); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } -sc_err_t sc_rm_find_memreg(sc_ipc_t ipc, sc_rm_mr_t *mr, - sc_faddr_t addr_start, sc_faddr_t addr_end) +sc_err_t sc_rm_find_memreg(sc_ipc_t ipc, sc_rm_mr_t *mr, sc_faddr_t addr_start, + sc_faddr_t addr_end) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_FIND_MEMREG; - RPC_U32(&msg, 0U) = (uint32_t)(addr_start >> 32U); - RPC_U32(&msg, 4U) = (uint32_t)addr_start; - RPC_U32(&msg, 8U) = (uint32_t)(addr_end >> 32U); - RPC_U32(&msg, 12U) = (uint32_t)addr_end; RPC_SIZE(&msg) = 5U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_FIND_MEMREG); + + RPC_U32(&msg, 0U) = U32(addr_start >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr_start); + RPC_U32(&msg, 8U) = U32(addr_end >> 32ULL); + RPC_U32(&msg, 12U) = U32(addr_end); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); + err = (sc_err_t)RPC_R8(&msg); + if (mr != NULL) { - *mr = RPC_U8(&msg, 0U); + *mr = (sc_rm_mr_t)RPC_U8(&msg, 0U); } - return (sc_err_t)result; + return err; } sc_err_t sc_rm_assign_memreg(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_mr_t mr) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_ASSIGN_MEMREG; - RPC_U8(&msg, 0U) = (uint8_t)pt; - RPC_U8(&msg, 1U) = (uint8_t)mr; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_ASSIGN_MEMREG); + + RPC_U8(&msg, 0U) = U8(pt); + RPC_U8(&msg, 1U) = U8(mr); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_rm_set_memreg_permissions(sc_ipc_t ipc, sc_rm_mr_t mr, sc_rm_pt_t pt, sc_rm_perm_t perm) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_SET_MEMREG_PERMISSIONS; - RPC_U8(&msg, 0U) = (uint8_t)mr; - RPC_U8(&msg, 1U) = (uint8_t)pt; - RPC_U8(&msg, 2U) = (uint8_t)perm; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_SET_MEMREG_PERMISSIONS); + + RPC_U8(&msg, 0U) = U8(mr); + RPC_U8(&msg, 1U) = U8(pt); + RPC_U8(&msg, 2U) = U8(perm); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_bool_t sc_rm_is_memreg_owned(sc_ipc_t ipc, sc_rm_mr_t mr) { sc_rpc_msg_t msg; - uint8_t result; + sc_bool_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_IS_MEMREG_OWNED; - RPC_U8(&msg, 0U) = (uint8_t)mr; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_IS_MEMREG_OWNED); + + RPC_U8(&msg, 0U) = U8(mr); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_bool_t)result; + result = (sc_bool_t)U2B(RPC_R8(&msg)); + + return result; } sc_err_t sc_rm_get_memreg_info(sc_ipc_t ipc, sc_rm_mr_t mr, sc_faddr_t *addr_start, sc_faddr_t *addr_end) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_GET_MEMREG_INFO; - RPC_U8(&msg, 0U) = (uint8_t)mr; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_GET_MEMREG_INFO); + + RPC_U8(&msg, 0U) = U8(mr); sc_call_rpc(ipc, &msg, SC_FALSE); + err = (sc_err_t)RPC_R8(&msg); + if (addr_start != NULL) { - *addr_start = - ((uint64_t) RPC_U32(&msg, 0U) << 32U) | RPC_U32(&msg, 4U); + *addr_start = (sc_faddr_t)RPC_U64(&msg, 0U); } - if (addr_end != NULL) { - *addr_end = - ((uint64_t) RPC_U32(&msg, 8U) << 32U) | RPC_U32(&msg, 12U); + *addr_end = (sc_faddr_t)RPC_U64(&msg, 8U); } - result = RPC_R8(&msg); - return (sc_err_t)result; + return err; } sc_err_t sc_rm_assign_pad(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pad_t pad) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_ASSIGN_PAD; - RPC_U16(&msg, 0U) = (uint16_t)pad; - RPC_U8(&msg, 2U) = (uint8_t)pt; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_ASSIGN_PAD); + + RPC_U16(&msg, 0U) = U16(pad); + RPC_U8(&msg, 2U) = U8(pt); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } -sc_err_t sc_rm_set_pad_movable(sc_ipc_t ipc, sc_pad_t pad_fst, - sc_pad_t pad_lst, sc_bool_t movable) +sc_err_t sc_rm_set_pad_movable(sc_ipc_t ipc, sc_pad_t pad_fst, sc_pad_t pad_lst, + sc_bool_t movable) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_SET_PAD_MOVABLE; - RPC_U16(&msg, 0U) = (uint16_t)pad_fst; - RPC_U16(&msg, 2U) = (uint16_t)pad_lst; - RPC_U8(&msg, 4U) = (uint8_t)movable; RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_SET_PAD_MOVABLE); + + RPC_U16(&msg, 0U) = U16(pad_fst); + RPC_U16(&msg, 2U) = U16(pad_lst); + RPC_U8(&msg, 4U) = B2U8(movable); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_bool_t sc_rm_is_pad_owned(sc_ipc_t ipc, sc_pad_t pad) { sc_rpc_msg_t msg; - uint8_t result; + sc_bool_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_IS_PAD_OWNED; - RPC_U8(&msg, 0U) = (uint8_t)pad; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_IS_PAD_OWNED); + + RPC_U8(&msg, 0U) = U8(pad); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_bool_t)result; + result = (sc_bool_t)U2B(RPC_R8(&msg)); + + return result; } void sc_rm_dump(sc_ipc_t ipc) @@ -627,13 +731,11 @@ void sc_rm_dump(sc_ipc_t ipc) sc_rpc_msg_t msg; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t)RM_FUNC_DUMP; RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_DUMP); sc_call_rpc(ipc, &msg, SC_FALSE); - - return; } /**@}*/ diff --git a/plat/imx/common/sci/svc/rm/sci_rm_rpc.h b/plat/imx/common/sci/svc/rm/sci_rm_rpc.h index 45d05f99..013a69fa 100644 --- a/plat/imx/common/sci/svc/rm/sci_rm_rpc.h +++ b/plat/imx/common/sci/svc/rm/sci_rm_rpc.h @@ -1,5 +1,6 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP * * SPDX-License-Identifier: BSD-3-Clause */ @@ -11,8 +12,8 @@ * @{ */ -#ifndef SCI_RM_RPC_H -#define SCI_RM_RPC_H +#ifndef SC_RM_RPC_H +#define SC_RM_RPC_H /* Includes */ @@ -23,37 +24,39 @@ */ /*@{*/ #define RM_FUNC_UNKNOWN 0 /* Unknown function */ -#define RM_FUNC_PARTITION_ALLOC 1U /* Index for rm_partition_alloc() RPC call */ -#define RM_FUNC_SET_CONFIDENTIAL 31U /* Index for rm_set_confidential() RPC call */ -#define RM_FUNC_PARTITION_FREE 2U /* Index for rm_partition_free() RPC call */ -#define RM_FUNC_GET_DID 26U /* Index for rm_get_did() RPC call */ -#define RM_FUNC_PARTITION_STATIC 3U /* Index for rm_partition_static() RPC call */ -#define RM_FUNC_PARTITION_LOCK 4U /* Index for rm_partition_lock() RPC call */ -#define RM_FUNC_GET_PARTITION 5U /* Index for rm_get_partition() RPC call */ -#define RM_FUNC_SET_PARENT 6U /* Index for rm_set_parent() RPC call */ -#define RM_FUNC_MOVE_ALL 7U /* Index for rm_move_all() RPC call */ -#define RM_FUNC_ASSIGN_RESOURCE 8U /* Index for rm_assign_resource() RPC call */ -#define RM_FUNC_SET_RESOURCE_MOVABLE 9U /* Index for rm_set_resource_movable() RPC call */ -#define RM_FUNC_SET_SUBSYS_RSRC_MOVABLE 28U /* Index for rm_set_subsys_rsrc_movable() RPC call */ -#define RM_FUNC_SET_MASTER_ATTRIBUTES 10U /* Index for rm_set_master_attributes() RPC call */ -#define RM_FUNC_SET_MASTER_SID 11U /* Index for rm_set_master_sid() RPC call */ -#define RM_FUNC_SET_PERIPHERAL_PERMISSIONS 12U /* Index for rm_set_peripheral_permissions() RPC call */ -#define RM_FUNC_IS_RESOURCE_OWNED 13U /* Index for rm_is_resource_owned() RPC call */ -#define RM_FUNC_IS_RESOURCE_MASTER 14U /* Index for rm_is_resource_master() RPC call */ -#define RM_FUNC_IS_RESOURCE_PERIPHERAL 15U /* Index for rm_is_resource_peripheral() RPC call */ -#define RM_FUNC_GET_RESOURCE_INFO 16U /* Index for rm_get_resource_info() RPC call */ -#define RM_FUNC_MEMREG_ALLOC 17U /* Index for rm_memreg_alloc() RPC call */ -#define RM_FUNC_MEMREG_SPLIT 29U /* Index for rm_memreg_split() RPC call */ -#define RM_FUNC_MEMREG_FREE 18U /* Index for rm_memreg_free() RPC call */ -#define RM_FUNC_FIND_MEMREG 30U /* Index for rm_find_memreg() RPC call */ -#define RM_FUNC_ASSIGN_MEMREG 19U /* Index for rm_assign_memreg() RPC call */ -#define RM_FUNC_SET_MEMREG_PERMISSIONS 20U /* Index for rm_set_memreg_permissions() RPC call */ -#define RM_FUNC_IS_MEMREG_OWNED 21U /* Index for rm_is_memreg_owned() RPC call */ -#define RM_FUNC_GET_MEMREG_INFO 22U /* Index for rm_get_memreg_info() RPC call */ -#define RM_FUNC_ASSIGN_PAD 23U /* Index for rm_assign_pad() RPC call */ -#define RM_FUNC_SET_PAD_MOVABLE 24U /* Index for rm_set_pad_movable() RPC call */ -#define RM_FUNC_IS_PAD_OWNED 25U /* Index for rm_is_pad_owned() RPC call */ -#define RM_FUNC_DUMP 27U /* Index for rm_dump() RPC call */ +#define RM_FUNC_PARTITION_ALLOC 1U /* Index for sc_rm_partition_alloc() RPC call */ +#define RM_FUNC_SET_CONFIDENTIAL 31U /* Index for sc_rm_set_confidential() RPC call */ +#define RM_FUNC_PARTITION_FREE 2U /* Index for sc_rm_partition_free() RPC call */ +#define RM_FUNC_GET_DID 26U /* Index for sc_rm_get_did() RPC call */ +#define RM_FUNC_PARTITION_STATIC 3U /* Index for sc_rm_partition_static() RPC call */ +#define RM_FUNC_PARTITION_LOCK 4U /* Index for sc_rm_partition_lock() RPC call */ +#define RM_FUNC_GET_PARTITION 5U /* Index for sc_rm_get_partition() RPC call */ +#define RM_FUNC_SET_PARENT 6U /* Index for sc_rm_set_parent() RPC call */ +#define RM_FUNC_MOVE_ALL 7U /* Index for sc_rm_move_all() RPC call */ +#define RM_FUNC_ASSIGN_RESOURCE 8U /* Index for sc_rm_assign_resource() RPC call */ +#define RM_FUNC_SET_RESOURCE_MOVABLE 9U /* Index for sc_rm_set_resource_movable() RPC call */ +#define RM_FUNC_SET_SUBSYS_RSRC_MOVABLE 28U /* Index for sc_rm_set_subsys_rsrc_movable() RPC call */ +#define RM_FUNC_SET_MASTER_ATTRIBUTES 10U /* Index for sc_rm_set_master_attributes() RPC call */ +#define RM_FUNC_SET_MASTER_SID 11U /* Index for sc_rm_set_master_sid() RPC call */ +#define RM_FUNC_SET_PERIPHERAL_PERMISSIONS 12U /* Index for sc_rm_set_peripheral_permissions() RPC call */ +#define RM_FUNC_IS_RESOURCE_OWNED 13U /* Index for sc_rm_is_resource_owned() RPC call */ +#define RM_FUNC_GET_RESOURCE_OWNER 33U /* Index for sc_rm_get_resource_owner() RPC call */ +#define RM_FUNC_IS_RESOURCE_MASTER 14U /* Index for sc_rm_is_resource_master() RPC call */ +#define RM_FUNC_IS_RESOURCE_PERIPHERAL 15U /* Index for sc_rm_is_resource_peripheral() RPC call */ +#define RM_FUNC_GET_RESOURCE_INFO 16U /* Index for sc_rm_get_resource_info() RPC call */ +#define RM_FUNC_MEMREG_ALLOC 17U /* Index for sc_rm_memreg_alloc() RPC call */ +#define RM_FUNC_MEMREG_SPLIT 29U /* Index for sc_rm_memreg_split() RPC call */ +#define RM_FUNC_MEMREG_FRAG 32U /* Index for sc_rm_memreg_frag() RPC call */ +#define RM_FUNC_MEMREG_FREE 18U /* Index for sc_rm_memreg_free() RPC call */ +#define RM_FUNC_FIND_MEMREG 30U /* Index for sc_rm_find_memreg() RPC call */ +#define RM_FUNC_ASSIGN_MEMREG 19U /* Index for sc_rm_assign_memreg() RPC call */ +#define RM_FUNC_SET_MEMREG_PERMISSIONS 20U /* Index for sc_rm_set_memreg_permissions() RPC call */ +#define RM_FUNC_IS_MEMREG_OWNED 21U /* Index for sc_rm_is_memreg_owned() RPC call */ +#define RM_FUNC_GET_MEMREG_INFO 22U /* Index for sc_rm_get_memreg_info() RPC call */ +#define RM_FUNC_ASSIGN_PAD 23U /* Index for sc_rm_assign_pad() RPC call */ +#define RM_FUNC_SET_PAD_MOVABLE 24U /* Index for sc_rm_set_pad_movable() RPC call */ +#define RM_FUNC_IS_PAD_OWNED 25U /* Index for sc_rm_is_pad_owned() RPC call */ +#define RM_FUNC_DUMP 27U /* Index for sc_rm_dump() RPC call */ /*@}*/ /* Types */ @@ -64,18 +67,11 @@ * This function dispatches an incoming RM RPC request. * * @param[in] caller_pt caller partition + * @param[in] mu MU message came from * @param[in] msg pointer to RPC message */ -void rm_dispatch(sc_rm_pt_t caller_pt, sc_rpc_msg_t *msg); +void rm_dispatch(sc_rm_pt_t caller_pt, sc_rsrc_t mu, sc_rpc_msg_t *msg); -/*! - * This function translates and dispatches an RM RPC request. - * - * @param[in] ipc IPC handle - * @param[in] msg pointer to RPC message - */ -void rm_xlate(sc_ipc_t ipc, sc_rpc_msg_t *msg); - -#endif /* SCI_RM_RPC_H */ +#endif /* SC_RM_RPC_H */ /**@}*/ diff --git a/plat/imx/common/sci/svc/seco/sci_seco_rpc.h b/plat/imx/common/sci/svc/seco/sci_seco_rpc.h new file mode 100644 index 00000000..3688b6d7 --- /dev/null +++ b/plat/imx/common/sci/svc/seco/sci_seco_rpc.h @@ -0,0 +1,71 @@ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/*! + * Header file for the SECO RPC implementation. + * + * @addtogroup SECO_SVC + * @{ + */ + +#ifndef SC_SECO_RPC_H +#define SC_SECO_RPC_H + +/* Includes */ + +/* Defines */ + +/*! + * @name Defines for RPC SECO function calls + */ +/*@{*/ +#define SECO_FUNC_UNKNOWN 0 /* Unknown function */ +#define SECO_FUNC_IMAGE_LOAD 1U /* Index for sc_seco_image_load() RPC call */ +#define SECO_FUNC_AUTHENTICATE 2U /* Index for sc_seco_authenticate() RPC call */ +#define SECO_FUNC_ENH_AUTHENTICATE 24U /* Index for sc_seco_enh_authenticate() RPC call */ +#define SECO_FUNC_FORWARD_LIFECYCLE 3U /* Index for sc_seco_forward_lifecycle() RPC call */ +#define SECO_FUNC_RETURN_LIFECYCLE 4U /* Index for sc_seco_return_lifecycle() RPC call */ +#define SECO_FUNC_COMMIT 5U /* Index for sc_seco_commit() RPC call */ +#define SECO_FUNC_ATTEST_MODE 6U /* Index for sc_seco_attest_mode() RPC call */ +#define SECO_FUNC_ATTEST 7U /* Index for sc_seco_attest() RPC call */ +#define SECO_FUNC_GET_ATTEST_PKEY 8U /* Index for sc_seco_get_attest_pkey() RPC call */ +#define SECO_FUNC_GET_ATTEST_SIGN 9U /* Index for sc_seco_get_attest_sign() RPC call */ +#define SECO_FUNC_ATTEST_VERIFY 10U /* Index for sc_seco_attest_verify() RPC call */ +#define SECO_FUNC_GEN_KEY_BLOB 11U /* Index for sc_seco_gen_key_blob() RPC call */ +#define SECO_FUNC_LOAD_KEY 12U /* Index for sc_seco_load_key() RPC call */ +#define SECO_FUNC_GET_MP_KEY 13U /* Index for sc_seco_get_mp_key() RPC call */ +#define SECO_FUNC_UPDATE_MPMR 14U /* Index for sc_seco_update_mpmr() RPC call */ +#define SECO_FUNC_GET_MP_SIGN 15U /* Index for sc_seco_get_mp_sign() RPC call */ +#define SECO_FUNC_BUILD_INFO 16U /* Index for sc_seco_build_info() RPC call */ +#define SECO_FUNC_CHIP_INFO 17U /* Index for sc_seco_chip_info() RPC call */ +#define SECO_FUNC_ENABLE_DEBUG 18U /* Index for sc_seco_enable_debug() RPC call */ +#define SECO_FUNC_GET_EVENT 19U /* Index for sc_seco_get_event() RPC call */ +#define SECO_FUNC_FUSE_WRITE 20U /* Index for sc_seco_fuse_write() RPC call */ +#define SECO_FUNC_PATCH 21U /* Index for sc_seco_patch() RPC call */ +#define SECO_FUNC_START_RNG 22U /* Index for sc_seco_start_rng() RPC call */ +#define SECO_FUNC_SAB_MSG 23U /* Index for sc_seco_sab_msg() RPC call */ +#define SECO_FUNC_SECVIO_ENABLE 25U /* Index for sc_seco_secvio_enable() RPC call */ +#define SECO_FUNC_SECVIO_CONFIG 26U /* Index for sc_seco_secvio_config() RPC call */ +#define SECO_FUNC_SECVIO_DGO_CONFIG 27U /* Index for sc_seco_secvio_dgo_config() RPC call */ +/*@}*/ + +/* Types */ + +/* Functions */ + +/*! + * This function dispatches an incoming SECO RPC request. + * + * @param[in] caller_pt caller partition + * @param[in] mu MU message came from + * @param[in] msg pointer to RPC message + */ +void seco_dispatch(sc_rm_pt_t caller_pt, sc_rsrc_t mu, sc_rpc_msg_t *msg); + +#endif /* SC_SECO_RPC_H */ + +/**@}*/ diff --git a/plat/imx/common/sci/svc/seco/seco_rpc_clnt.c b/plat/imx/common/sci/svc/seco/seco_rpc_clnt.c new file mode 100644 index 00000000..5b98ebd2 --- /dev/null +++ b/plat/imx/common/sci/svc/seco/seco_rpc_clnt.c @@ -0,0 +1,629 @@ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/*! + * File containing client-side RPC functions for the SECO service. These + * functions are ported to clients that communicate to the SC. + * + * @addtogroup SECO_SVC + * @{ + */ + +/* Includes */ + +#include <sci/sci_types.h> +#include <sci/svc/rm/sci_rm_api.h> +#include <sci/svc/seco/sci_seco_api.h> +#include <sci/sci_rpc.h> +#include "sci_seco_rpc.h" +#include <stdlib.h> + +/* Local Defines */ + +/* Local Types */ + +/* Local Functions */ + +sc_err_t sc_seco_image_load(sc_ipc_t ipc, sc_faddr_t addr_src, + sc_faddr_t addr_dst, uint32_t len, sc_bool_t fw) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 7U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_IMAGE_LOAD); + + RPC_U32(&msg, 0U) = U32(addr_src >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr_src); + RPC_U32(&msg, 8U) = U32(addr_dst >> 32ULL); + RPC_U32(&msg, 12U) = U32(addr_dst); + RPC_U32(&msg, 16U) = U32(len); + RPC_U8(&msg, 20U) = B2U8(fw); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_seco_authenticate(sc_ipc_t ipc, sc_seco_auth_cmd_t cmd, + sc_faddr_t addr) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 4U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_AUTHENTICATE); + + RPC_U32(&msg, 0U) = U32(addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr); + RPC_U8(&msg, 8U) = U8(cmd); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_seco_enh_authenticate(sc_ipc_t ipc, sc_seco_auth_cmd_t cmd, + sc_faddr_t addr, uint32_t mask1, + uint32_t mask2) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 6U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_ENH_AUTHENTICATE); + + RPC_U32(&msg, 0U) = U32(addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr); + RPC_U32(&msg, 8U) = U32(mask1); + RPC_U32(&msg, 12U) = U32(mask2); + RPC_U8(&msg, 16U) = U8(cmd); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_seco_forward_lifecycle(sc_ipc_t ipc, uint32_t change) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_FORWARD_LIFECYCLE); + + RPC_U32(&msg, 0U) = U32(change); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_seco_return_lifecycle(sc_ipc_t ipc, sc_faddr_t addr) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_RETURN_LIFECYCLE); + + RPC_U32(&msg, 0U) = U32(addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_seco_commit(sc_ipc_t ipc, uint32_t *info) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_COMMIT); + + RPC_U32(&msg, 0U) = U32(*info); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + *info = (uint32_t)RPC_U32(&msg, 0U); + + return err; +} + +sc_err_t sc_seco_attest_mode(sc_ipc_t ipc, uint32_t mode) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_ATTEST_MODE); + + RPC_U32(&msg, 0U) = U32(mode); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_seco_attest(sc_ipc_t ipc, uint64_t nonce) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_ATTEST); + + RPC_U32(&msg, 0U) = U32(nonce >> 32ULL); + RPC_U32(&msg, 4U) = U32(nonce); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_seco_get_attest_pkey(sc_ipc_t ipc, sc_faddr_t addr) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_GET_ATTEST_PKEY); + + RPC_U32(&msg, 0U) = U32(addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_seco_get_attest_sign(sc_ipc_t ipc, sc_faddr_t addr) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_GET_ATTEST_SIGN); + + RPC_U32(&msg, 0U) = U32(addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_seco_attest_verify(sc_ipc_t ipc, sc_faddr_t addr) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_ATTEST_VERIFY); + + RPC_U32(&msg, 0U) = U32(addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_seco_gen_key_blob(sc_ipc_t ipc, uint32_t id, sc_faddr_t load_addr, + sc_faddr_t export_addr, uint16_t max_size) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 7U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_GEN_KEY_BLOB); + + RPC_U32(&msg, 0U) = U32(load_addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(load_addr); + RPC_U32(&msg, 8U) = U32(export_addr >> 32ULL); + RPC_U32(&msg, 12U) = U32(export_addr); + RPC_U32(&msg, 16U) = U32(id); + RPC_U16(&msg, 20U) = U16(max_size); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_seco_load_key(sc_ipc_t ipc, uint32_t id, sc_faddr_t addr) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 4U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_LOAD_KEY); + + RPC_U32(&msg, 0U) = U32(addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr); + RPC_U32(&msg, 8U) = U32(id); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_seco_get_mp_key(sc_ipc_t ipc, sc_faddr_t dst_addr, + uint16_t dst_size) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 4U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_GET_MP_KEY); + + RPC_U32(&msg, 0U) = U32(dst_addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(dst_addr); + RPC_U16(&msg, 8U) = U16(dst_size); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_seco_update_mpmr(sc_ipc_t ipc, sc_faddr_t addr, uint8_t size, + uint8_t lock) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 4U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_UPDATE_MPMR); + + RPC_U32(&msg, 0U) = U32(addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr); + RPC_U8(&msg, 8U) = U8(size); + RPC_U8(&msg, 9U) = U8(lock); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_seco_get_mp_sign(sc_ipc_t ipc, sc_faddr_t msg_addr, + uint16_t msg_size, sc_faddr_t dst_addr, + uint16_t dst_size) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 6U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_GET_MP_SIGN); + + RPC_U32(&msg, 0U) = U32(msg_addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(msg_addr); + RPC_U32(&msg, 8U) = U32(dst_addr >> 32ULL); + RPC_U32(&msg, 12U) = U32(dst_addr); + RPC_U16(&msg, 16U) = U16(msg_size); + RPC_U16(&msg, 18U) = U16(dst_size); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +void sc_seco_build_info(sc_ipc_t ipc, uint32_t *version, uint32_t *commit) +{ + sc_rpc_msg_t msg; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_BUILD_INFO); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + if (version != NULL) { + *version = (uint32_t)RPC_U32(&msg, 0U); + } + if (commit != NULL) { + *commit = (uint32_t)RPC_U32(&msg, 4U); + } +} + +sc_err_t sc_seco_chip_info(sc_ipc_t ipc, uint16_t *lc, uint16_t *monotonic, + uint32_t *uid_l, uint32_t *uid_h) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_CHIP_INFO); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + if (uid_l != NULL) { + *uid_l = (uint32_t)RPC_U32(&msg, 0U); + } + if (uid_h != NULL) { + *uid_h = (uint32_t)RPC_U32(&msg, 4U); + } + if (lc != NULL) { + *lc = (uint16_t)RPC_U16(&msg, 8U); + } + if (monotonic != NULL) { + *monotonic = (uint16_t)RPC_U16(&msg, 10U); + } + + return err; +} + +sc_err_t sc_seco_enable_debug(sc_ipc_t ipc, sc_faddr_t addr) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_ENABLE_DEBUG); + + RPC_U32(&msg, 0U) = U32(addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_seco_get_event(sc_ipc_t ipc, uint8_t idx, uint32_t *event) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_GET_EVENT); + + RPC_U8(&msg, 0U) = U8(idx); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + if (event != NULL) { + *event = (uint32_t)RPC_U32(&msg, 0U); + } + + return err; +} + +sc_err_t sc_seco_fuse_write(sc_ipc_t ipc, sc_faddr_t addr) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_FUSE_WRITE); + + RPC_U32(&msg, 0U) = U32(addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_seco_patch(sc_ipc_t ipc, sc_faddr_t addr) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_PATCH); + + RPC_U32(&msg, 0U) = U32(addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_seco_start_rng(sc_ipc_t ipc, sc_seco_rng_stat_t * status) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_START_RNG); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + if (status != NULL) { + *status = (sc_seco_rng_stat_t) RPC_U32(&msg, 0U); + } + + return err; +} + +sc_err_t sc_seco_sab_msg(sc_ipc_t ipc, sc_faddr_t addr) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_SAB_MSG); + + RPC_U32(&msg, 0U) = U32(addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_seco_secvio_enable(sc_ipc_t ipc) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_SECVIO_ENABLE); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + return err; +} + +sc_err_t sc_seco_secvio_config(sc_ipc_t ipc, uint8_t id, uint8_t access, + uint32_t *data0, uint32_t *data1, + uint32_t *data2, uint32_t *data3, + uint32_t *data4, uint8_t size) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 7U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_SECVIO_CONFIG); + + RPC_U32(&msg, 0U) = U32(*data0); + RPC_U32(&msg, 4U) = U32(*data1); + RPC_U32(&msg, 8U) = U32(*data2); + RPC_U32(&msg, 12U) = U32(*data3); + RPC_U32(&msg, 16U) = U32(*data4); + RPC_U8(&msg, 20U) = U8(id); + RPC_U8(&msg, 21U) = U8(access); + RPC_U8(&msg, 22U) = U8(size); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + *data0 = (uint32_t)RPC_U32(&msg, 0U); + *data1 = (uint32_t)RPC_U32(&msg, 4U); + *data2 = (uint32_t)RPC_U32(&msg, 8U); + *data3 = (uint32_t)RPC_U32(&msg, 12U); + *data4 = (uint32_t)RPC_U32(&msg, 16U); + + return err; +} + +sc_err_t sc_seco_secvio_dgo_config(sc_ipc_t ipc, uint8_t id, uint8_t access, + uint32_t *data) +{ + sc_rpc_msg_t msg; + sc_err_t err; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = U8(SECO_FUNC_SECVIO_DGO_CONFIG); + + RPC_U32(&msg, 0U) = U32(*data); + RPC_U8(&msg, 4U) = U8(id); + RPC_U8(&msg, 5U) = U8(access); + + sc_call_rpc(ipc, &msg, SC_FALSE); + + err = (sc_err_t)RPC_R8(&msg); + + *data = (uint32_t)RPC_U32(&msg, 0U); + + return err; +} + +/**@}*/ diff --git a/plat/imx/common/sci/svc/timer/sci_timer_rpc.h b/plat/imx/common/sci/svc/timer/sci_timer_rpc.h index 67163993..7858ecdc 100644 --- a/plat/imx/common/sci/svc/timer/sci_timer_rpc.h +++ b/plat/imx/common/sci/svc/timer/sci_timer_rpc.h @@ -24,24 +24,24 @@ */ /*@{*/ #define TIMER_FUNC_UNKNOWN 0 /* Unknown function */ -#define TIMER_FUNC_SET_WDOG_TIMEOUT 1U /* Index for timer_set_wdog_timeout() RPC call */ -#define TIMER_FUNC_SET_WDOG_PRE_TIMEOUT 12U /* Index for timer_set_wdog_pre_timeout() RPC call */ -#define TIMER_FUNC_START_WDOG 2U /* Index for timer_start_wdog() RPC call */ -#define TIMER_FUNC_STOP_WDOG 3U /* Index for timer_stop_wdog() RPC call */ -#define TIMER_FUNC_PING_WDOG 4U /* Index for timer_ping_wdog() RPC call */ -#define TIMER_FUNC_GET_WDOG_STATUS 5U /* Index for timer_get_wdog_status() RPC call */ -#define TIMER_FUNC_PT_GET_WDOG_STATUS 13U /* Index for timer_pt_get_wdog_status() RPC call */ -#define TIMER_FUNC_SET_WDOG_ACTION 10U /* Index for timer_set_wdog_action() RPC call */ -#define TIMER_FUNC_SET_RTC_TIME 6U /* Index for timer_set_rtc_time() RPC call */ -#define TIMER_FUNC_GET_RTC_TIME 7U /* Index for timer_get_rtc_time() RPC call */ -#define TIMER_FUNC_GET_RTC_SEC1970 9U /* Index for timer_get_rtc_sec1970() RPC call */ -#define TIMER_FUNC_SET_RTC_ALARM 8U /* Index for timer_set_rtc_alarm() RPC call */ -#define TIMER_FUNC_SET_RTC_PERIODIC_ALARM 14U /* Index for timer_set_rtc_periodic_alarm() RPC call */ -#define TIMER_FUNC_CANCEL_RTC_ALARM 15U /* Index for timer_cancel_rtc_alarm() RPC call */ -#define TIMER_FUNC_SET_RTC_CALB 11U /* Index for timer_set_rtc_calb() RPC call */ -#define TIMER_FUNC_SET_SYSCTR_ALARM 16U /* Index for timer_set_sysctr_alarm() RPC call */ -#define TIMER_FUNC_SET_SYSCTR_PERIODIC_ALARM 17U /* Index for timer_set_sysctr_periodic_alarm() RPC call */ -#define TIMER_FUNC_CANCEL_SYSCTR_ALARM 18U /* Index for timer_cancel_sysctr_alarm() RPC call */ +#define TIMER_FUNC_SET_WDOG_TIMEOUT 1U /* Index for sc_timer_set_wdog_timeout() RPC call */ +#define TIMER_FUNC_SET_WDOG_PRE_TIMEOUT 12U /* Index for sc_timer_set_wdog_pre_timeout() RPC call */ +#define TIMER_FUNC_START_WDOG 2U /* Index for sc_timer_start_wdog() RPC call */ +#define TIMER_FUNC_STOP_WDOG 3U /* Index for sc_timer_stop_wdog() RPC call */ +#define TIMER_FUNC_PING_WDOG 4U /* Index for sc_timer_ping_wdog() RPC call */ +#define TIMER_FUNC_GET_WDOG_STATUS 5U /* Index for sc_timer_get_wdog_status() RPC call */ +#define TIMER_FUNC_PT_GET_WDOG_STATUS 13U /* Index for sc_timer_pt_get_wdog_status() RPC call */ +#define TIMER_FUNC_SET_WDOG_ACTION 10U /* Index for sc_timer_set_wdog_action() RPC call */ +#define TIMER_FUNC_SET_RTC_TIME 6U /* Index for sc_timer_set_rtc_time() RPC call */ +#define TIMER_FUNC_GET_RTC_TIME 7U /* Index for sc_timer_get_rtc_time() RPC call */ +#define TIMER_FUNC_GET_RTC_SEC1970 9U /* Index for sc_timer_get_rtc_sec1970() RPC call */ +#define TIMER_FUNC_SET_RTC_ALARM 8U /* Index for sc_timer_set_rtc_alarm() RPC call */ +#define TIMER_FUNC_SET_RTC_PERIODIC_ALARM 14U /* Index for sc_timer_set_rtc_periodic_alarm() RPC call */ +#define TIMER_FUNC_CANCEL_RTC_ALARM 15U /* Index for sc_timer_cancel_rtc_alarm() RPC call */ +#define TIMER_FUNC_SET_RTC_CALB 11U /* Index for sc_timer_set_rtc_calb() RPC call */ +#define TIMER_FUNC_SET_SYSCTR_ALARM 16U /* Index for sc_timer_set_sysctr_alarm() RPC call */ +#define TIMER_FUNC_SET_SYSCTR_PERIODIC_ALARM 17U /* Index for sc_timer_set_sysctr_periodic_alarm() RPC call */ +#define TIMER_FUNC_CANCEL_SYSCTR_ALARM 18U /* Index for sc_timer_cancel_sysctr_alarm() RPC call */ /*@}*/ /* Types */ @@ -52,17 +52,10 @@ * This function dispatches an incoming TIMER RPC request. * * @param[in] caller_pt caller partition + * @param[in] mu MU message came from * @param[in] msg pointer to RPC message */ -void timer_dispatch(sc_rm_pt_t caller_pt, sc_rpc_msg_t *msg); - -/*! - * This function translates and dispatches an TIMER RPC request. - * - * @param[in] ipc IPC handle - * @param[in] msg pointer to RPC message - */ -void timer_xlate(sc_ipc_t ipc, sc_rpc_msg_t *msg); +void timer_dispatch(sc_rm_pt_t caller_pt, sc_rsrc_t mu, sc_rpc_msg_t *msg); #endif /* SC_TIMER_RPC_H */ diff --git a/plat/imx/common/sci/svc/timer/timer_rpc_clnt.c b/plat/imx/common/sci/svc/timer/timer_rpc_clnt.c index a82be96f..231a8a79 100644 --- a/plat/imx/common/sci/svc/timer/timer_rpc_clnt.c +++ b/plat/imx/common/sci/svc/timer/timer_rpc_clnt.c @@ -19,8 +19,8 @@ #include <sci/svc/rm/sci_rm_api.h> #include <sci/svc/timer/sci_timer_api.h> #include <sci/sci_rpc.h> -#include <stdlib.h> #include "sci_timer_rpc.h" +#include <stdlib.h> /* Local Defines */ @@ -31,113 +31,122 @@ sc_err_t sc_timer_set_wdog_timeout(sc_ipc_t ipc, sc_timer_wdog_time_t timeout) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_SET_WDOG_TIMEOUT; - RPC_U32(&msg, 0U) = (uint32_t)timeout; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_SET_WDOG_TIMEOUT); + + RPC_U32(&msg, 0U) = U32(timeout); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_timer_set_wdog_pre_timeout(sc_ipc_t ipc, sc_timer_wdog_time_t pre_timeout) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_SET_WDOG_PRE_TIMEOUT; - RPC_U32(&msg, 0U) = (uint32_t)pre_timeout; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_SET_WDOG_PRE_TIMEOUT); + + RPC_U32(&msg, 0U) = U32(pre_timeout); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_timer_start_wdog(sc_ipc_t ipc, sc_bool_t lock) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_START_WDOG; - RPC_U8(&msg, 0U) = (uint8_t)lock; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_START_WDOG); + + RPC_U8(&msg, 0U) = B2U8(lock); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_timer_stop_wdog(sc_ipc_t ipc) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_STOP_WDOG; RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_STOP_WDOG); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_timer_ping_wdog(sc_ipc_t ipc) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_PING_WDOG; RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_PING_WDOG); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } -sc_err_t sc_timer_get_wdog_status(sc_ipc_t ipc, - sc_timer_wdog_time_t *timeout, +sc_err_t sc_timer_get_wdog_status(sc_ipc_t ipc, sc_timer_wdog_time_t *timeout, sc_timer_wdog_time_t *max_timeout, sc_timer_wdog_time_t *remaining_time) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_GET_WDOG_STATUS; RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_GET_WDOG_STATUS); sc_call_rpc(ipc, &msg, SC_FALSE); - if (timeout != NULL) - *timeout = RPC_U32(&msg, 0U); - - if (max_timeout != NULL) - *max_timeout = RPC_U32(&msg, 4U); + err = (sc_err_t)RPC_R8(&msg); - if (remaining_time != NULL) - *remaining_time = RPC_U32(&msg, 8U); + if (timeout != NULL) { + *timeout = (sc_timer_wdog_time_t)RPC_U32(&msg, 0U); + } + if (max_timeout != NULL) { + *max_timeout = (sc_timer_wdog_time_t)RPC_U32(&msg, 4U); + } + if (remaining_time != NULL) { + *remaining_time = (sc_timer_wdog_time_t)RPC_U32(&msg, 8U); + } - result = RPC_R8(&msg); - return (sc_err_t)result; + return err; } sc_err_t sc_timer_pt_get_wdog_status(sc_ipc_t ipc, sc_rm_pt_t pt, @@ -146,46 +155,51 @@ sc_err_t sc_timer_pt_get_wdog_status(sc_ipc_t ipc, sc_rm_pt_t pt, sc_timer_wdog_time_t *remaining_time) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_PT_GET_WDOG_STATUS; - RPC_U8(&msg, 0U) = (uint8_t)pt; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_PT_GET_WDOG_STATUS); - sc_call_rpc(ipc, &msg, SC_FALSE); + RPC_U8(&msg, 0U) = U8(pt); - if (timeout != NULL) - *timeout = RPC_U32(&msg, 0U); + sc_call_rpc(ipc, &msg, SC_FALSE); - if (remaining_time != NULL) - *remaining_time = RPC_U32(&msg, 4U); + err = (sc_err_t)RPC_R8(&msg); - result = RPC_R8(&msg); - if (enb != NULL) - *enb = RPC_U8(&msg, 8U); + if (timeout != NULL) { + *timeout = (sc_timer_wdog_time_t)RPC_U32(&msg, 0U); + } + if (remaining_time != NULL) { + *remaining_time = (sc_timer_wdog_time_t)RPC_U32(&msg, 4U); + } + if (enb != NULL) { + *enb = (sc_bool_t)U2B(RPC_U8(&msg, 8U)); + } - return (sc_err_t)result; + return err; } -sc_err_t sc_timer_set_wdog_action(sc_ipc_t ipc, - sc_rm_pt_t pt, sc_timer_wdog_action_t action) +sc_err_t sc_timer_set_wdog_action(sc_ipc_t ipc, sc_rm_pt_t pt, + sc_timer_wdog_action_t action) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_SET_WDOG_ACTION; - RPC_U8(&msg, 0U) = (uint8_t)pt; - RPC_U8(&msg, 1U) = (uint8_t)action; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_SET_WDOG_ACTION); + + RPC_U8(&msg, 0U) = U8(pt); + RPC_U8(&msg, 1U) = U8(action); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_timer_set_rtc_time(sc_ipc_t ipc, uint16_t year, uint8_t mon, @@ -193,23 +207,25 @@ sc_err_t sc_timer_set_rtc_time(sc_ipc_t ipc, uint16_t year, uint8_t mon, uint8_t sec) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_SET_RTC_TIME; - RPC_U16(&msg, 0U) = (uint16_t)year; - RPC_U8(&msg, 2U) = (uint8_t)mon; - RPC_U8(&msg, 3U) = (uint8_t)day; - RPC_U8(&msg, 4U) = (uint8_t)hour; - RPC_U8(&msg, 5U) = (uint8_t)min; - RPC_U8(&msg, 6U) = (uint8_t)sec; RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_SET_RTC_TIME); + + RPC_U16(&msg, 0U) = U16(year); + RPC_U8(&msg, 2U) = U8(mon); + RPC_U8(&msg, 3U) = U8(day); + RPC_U8(&msg, 4U) = U8(hour); + RPC_U8(&msg, 5U) = U8(min); + RPC_U8(&msg, 6U) = U8(sec); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_timer_get_rtc_time(sc_ipc_t ipc, uint16_t *year, uint8_t *mon, @@ -217,54 +233,58 @@ sc_err_t sc_timer_get_rtc_time(sc_ipc_t ipc, uint16_t *year, uint8_t *mon, uint8_t *sec) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_GET_RTC_TIME; RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_GET_RTC_TIME); sc_call_rpc(ipc, &msg, SC_FALSE); - if (year != NULL) - *year = RPC_U16(&msg, 0U); - - result = RPC_R8(&msg); - if (mon != NULL) - *mon = RPC_U8(&msg, 2U); - - if (day != NULL) - *day = RPC_U8(&msg, 3U); - - if (hour != NULL) - *hour = RPC_U8(&msg, 4U); - - if (min != NULL) - *min = RPC_U8(&msg, 5U); - - if (sec != NULL) - *sec = RPC_U8(&msg, 6U); - - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + if (year != NULL) { + *year = (uint16_t)RPC_U16(&msg, 0U); + } + if (mon != NULL) { + *mon = (uint8_t)RPC_U8(&msg, 2U); + } + if (day != NULL) { + *day = (uint8_t)RPC_U8(&msg, 3U); + } + if (hour != NULL) { + *hour = (uint8_t)RPC_U8(&msg, 4U); + } + if (min != NULL) { + *min = (uint8_t)RPC_U8(&msg, 5U); + } + if (sec != NULL) { + *sec = (uint8_t)RPC_U8(&msg, 6U); + } + + return err; } sc_err_t sc_timer_get_rtc_sec1970(sc_ipc_t ipc, uint32_t *sec) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_GET_RTC_SEC1970; RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_GET_RTC_SEC1970); sc_call_rpc(ipc, &msg, SC_FALSE); - if (sec != NULL) - *sec = RPC_U32(&msg, 0U); + err = (sc_err_t)RPC_R8(&msg); - result = RPC_R8(&msg); - return (sc_err_t)result; + if (sec != NULL) { + *sec = (uint32_t)RPC_U32(&msg, 0U); + } + + return err; } sc_err_t sc_timer_set_rtc_alarm(sc_ipc_t ipc, uint16_t year, uint8_t mon, @@ -272,125 +292,137 @@ sc_err_t sc_timer_set_rtc_alarm(sc_ipc_t ipc, uint16_t year, uint8_t mon, uint8_t sec) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_SET_RTC_ALARM; - RPC_U16(&msg, 0U) = (uint16_t)year; - RPC_U8(&msg, 2U) = (uint8_t)mon; - RPC_U8(&msg, 3U) = (uint8_t)day; - RPC_U8(&msg, 4U) = (uint8_t)hour; - RPC_U8(&msg, 5U) = (uint8_t)min; - RPC_U8(&msg, 6U) = (uint8_t)sec; RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_SET_RTC_ALARM); + + RPC_U16(&msg, 0U) = U16(year); + RPC_U8(&msg, 2U) = U8(mon); + RPC_U8(&msg, 3U) = U8(day); + RPC_U8(&msg, 4U) = U8(hour); + RPC_U8(&msg, 5U) = U8(min); + RPC_U8(&msg, 6U) = U8(sec); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_timer_set_rtc_periodic_alarm(sc_ipc_t ipc, uint32_t sec) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_SET_RTC_PERIODIC_ALARM; - RPC_U32(&msg, 0U) = (uint32_t)sec; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_SET_RTC_PERIODIC_ALARM); + + RPC_U32(&msg, 0U) = U32(sec); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_timer_cancel_rtc_alarm(sc_ipc_t ipc) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_CANCEL_RTC_ALARM; RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_CANCEL_RTC_ALARM); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_timer_set_rtc_calb(sc_ipc_t ipc, int8_t count) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_SET_RTC_CALB; - RPC_I8(&msg, 0U) = (int8_t) count; RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_SET_RTC_CALB); + + RPC_I8(&msg, 0U) = I8(count); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_timer_set_sysctr_alarm(sc_ipc_t ipc, uint64_t ticks) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_SET_SYSCTR_ALARM; - RPC_U32(&msg, 0U) = (uint32_t)(ticks >> 32U); - RPC_U32(&msg, 4U) = (uint32_t)ticks; RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_SET_SYSCTR_ALARM); + + RPC_U32(&msg, 0U) = U32(ticks >> 32ULL); + RPC_U32(&msg, 4U) = U32(ticks); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_timer_set_sysctr_periodic_alarm(sc_ipc_t ipc, uint64_t ticks) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_SET_SYSCTR_PERIODIC_ALARM; - RPC_U32(&msg, 0U) = (uint32_t)(ticks >> 32U); - RPC_U32(&msg, 4U) = (uint32_t)ticks; RPC_SIZE(&msg) = 3U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_SET_SYSCTR_PERIODIC_ALARM); + + RPC_U32(&msg, 0U) = U32(ticks >> 32ULL); + RPC_U32(&msg, 4U) = U32(ticks); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } sc_err_t sc_timer_cancel_sysctr_alarm(sc_ipc_t ipc) { sc_rpc_msg_t msg; - uint8_t result; + sc_err_t err; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t)SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t)TIMER_FUNC_CANCEL_SYSCTR_ALARM; RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_CANCEL_SYSCTR_ALARM); sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_err_t)result; + err = (sc_err_t)RPC_R8(&msg); + + return err; } /**@}*/ |