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authorDimitris Papastamos <dimitris.papastamos@arm.com>2019-02-27 11:46:48 +0000
committerDimitris Papastamos <dimitris.papastamos@arm.com>2019-03-04 13:12:17 +0000
commit6ecfda52fcbbb8f2daa9bc2023617b7cb93aaf63 (patch)
treea97a63d7e5ea4c088487b9f027fa2d44528233d1
parentc9aa2786f350dfe5be9fa1329dbeea70395d79f6 (diff)
Ensure proper ID register is checked for feature detection
SSBS support is determined by checking ID_AA64PFR1_EL1 and not ID_AA64PFR0_EL1. Fixes ARM-Software/tf-issues#679 Change-Id: I8ecba13b850995ec6a6ede3c2a1e02e69a3a95db Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
-rw-r--r--include/arch/aarch64/arch_helpers.h1
-rw-r--r--services/arm_arch_svc/arm_arch_svc_setup.c4
2 files changed, 3 insertions, 2 deletions
diff --git a/include/arch/aarch64/arch_helpers.h b/include/arch/aarch64/arch_helpers.h
index 836d61ef..2fce6686 100644
--- a/include/arch/aarch64/arch_helpers.h
+++ b/include/arch/aarch64/arch_helpers.h
@@ -208,6 +208,7 @@ DEFINE_SYSREG_RW_FUNCS(par_el1)
DEFINE_SYSREG_READ_FUNC(id_pfr1_el1)
DEFINE_SYSREG_READ_FUNC(id_aa64isar1_el1)
DEFINE_SYSREG_READ_FUNC(id_aa64pfr0_el1)
+DEFINE_SYSREG_READ_FUNC(id_aa64pfr1_el1)
DEFINE_SYSREG_READ_FUNC(id_aa64dfr0_el1)
DEFINE_SYSREG_READ_FUNC(id_afr0_el1)
DEFINE_SYSREG_READ_FUNC(CurrentEl)
diff --git a/services/arm_arch_svc/arm_arch_svc_setup.c b/services/arm_arch_svc/arm_arch_svc_setup.c
index dfbe02cd..1fc7827b 100644
--- a/services/arm_arch_svc/arm_arch_svc_setup.c
+++ b/services/arm_arch_svc/arm_arch_svc_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -41,7 +41,7 @@ static int32_t smccc_arch_features(u_register_t arg)
* PE implements architectural Speculation Store Bypass Safe
* (SSBS) feature.
*/
- ssbs = (read_id_aa64pfr0_el1() >> ID_AA64PFR1_EL1_SSBS_SHIFT) &
+ ssbs = (read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_SSBS_SHIFT) &
ID_AA64PFR1_EL1_SSBS_MASK;
/*