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authorJacky Bai <ping.bai@nxp.com>2019-12-09 09:53:28 +0800
committerJacky Bai <ping.bai@nxp.com>2019-12-24 20:01:39 +0800
commit5c94297e76b11e034fa3d2148f1709fd3452d4c9 (patch)
tree3ba1360e2082a8595c628125f869a32266670af9
parent357fbf3cf0fa72c21e1c0ed52cfed9010fe312e4 (diff)
plat: imx8m: Keep A53 PLAT on in wait mode(ret)
Keep A53 PLAT(SCU) power domain on in wait mode(ret). RBC count only need to be set in PLAT OFF mode, so change it accordingly. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
-rw-r--r--plat/imx/imx8m/gpc_common.c8
-rw-r--r--plat/imx/imx8m/imx8m_psci_common.c2
2 files changed, 4 insertions, 6 deletions
diff --git a/plat/imx/imx8m/gpc_common.c b/plat/imx/imx8m/gpc_common.c
index eb2801ce..8aae1a62 100644
--- a/plat/imx/imx8m/gpc_common.c
+++ b/plat/imx/imx8m/gpc_common.c
@@ -133,14 +133,12 @@ void imx_set_cluster_powerdown(unsigned int last_core, uint8_t power_state)
val = mmio_read_32(IMX_GPC_BASE + LPCR_A53_AD);
val &= ~EN_L2_WFI_PDN;
/* L2 cache memory is on in WAIT mode */
- if (is_local_state_off(power_state))
+ if (is_local_state_off(power_state)) {
val |= (L2PGE | EN_PLAT_PDN);
- else
- val |= EN_PLAT_PDN;
+ imx_a53_plat_slot_config(true);
+ }
mmio_write_32(IMX_GPC_BASE + LPCR_A53_AD, val);
-
- imx_a53_plat_slot_config(true);
} else {
/* clear the slot and ack for cluster power down */
imx_a53_plat_slot_config(false);
diff --git a/plat/imx/imx8m/imx8m_psci_common.c b/plat/imx/imx8m/imx8m_psci_common.c
index fd5e7147..f074db3a 100644
--- a/plat/imx/imx8m/imx8m_psci_common.c
+++ b/plat/imx/imx8m/imx8m_psci_common.c
@@ -197,7 +197,7 @@ void __dead2 imx_pwr_domain_pwr_down_wfi(const psci_power_state_t *target_state)
* drived by the 32K OSC, so delay 30us to make sure the counter
* is really running.
*/
- if (!is_local_state_run(CLUSTER_PWR_STATE(target_state))) {
+ if (is_local_state_off(CLUSTER_PWR_STATE(target_state))) {
imx_set_rbc_count();
udelay(30);
}