diff options
author | John Tsichritzis <john.tsichritzis@arm.com> | 2019-05-20 13:09:34 +0100 |
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committer | John Tsichritzis <john.tsichritzis@arm.com> | 2019-05-20 14:07:15 +0100 |
commit | 532a67dd16c535fd48fd0522984975b1bce07317 (patch) | |
tree | 4e0f033ef70420689342d7bdce96044c1503c428 | |
parent | d8b11091b6f9032c16fdc54218ceda10d21e3355 (diff) |
Update docs for FVP v11.6
Change-Id: I33c1bf49aa10867e1a2ca4c167112b99bf756dda
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
-rw-r--r-- | docs/user-guide.rst | 10 | ||||
-rw-r--r-- | readme.rst | 10 |
2 files changed, 10 insertions, 10 deletions
diff --git a/docs/user-guide.rst b/docs/user-guide.rst index b67a82d0..0079b1ad 100644 --- a/docs/user-guide.rst +++ b/docs/user-guide.rst @@ -1668,7 +1668,7 @@ The latest version of the AArch64 build of TF-A has been tested on the following Arm FVPs without shifted affinities, and that do not support threaded CPU cores (64-bit host machine only). -The FVP models used are Version 11.5 Build 33, unless otherwise stated. +The FVP models used are Version 11.6 Build 45, unless otherwise stated. - ``FVP_Base_AEMv8A-AEMv8A`` - ``FVP_Base_AEMv8A-AEMv8A-AEMv8A-AEMv8A-CCN502`` @@ -1688,14 +1688,14 @@ The FVP models used are Version 11.5 Build 33, unless otherwise stated. - ``FVP_Base_Cortex-A73x4`` - ``FVP_Base_Cortex-A75x4`` - ``FVP_Base_Cortex-A76x4`` -- ``FVP_Base_Cortex-A76AEx4`` (Tested with internal model) -- ``FVP_Base_Cortex-A76AEx8`` (Tested with internal model) -- ``FVP_Base_Neoverse-N1x4`` (Tested with internal model) +- ``FVP_Base_Cortex-A76AEx4`` +- ``FVP_Base_Cortex-A76AEx8`` +- ``FVP_Base_Neoverse-N1x4`` - ``FVP_Base_Deimos`` - ``FVP_CSS_SGI-575`` (Version 11.3 build 42) - ``FVP_CSS_SGM-775`` (Version 11.3 build 42) - ``FVP_RD_E1Edge`` (Version 11.3 build 42) -- ``FVP_RD_N1Edge`` (Version 11.3 build 42) +- ``FVP_RD_N1Edge`` - ``Foundation_Platform`` The latest version of the AArch32 build of TF-A has been tested on the following @@ -176,7 +176,7 @@ The latest version of the AArch64 build of TF-A has been tested on the following Arm FVPs without shifted affinities, and that do not support threaded CPU cores (64-bit host machine only). -The FVP models used are Version 11.5 Build 33, unless otherwise stated. +The FVP models used are Version 11.6 Build 45, unless otherwise stated. - ``FVP_Base_AEMv8A-AEMv8A`` - ``FVP_Base_AEMv8A-AEMv8A-AEMv8A-AEMv8A-CCN502`` @@ -196,14 +196,14 @@ The FVP models used are Version 11.5 Build 33, unless otherwise stated. - ``FVP_Base_Cortex-A73x4`` - ``FVP_Base_Cortex-A75x4`` - ``FVP_Base_Cortex-A76x4`` -- ``FVP_Base_Cortex-A76AEx4`` (Tested with internal model) -- ``FVP_Base_Cortex-A76AEx8`` (Tested with internal model) -- ``FVP_Base_Neoverse-N1x4`` (Tested with internal model) +- ``FVP_Base_Cortex-A76AEx4`` +- ``FVP_Base_Cortex-A76AEx8`` +- ``FVP_Base_Neoverse-N1x4`` - ``FVP_Base_Deimos`` - ``FVP_CSS_SGI-575`` (Version 11.3 build 42) - ``FVP_CSS_SGM-775`` (Version 11.3 build 42) - ``FVP_RD_E1Edge`` (Version 11.3 build 42) -- ``FVP_RD_N1Edge`` (Version 11.3 build 42) +- ``FVP_RD_N1Edge`` - ``Foundation_Platform`` The latest version of the AArch32 build of TF-A has been tested on the following |