Merge pull request #1849 from loumay-arm/lm/a73_errata

Cortex-A73: Implement workaround for errata 852427

4 files changed, 49 insertions, 0 deletions

diff --git a/docs/cpu-specific-build-macros.rst b/docs/cpu-specific-build-macros.rst
index 81738d8c..95538d02 100644
--- a/docs/cpu-specific-build-macros.rst
+++ b/docs/cpu-specific-build-macros.rst
@@ -166,6 +166,9 @@ For Cortex-A72, the following errata build flags are defined :
 
 For Cortex-A73, the following errata build flags are defined :
 
+-  ``ERRATA_A73_852427``: This applies errata 852427 workaround to Cortex-A73
+   CPU. This needs to be enabled only for revision r0p0 of the CPU.
+
 -  ``ERRATA_A73_855423``: This applies errata 855423 workaround to Cortex-A73
    CPU. This needs to be enabled only for revision <= r0p1 of the CPU.
 
diff --git a/include/lib/cpus/aarch64/cortex_a73.h b/include/lib/cpus/aarch64/cortex_a73.h
index 61b2b737..1238c0ef 100644
--- a/include/lib/cpus/aarch64/cortex_a73.h
+++ b/include/lib/cpus/aarch64/cortex_a73.h
@@ -31,6 +31,8 @@
 
 #define CORTEX_A73_IMP_DEF_REG1_DISABLE_LOAD_PASS_STORE	(ULL(1) << 3)
 
+#define CORTEX_A73_DIAGNOSTIC_REGISTER	S3_0_C15_C0_1
+
 #define CORTEX_A73_IMP_DEF_REG2		S3_0_C15_C0_2
 
 #endif /* CORTEX_A73_H */
diff --git a/lib/cpus/aarch64/cortex_a73.S b/lib/cpus/aarch64/cortex_a73.S
index 6cfa4b52..5c8a8871 100644
--- a/lib/cpus/aarch64/cortex_a73.S
+++ b/lib/cpus/aarch64/cortex_a73.S
@@ -36,6 +36,34 @@ func cortex_a73_disable_smp
 endfunc cortex_a73_disable_smp
 
 	/* ---------------------------------------------------
+	 * Errata Workaround for Cortex A73 Errata #852427.
+	 * This applies only to revision r0p0 of Cortex A73.
+	 * Inputs:
+	 * x0: variant[4:7] and revision[0:3] of current cpu.
+	 * Shall clobber: x0-x17
+	 * ---------------------------------------------------
+	 */
+func errata_a73_852427_wa
+	/*
+	 * Compare x0 against revision r0p0
+	 */
+	mov	x17, x30
+	bl	check_errata_852427
+	cbz	x0, 1f
+	mrs	x1, CORTEX_A73_DIAGNOSTIC_REGISTER
+	orr	x1, x1, #(1 << 12)
+	msr	CORTEX_A73_DIAGNOSTIC_REGISTER, x1
+	isb
+1:
+	ret	x17
+endfunc errata_a73_852427_wa
+
+func check_errata_852427
+	mov	x1, #0x00
+	b	cpu_rev_var_ls
+endfunc check_errata_852427
+
+	/* ---------------------------------------------------
 	 * Errata Workaround for Cortex A73 Errata #855423.
 	 * This applies only to revision <= r0p1 of Cortex A73.
 	 * Inputs:
@@ -71,8 +99,15 @@ endfunc check_errata_855423
 func cortex_a73_reset_func
 	mov	x19, x30
 	bl	cpu_get_rev_var
+	mov	x18, x0
+
+#if ERRATA_A73_852427
+	mov	x0, x18
+	bl	errata_a73_852427_wa
+#endif
 
 #if ERRATA_A73_855423
+	mov	x0, x18
 	bl	errata_a73_855423_wa
 #endif
 
@@ -200,6 +235,7 @@ func cortex_a73_errata_report
 	 * Report all errata. The revision-variant information is passed to
 	 * checking functions of each errata.
 	 */
+	report_errata ERRATA_A73_852427, cortex_a73, 852427
 	report_errata ERRATA_A73_855423, cortex_a73, 855423
 	report_errata WORKAROUND_CVE_2017_5715, cortex_a73, cve_2017_5715
 	report_errata WORKAROUND_CVE_2018_3639, cortex_a73, cve_2018_3639
diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk
index 2d3984e1..4985dd06 100644
--- a/lib/cpus/cpu-ops.mk
+++ b/lib/cpus/cpu-ops.mk
@@ -159,6 +159,10 @@ ERRATA_A57_859972	?=0
 # only to revision <= r0p3 of the Cortex A72 cpu.
 ERRATA_A72_859971	?=0
 
+# Flag to apply erratum 852427 workaround during reset. This erratum applies
+# only to revision r0p0 of the Cortex A73 cpu.
+ERRATA_A73_852427	?=0
+
 # Flag to apply erratum 855423 workaround during reset. This erratum applies
 # only to revision <= r0p1 of the Cortex A73 cpu.
 ERRATA_A73_855423	?=0
@@ -292,6 +296,10 @@ $(eval $(call add_define,ERRATA_A57_859972))
 $(eval $(call assert_boolean,ERRATA_A72_859971))
 $(eval $(call add_define,ERRATA_A72_859971))
 
+# Process ERRATA_A73_852427 flag
+$(eval $(call assert_boolean,ERRATA_A73_852427))
+$(eval $(call add_define,ERRATA_A73_852427))
+
 # Process ERRATA_A73_855423 flag
 $(eval $(call assert_boolean,ERRATA_A73_855423))
 $(eval $(call add_define,ERRATA_A73_855423))