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authorJacky Bai <ping.bai@nxp.com>2020-01-14 14:19:05 +0800
committerJacky Bai <ping.bai@nxp.com>2020-02-09 20:58:49 +0800
commit085ba00ae5f1e302fc76a1d146bcbe7d743384bb (patch)
tree55d87c1d225fde4487acce814aeaf09fec5feca7
parent1440ea94c250893829b16ccc30a19cdde5dc5636 (diff)
plat: imx8mq: Enable dram dvfs support on imx8mq
Enable DRAM DVFS support on i.MX8MQ. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
-rw-r--r--plat/imx/common/imx_sip_svc.c2
-rw-r--r--plat/imx/common/include/imx_sip_svc.h2
-rw-r--r--plat/imx/imx8m/ddr/dram.c7
-rw-r--r--plat/imx/imx8m/include/gpc.h1
4 files changed, 12 insertions, 0 deletions
diff --git a/plat/imx/common/imx_sip_svc.c b/plat/imx/common/imx_sip_svc.c
index 735cbe32..cf4590ff 100644
--- a/plat/imx/common/imx_sip_svc.c
+++ b/plat/imx/common/imx_sip_svc.c
@@ -33,6 +33,8 @@ static uintptr_t imx_sip_handler(unsigned int smc_fid,
case IMX_SIP_GPC:
SMC_RET1(handle, imx_gpc_handler(smc_fid, x1, x2, x3));
break;
+ case IMX_SIP_DDR_DVFS:
+ return dram_dvfs_handler(smc_fid, handle, x1, x2, x3);
#endif
#if defined(PLAT_imx8mm) || defined(PLAT_imx8mn)
case IMX_SIP_DDR_DVFS:
diff --git a/plat/imx/common/include/imx_sip_svc.h b/plat/imx/common/include/imx_sip_svc.h
index 38097070..e6a4dd5a 100644
--- a/plat/imx/common/include/imx_sip_svc.h
+++ b/plat/imx/common/include/imx_sip_svc.h
@@ -43,6 +43,8 @@ int imx_soc_info_handler(uint32_t smc_fid, u_register_t x1,
u_register_t x2, u_register_t x3);
int imx_gpc_handler(uint32_t smc_fid, u_register_t x1,
u_register_t x2, u_register_t x3);
+int dram_dvfs_handler(uint32_t smc_fid, void *handle,
+ u_register_t x1, u_register_t x2, u_register_t x3);
#endif
#if defined(PLAT_imx8mm) || defined(PLAT_imx8mn)
int dram_dvfs_handler(uint32_t smc_fid, void *handle,
diff --git a/plat/imx/imx8m/ddr/dram.c b/plat/imx/imx8m/ddr/dram.c
index d3ecf769..7dbaabfe 100644
--- a/plat/imx/imx8m/ddr/dram.c
+++ b/plat/imx/imx8m/ddr/dram.c
@@ -11,6 +11,7 @@
#include <plat/common/platform.h>
#include <dram.h>
+#include <gpc.h>
#define IMX_SIP_DDR_DVFS_GET_FREQ_COUNT 0x10
#define IMX_SIP_DDR_DVFS_GET_FREQ_INFO 0x11
@@ -251,6 +252,12 @@ int dram_dvfs_handler(uint32_t smc_fid, void *handle,
for (int i = 0; i < PLATFORM_CORE_COUNT; i++)
if (cpu_id != i && (online_cores & (0x1 << (i * 8))))
plat_ic_raise_el3_sgi(0x8, i);
+#if defined(PLAT_imx8mq)
+ for (int i = 0; i < 4; i++) {
+ if (i != cpu_id && online_cores & (1 << (i * 8)))
+ imx_gpc_core_wake(1 << i);
+ }
+#endif
/* make sure all the core in WFE */
online_cores &= ~(0x1 << (cpu_id * 8));
diff --git a/plat/imx/imx8m/include/gpc.h b/plat/imx/imx8m/include/gpc.h
index 8ae19d28..a3319c64 100644
--- a/plat/imx/imx8m/include/gpc.h
+++ b/plat/imx/imx8m/include/gpc.h
@@ -143,6 +143,7 @@ void imx_gpc_pm_domain_enable(uint32_t domain_id, bool on);
#if defined(PLAT_imx8mq)
void imx_gpc_set_a53_core_awake(uint32_t core_id);
+void imx_gpc_core_wake(uint32_t cpumask);
#endif
#endif /*IMX8M_GPC_H */