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| author | danh-arm <dan.handley@arm.com> | 2017-06-28 13:48:31 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-06-28 13:48:31 +0100 |
| commit | d6c26ade639d50e594b11b4d94dd7bef80764862 (patch) | |
| tree | ea9579787d7de474ce0a853f1a853365ce89b480 | |
| parent | c6d8466f2c4a82ac4f4adba6b9c050e19705a121 (diff) | |
| parent | 7e3f1d9c0ff65756d9b2e2b28f64e92c7b09ce4f (diff) | |
Merge pull request #1006 from robertovargas-arm/doc-format
Improve format of exception vectors in BL1 description
| -rw-r--r-- | docs/firmware-design.md | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/docs/firmware-design.md b/docs/firmware-design.md index 746e4131..9ae97170 100644 --- a/docs/firmware-design.md +++ b/docs/firmware-design.md @@ -138,6 +138,7 @@ BL1 performs minimal architectural initialization as follows. code is one of: For AArch64: + 0x0 : Synchronous exception from Current EL with SP_EL0 0x1 : IRQ exception from Current EL with SP_EL0 0x2 : FIQ exception from Current EL with SP_EL0 @@ -156,6 +157,7 @@ BL1 performs minimal architectural initialization as follows. 0xf : System Error exception from Lower EL using aarch32 For AArch32: + 0x10 : User mode 0x11 : FIQ mode 0x12 : IRQ mode |