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| author | Roberto Vargas <roberto.vargas@arm.com> | 2017-06-19 09:39:09 +0100 |
|---|---|---|
| committer | Roberto Vargas <roberto.vargas@arm.com> | 2017-06-28 12:02:53 +0100 |
| commit | 7e3f1d9c0ff65756d9b2e2b28f64e92c7b09ce4f (patch) | |
| tree | 0d04802bd74f672624b69d93242faf4632a049bc | |
| parent | 38fe380a9a04d0b4356123ed202abf064ec69cbf (diff) | |
Improve format of exception vectors in BL1 description
Without the additional newlines all the text becomes a single paragraph
and next newlines are ignored.
Change-Id: I783198477f654e3923fcabb21248f2bc62c33e9d
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
| -rw-r--r-- | docs/firmware-design.md | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/docs/firmware-design.md b/docs/firmware-design.md index 746e4131..9ae97170 100644 --- a/docs/firmware-design.md +++ b/docs/firmware-design.md @@ -138,6 +138,7 @@ BL1 performs minimal architectural initialization as follows. code is one of: For AArch64: + 0x0 : Synchronous exception from Current EL with SP_EL0 0x1 : IRQ exception from Current EL with SP_EL0 0x2 : FIQ exception from Current EL with SP_EL0 @@ -156,6 +157,7 @@ BL1 performs minimal architectural initialization as follows. 0xf : System Error exception from Lower EL using aarch32 For AArch32: + 0x10 : User mode 0x11 : FIQ mode 0x12 : IRQ mode |