diff options
| author | davidcunado-arm <david.cunado@arm.com> | 2017-06-20 12:20:08 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-06-20 12:20:08 +0100 |
| commit | 3705cd47b2a431a37e2abb2fb02e513c0c0c14f9 (patch) | |
| tree | acafd98ca74d1fc322eec74163cccee02b35d1a9 | |
| parent | 3465ab602a24f6932ca7b30e849de82fa770d986 (diff) | |
| parent | 568ac1f730a3a7445b81c6b396d354e320ef8e6a (diff) | |
Merge pull request #966 from davidcunado-arm/dc/build_with_gcc6.2
Resolve build errors flagged by GCC 6.2
| -rw-r--r-- | plat/mediatek/mt6795/include/mcucfg.h | 12 | ||||
| -rw-r--r-- | plat/mediatek/mt8173/include/mcucfg.h | 12 |
2 files changed, 10 insertions, 14 deletions
diff --git a/plat/mediatek/mt6795/include/mcucfg.h b/plat/mediatek/mt6795/include/mcucfg.h index c81de332..eff8d344 100644 --- a/plat/mediatek/mt6795/include/mcucfg.h +++ b/plat/mediatek/mt6795/include/mcucfg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -104,12 +104,10 @@ struct mt6795_mcucfg_regs { static struct mt6795_mcucfg_regs *const mt6795_mcucfg = (void *)MCUCFG_BASE; /* cpu boot mode */ -enum { - MP0_CPUCFG_64BIT_SHIFT = 12, - MP1_CPUCFG_64BIT_SHIFT = 28, - MP0_CPUCFG_64BIT = 0xf << MP0_CPUCFG_64BIT_SHIFT, - MP1_CPUCFG_64BIT = 0xf << MP1_CPUCFG_64BIT_SHIFT -}; +#define MP0_CPUCFG_64BIT_SHIFT 12 +#define MP1_CPUCFG_64BIT_SHIFT 28 +#define MP0_CPUCFG_64BIT (U(0xf) << MP0_CPUCFG_64BIT_SHIFT) +#define MP1_CPUCFG_64BIT (U(0xf) << MP1_CPUCFG_64BIT_SHIFT) /* scu related */ enum { diff --git a/plat/mediatek/mt8173/include/mcucfg.h b/plat/mediatek/mt8173/include/mcucfg.h index 23d83329..355c276e 100644 --- a/plat/mediatek/mt8173/include/mcucfg.h +++ b/plat/mediatek/mt8173/include/mcucfg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -103,12 +103,10 @@ struct mt8173_mcucfg_regs { static struct mt8173_mcucfg_regs *const mt8173_mcucfg = (void *)MCUCFG_BASE; /* cpu boot mode */ -enum { - MP0_CPUCFG_64BIT_SHIFT = 12, - MP1_CPUCFG_64BIT_SHIFT = 28, - MP0_CPUCFG_64BIT = 0xf << MP0_CPUCFG_64BIT_SHIFT, - MP1_CPUCFG_64BIT = 0xf << MP1_CPUCFG_64BIT_SHIFT -}; +#define MP0_CPUCFG_64BIT_SHIFT 12 +#define MP1_CPUCFG_64BIT_SHIFT 28 +#define MP0_CPUCFG_64BIT (U(0xf) << MP0_CPUCFG_64BIT_SHIFT) +#define MP1_CPUCFG_64BIT (U(0xf) << MP1_CPUCFG_64BIT_SHIFT) /* scu related */ enum { |