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+/*
+ FreeRTOS V8.0.0 - Copyright (C) 2014 Real Time Engineers Ltd.
+ All rights reserved
+
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
+
+ ***************************************************************************
+ * *
+ * FreeRTOS provides completely free yet professionally developed, *
+ * robust, strictly quality controlled, supported, and cross *
+ * platform software that has become a de facto standard. *
+ * *
+ * Help yourself get started quickly and support the FreeRTOS *
+ * project by purchasing a FreeRTOS tutorial book, reference *
+ * manual, or both from: http://www.FreeRTOS.org/Documentation *
+ * *
+ * Thank you! *
+ * *
+ ***************************************************************************
+
+ This file is part of the FreeRTOS distribution.
+
+ FreeRTOS is free software; you can redistribute it and/or modify it under
+ the terms of the GNU General Public License (version 2) as published by the
+ Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+
+ >>! NOTE: The modification to the GPL is included to allow you to distribute
+ >>! a combined work that includes FreeRTOS without being obliged to provide
+ >>! the source code for proprietary components outside of the FreeRTOS
+ >>! kernel.
+
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ FOR A PARTICULAR PURPOSE. Full license text is available from the following
+ link: http://www.freertos.org/a00114.html
+
+ 1 tab == 4 spaces!
+
+ ***************************************************************************
+ * *
+ * Having a problem? Start by reading the FAQ "My application does *
+ * not run, what could be wrong?" *
+ * *
+ * http://www.FreeRTOS.org/FAQHelp.html *
+ * *
+ ***************************************************************************
+
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,
+ license and Real Time Engineers Ltd. contact details.
+
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.
+
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
+ Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
+ licenses offer ticketed support, indemnification and middleware.
+
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety
+ engineered and independently SIL3 certified version for use in safety and
+ mission critical applications that require provable dependability.
+
+ 1 tab == 4 spaces!
+*/
+
+#include <FreeRTOSConfig.h>
+
+ RSEG CODE:CODE(2)
+ thumb
+
+ EXTERN pxCurrentTCB
+ EXTERN vTaskSwitchContext
+
+ PUBLIC xPortPendSVHandler
+ PUBLIC ulPortSetInterruptMask
+ PUBLIC vPortClearInterruptMask
+ PUBLIC vPortSVCHandler
+ PUBLIC vPortStartFirstTask
+ PUBLIC vPortEnableVFP
+
+
+/*-----------------------------------------------------------*/
+
+xPortPendSVHandler:
+ mrs r0, psp
+ isb
+ /* Get the location of the current TCB. */
+ ldr r3, =pxCurrentTCB
+ ldr r2, [r3]
+
+ /* Is the task using the FPU context? If so, push high vfp registers. */
+ tst r14, #0x10
+ it eq
+ vstmdbeq r0!, {s16-s31}
+
+ /* Save the core registers. */
+ stmdb r0!, {r4-r11, r14}
+
+ /* Save the new top of stack into the first member of the TCB. */
+ str r0, [r2]
+
+ stmdb sp!, {r3}
+ mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
+ msr basepri, r0
+ bl vTaskSwitchContext
+ mov r0, #0
+ msr basepri, r0
+ ldmia sp!, {r3}
+
+ /* The first item in pxCurrentTCB is the task top of stack. */
+ ldr r1, [r3]
+ ldr r0, [r1]
+
+ /* Pop the core registers. */
+ ldmia r0!, {r4-r11, r14}
+
+ /* Is the task using the FPU context? If so, pop the high vfp registers
+ too. */
+ tst r14, #0x10
+ it eq
+ vldmiaeq r0!, {s16-s31}
+
+ msr psp, r0
+ isb
+ #ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */
+ #if WORKAROUND_PMU_CM001 == 1
+ push { r14 }
+ pop { pc }
+ #endif
+ #endif
+
+ bx r14
+
+
+/*-----------------------------------------------------------*/
+
+ulPortSetInterruptMask:
+ mrs r0, basepri
+ mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY
+ msr basepri, r1
+ bx r14
+
+/*-----------------------------------------------------------*/
+
+vPortClearInterruptMask:
+ msr basepri, r0
+ bx r14
+
+/*-----------------------------------------------------------*/
+
+vPortSVCHandler:
+ /* Get the location of the current TCB. */
+ ldr r3, =pxCurrentTCB
+ ldr r1, [r3]
+ ldr r0, [r1]
+ /* Pop the core registers. */
+ ldmia r0!, {r4-r11, r14}
+ msr psp, r0
+ isb
+ mov r0, #0
+ msr basepri, r0
+ bx r14
+
+/*-----------------------------------------------------------*/
+
+vPortStartFirstTask
+ /* Use the NVIC offset register to locate the stack. */
+ ldr r0, =0xE000ED08
+ ldr r0, [r0]
+ ldr r0, [r0]
+ /* Set the msp back to the start of the stack. */
+ msr msp, r0
+ /* Call SVC to start the first task. */
+ cpsie i
+ dsb
+ isb
+ svc 0
+
+/*-----------------------------------------------------------*/
+
+vPortEnableVFP:
+ /* The FPU enable bits are in the CPACR. */
+ ldr.w r0, =0xE000ED88
+ ldr r1, [r0]
+
+ /* Enable CP10 and CP11 coprocessors, then save back. */
+ orr r1, r1, #( 0xf << 20 )
+ str r1, [r0]
+ bx r14
+
+
+
+ END
+