1 files changed, 90 insertions, 0 deletions
diff --git a/platform/devices/MCIMX7D/linker/arm/MCIMX7D_M4_qspia.scf b/platform/devices/MCIMX7D/linker/arm/MCIMX7D_M4_qspia.scf
new file mode 100644
index 0000000..ec2980f
--- /dev/null
+++ b/platform/devices/MCIMX7D/linker/arm/MCIMX7D_M4_qspia.scf
@@ -0,0 +1,90 @@
+#! armcc -E
+/*
+** ###################################################################
+**     Processors:          MCIMX7D7DVK10SA
+**                          MCIMX7D7DVM10SA
+**                          MCIMX7D3DVK10SA
+**                          MCIMX7D3EVM10SA
+**
+**     Compiler:            ARM C/C++ Compiler
+**     Reference manual:    IMX7DRM, Rev.A, February 2015
+**     Version:             rev. 1.0, 2015-07-08
+**
+**     Abstract:
+**         Linker file for the ARM C/C++ Compiler
+**
+**     Copyright (c) 2015 Freescale Semiconductor, Inc.
+**     All rights reserved.
+**
+**     Redistribution and use in source and binary forms, with or without modification,
+**     are permitted provided that the following conditions are met:
+**
+**     o Redistributions of source code must retain the above copyright notice, this list
+**       of conditions and the following disclaimer.
+**
+**     o Redistributions in binary form must reproduce the above copyright notice, this
+**       list of conditions and the following disclaimer in the documentation and/or
+**       other materials provided with the distribution.
+**
+**     o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+**       contributors may be used to endorse or promote products derived from this
+**       software without specific prior written permission.
+**
+**     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+**     ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+**     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+**     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+**     ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+**     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+**     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+**     ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+**     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+**     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+**     http:                 www.freescale.com
+**     mail:                 support@freescale.com
+**
+** ###################################################################
+*/
+
+#define m_interrupts_start             0x60100000
+#define m_interrupts_size              0x00000240
+
+#define m_text_start                   0x60100240
+#define m_text_size                    0x00007DC0
+
+#define m_data_start                   0x20000000
+#define m_data_size                    0x8000
+
+/* Sizes */
+#if (defined(__stack_size__))
+  #define Stack_Size                   __stack_size__
+#else
+  #define Stack_Size                   0x0400
+#endif
+
+#if (defined(__heap_size__))
+  #define Heap_Size                    __heap_size__
+#else
+  #define Heap_Size                    0x0400
+#endif
+
+LR_m_text m_text_start m_text_size {   ; load region size_region
+  ER_m_text m_text_start m_text_size { ; load address = execution address
+    * (InRoot$$Sections)
+    .ANY (+RO)
+  }
+  RW_m_data m_data_start m_data_size { ; RW data
+    .ANY (+RW +ZI)
+  }
+  ARM_LIB_HEAP m_data_start+m_data_size-Heap_Size-Stack_Size EMPTY  Heap_Size { ; Heap region growing up
+  }
+  ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
+  }
+}
+
+LR_m_interrupts m_interrupts_start m_interrupts_size {
+  VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
+    * (RESET,+FIRST)
+  }
+}