summaryrefslogtreecommitdiff
path: root/drivers/ufs/ti-j721e-ufs.c
blob: 4990fba6ebb278d5abfb727e0f6b0366ae3ba2ab (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
 */

#include <asm/io.h>
#include <clk.h>
#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <linux/err.h>

#define UFS_SS_CTRL             0x4
#define UFS_SS_RST_N_PCS        BIT(0)
#define UFS_SS_CLK_26MHZ        BIT(4)

static int ti_j721e_ufs_probe(struct udevice *dev)
{
	void __iomem *base;
	unsigned int clock;
	struct clk clk;
	u32 reg = 0;
	int ret;

	ret = clk_get_by_index(dev, 0, &clk);
	if (ret) {
		dev_err(dev, "failed to get M-PHY clock\n");
		return ret;
	}

	clock = clk_get_rate(&clk);
	if (IS_ERR_VALUE(clock)) {
		dev_err(dev, "failed to get rate\n");
		return ret;
	}

	base = dev_remap_addr_index(dev, 0);

	if (clock == 26000000)
		reg |= UFS_SS_CLK_26MHZ;
	/* Take UFS slave device out of reset */
	reg |= UFS_SS_RST_N_PCS;
	writel(reg, base + UFS_SS_CTRL);

	return 0;
}

static int ti_j721e_ufs_remove(struct udevice *dev)
{
	void __iomem *base = dev_remap_addr_index(dev, 0);
	u32 reg = readl(base + UFS_SS_CTRL);

	reg &= ~UFS_SS_RST_N_PCS;
	writel(reg, base + UFS_SS_CTRL);

	return 0;
}

static const struct udevice_id ti_j721e_ufs_ids[] = {
	{
		.compatible = "ti,j721e-ufs",
	},
	{},
};

U_BOOT_DRIVER(ti_j721e_ufs) = {
	.name			= "ti-j721e-ufs",
	.id			= UCLASS_MISC,
	.of_match		= ti_j721e_ufs_ids,
	.probe			= ti_j721e_ufs_probe,
	.remove			= ti_j721e_ufs_remove,
	.flags			= DM_FLAG_OS_PREPARE,
};