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// SPDX-License-Identifier: GPL-2.0+
/*
* Board specific initialization for J784S4 EVM
*
* Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
* Hari Nagalla <hnagalla@ti.com>
*
*/
#include <common.h>
#include <env.h>
#include <fdt_support.h>
#include <generic-phy.h>
#include <image.h>
#include <init.h>
#include <log.h>
#include <net.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/hardware.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <spl.h>
#include <asm/arch/sys_proto.h>
#include <dm.h>
#include <dm/uclass-internal.h>
#include "../common/board_detect.h"
#define board_is_j784s4_evm() board_ti_k3_is("J784S4-EVM")
DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
return 0;
}
int dram_init(void)
{
#ifdef CONFIG_PHYS_64BIT
gd->ram_size = 0x100000000;
#else
gd->ram_size = 0x80000000;
#endif
return 0;
}
phys_size_t board_get_usable_ram_top(phys_size_t total_size)
{
#ifdef CONFIG_PHYS_64BIT
/* Limit RAM used by U-Boot to the DDR low region */
if (gd->ram_top > 0x100000000)
return 0x100000000;
#endif
return gd->ram_top;
}
int dram_init_banksize(void)
{
/* Bank 0 declares the memory available in the DDR low region */
gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = 0x7fffffff;
gd->ram_size = 0x80000000;
#ifdef CONFIG_PHYS_64BIT
/* Bank 1 declares the memory available in the DDR high region */
gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1;
gd->bd->bi_dram[1].size = 0x77fffffff;
gd->ram_size = 0x800000000;
#endif
return 0;
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
int ft_board_setup(void *blob, struct bd_info *bd)
{
int ret;
ret = fdt_fixup_msmc_ram(blob, "/bus@100000", "sram@70000000");
if (ret < 0)
ret = fdt_fixup_msmc_ram(blob, "/interconnect@100000",
"sram@70000000");
if (ret)
printf("%s: fixing up msmc ram failed %d\n", __func__, ret);
return ret;
}
#endif
int board_late_init(void)
{
if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) {
setup_board_eeprom_env();
setup_serial();
}
return 0;
}
void spl_board_init(void)
{
}
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