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// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
/*
* Copyright (C) STMicroelectronics 2022 - All Rights Reserved
*/
/ {
aliases {
gpio0 = &gpioa;
gpio1 = &gpiob;
gpio2 = &gpioc;
gpio3 = &gpiod;
gpio4 = &gpioe;
gpio5 = &gpiof;
gpio6 = &gpiog;
gpio7 = &gpioh;
gpio8 = &gpioi;
gpio9 = &gpioj;
gpio10 = &gpiok;
gpio25 = &gpioz;
pinctrl0 = &pinctrl;
pinctrl1 = &pinctrl_z;
};
binman: binman {
multiple-images;
};
soc {
u-boot,dm-pre-reloc;
ddr: ddr@5a003000 {
u-boot,dm-pre-reloc;
compatible = "st,stm32mp1-ddr";
reg = <0x5a003000 0x550
0x5a004000 0x234>;
status = "okay";
};
};
/* need PSCI for sysreset during board_f */
psci {
u-boot,dm-pre-proper;
};
};
&bsec {
u-boot,dm-pre-reloc;
};
&gpioa {
u-boot,dm-pre-reloc;
};
&gpiob {
u-boot,dm-pre-reloc;
};
&gpioc {
u-boot,dm-pre-reloc;
};
&gpiod {
u-boot,dm-pre-reloc;
};
&gpioe {
u-boot,dm-pre-reloc;
};
&gpiof {
u-boot,dm-pre-reloc;
};
&gpiog {
u-boot,dm-pre-reloc;
};
&gpioh {
u-boot,dm-pre-reloc;
};
&gpioi {
u-boot,dm-pre-reloc;
};
&gpioj {
u-boot,dm-pre-reloc;
};
&gpiok {
u-boot,dm-pre-reloc;
};
&gpioz {
u-boot,dm-pre-reloc;
};
&optee {
u-boot,dm-pre-proper;
};
&iwdg2 {
u-boot,dm-pre-reloc;
};
/* pre-reloc probe = reserve video frame buffer in video_reserve() */
<dc {
u-boot,dm-pre-proper;
};
/* temp = waiting kernel update */
&m4_rproc {
resets = <&scmi_reset RST_SCMI_MCU>,
<&scmi_reset RST_SCMI_MCU_HOLD_BOOT>;
reset-names = "mcu_rst", "hold_boot";
};
&pinctrl {
u-boot,dm-pre-reloc;
};
&pinctrl_z {
u-boot,dm-pre-reloc;
};
&rcc {
u-boot,dm-pre-reloc;
};
&scmi {
u-boot,dm-pre-proper;
};
&usart1 {
resets = <&rcc USART1_R>;
};
&usart2 {
resets = <&rcc USART2_R>;
};
&usart3 {
resets = <&rcc USART3_R>;
};
&uart4 {
resets = <&rcc UART4_R>;
};
&uart5 {
resets = <&rcc UART5_R>;
};
&usart6 {
resets = <&rcc USART6_R>;
};
&uart7 {
resets = <&rcc UART7_R>;
};
&uart8{
resets = <&rcc UART8_R>;
};
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