/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2020 NXP */ #ifndef __IMX8MM_AB2_H #define __IMX8MM_AB2_H #include #include #include #include "imx_env.h" #define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M) #define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x920000 #define CONFIG_SPL_BSS_START_ADDR 0x910000 #define CONFIG_MALLOC_F_ADDR 0x930000 #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ /* For RAW image gives a error info not panic */ #define CONFIG_SPL_ABORT_ON_RAW_IMAGE #if defined(CONFIG_IMX8M_LPDDR4) && defined(CONFIG_TARGET_IMX8MM_AB2) #define CONFIG_POWER_PCA9450 #else #define CONFIG_POWER_BD71837 #endif #if defined(CONFIG_NAND_BOOT) #define CONFIG_SPL_NAND_BASE #define CONFIG_SPL_NAND_IDENT #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4000000 /* Put the FIT out of first 64MB boot area */ /* Set a redundant offset in nand FIT mtdpart. The new uuu will burn full boot image (not only FIT part) to the mtdpart, so we check both two offsets */ #define CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND \ (CONFIG_SYS_NAND_U_BOOT_OFFS + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8400) #endif #endif #define CONFIG_CMD_READ #define CONFIG_SERIAL_TAG #define CONFIG_FASTBOOT_USB_DEV 0 #define CONFIG_REMAKE_ELF /* ENET Config */ /* ENET1 */ #if defined(CONFIG_FEC_MXC) #define CONFIG_ETHPRIME "FEC" #define PHY_ANEG_TIMEOUT 20000 #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 0 #define IMX_FEC_BASE 0x30BE0000 #endif #ifdef CONFIG_NAND_BOOT #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:64m(nandboot),16m(nandfit),32m(nandkernel),16m(nanddtb),8m(nandtee),-(nandrootfs)" #endif #ifdef CONFIG_DISTRO_DEFAULTS #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) \ func(MMC, mmc, 1) \ func(MMC, mmc, 2) #include #else #define BOOTENV #endif /* * Another approach is add the clocks for inmates into clks_init_on * in clk-imx8mm.c, then clk_ingore_unused could be removed. */ #define JH_ROOT_DTB "imx8mm-ab2-root.dtb" #define JAILHOUSE_ENV \ "jh_clk= \0 " \ "jh_root_dtb=" JH_ROOT_DTB "\0" \ "jh_mmcboot=mw 0x303d0518 0xff; setenv fdtfile ${jh_root_dtb};" \ "setenv jh_clk clk_ignore_unused mem=1212MB; " \ "if run loadimage; then " \ "run mmcboot; " \ "else run jh_netboot; fi; \0" \ "jh_netboot=mw 0x303d0518 0xff; setenv fdtfile ${jh_root_dtb}; setenv jh_clk clk_ignore_unused mem=1212MB; run netboot; \0 " #define M4_BOOT_ENV \ "m4_boot=no\0" \ "m4_image=nxh3670.itb\0" \ "m4_loadaddr=0x80000000\0" \ "m4_nxh_app_loadaddr=0x81000000\0" \ "m4_nxh_rfmac_loadaddr=0x81012000\0" \ "m4_nxh_cf_loadaddr=0x81016000\0" \ "m4_nxh_data_loadaddr=0x8101E000\0" \ "m4_sf_loadaddr=0x08100000\0" \ "m4_fdt_file=imx8mm-ab2-m4.dtb\0" \ "m4_nxh_bin=main@1\0" \ "m4_nxh_app=app@1\0" \ "m4_nxh_rfmac=rfmac@1\0" \ "m4_nxh_cf=cf@1\0" \ "m4_nxh_data=data@1\0" \ "loadm4nxhfw=imxtract ${loadaddr} ${m4_nxh_bin} ${m4_loadaddr}; " \ "imxtract ${loadaddr} ${m4_nxh_app} ${m4_nxh_app_loadaddr}; " \ "imxtract ${loadaddr} ${m4_nxh_rfmac} ${m4_nxh_rfmac_loadaddr}; " \ "imxtract ${loadaddr} ${m4_nxh_cf} ${m4_nxh_cf_loadaddr}; " \ "imxtract ${loadaddr} ${m4_nxh_data} ${m4_nxh_data_loadaddr}\0" \ "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_image}\0" \ "update_m4_from_sd=" \ "if sf probe 0:0; then " \ "if run loadm4image; then " \ "setexpr fw_sz ${filesize} + 0xffff; " \ "setexpr fw_sz ${fw_sz} / 0x10000; " \ "setexpr fw_sz ${fw_sz} * 0x10000; " \ "sf erase 0x100000 ${fw_sz}; " \ "sf write ${m4_loadaddr} 0x100000 ${filesize}; " \ "fi; " \ "fi\0" \ "m4boot=run loadm4image; run loadm4nxhfw; dcache flush; bootaux ${m4_loadaddr}\0" \ "m4netboot=${get_cmd} ${loaddadr} ${m4_image}; " \ "run loadm4nxhfw; dcache flush; bootaux ${m4_loadaddr}; \0" \ "m4boot_sf=sf probe 0:0; dcache flush; bootaux ${m4_sf_loadaddr}\0" #define CONFIG_MFG_ENV_SETTINGS \ CONFIG_MFG_ENV_SETTINGS_DEFAULT \ "initrd_addr=0x43800000\0" \ "initrd_high=0xffffffffffffffff\0" \ "emmc_dev=2\0"\ "sd_dev=1\0" \ /* Initial environment variables */ #if defined(CONFIG_NAND_BOOT) #define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_MFG_ENV_SETTINGS \ "splashimage=0x50000000\0" \ "fdt_addr_r=0x43000000\0" \ "fdt_addr=0x43000000\0" \ "fdt_high=0xffffffffffffffff\0" \ "mtdparts=" MFG_NAND_PARTITION "\0" \ "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \ "bootargs=console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200 ubi.mtd=nandrootfs " \ "root=ubi0:nandrootfs rootfstype=ubifs " \ MFG_NAND_PARTITION \ "\0" \ "bootcmd=nand read ${loadaddr} 0x5000000 0x2000000;"\ "nand read ${fdt_addr_r} 0x7000000 0x100000;"\ "booti ${loadaddr} - ${fdt_addr_r}" #else #define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_MFG_ENV_SETTINGS \ BOOTENV \ JAILHOUSE_ENV \ M4_BOOT_ENV \ "scriptaddr=0x43500000\0" \ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "bsp_script=boot.scr\0" \ "image=Image\0" \ "splashimage=0x50000000\0" \ "console=ttymxc1,115200\0" \ "fdt_addr_r=0x43000000\0" \ "fdt_addr=0x43000000\0" \ "fdt_high=0xffffffffffffffff\0" \ "boot_fit=no\0" \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "bootm_size=0x10000000\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \ "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bsp_script};\0" \ "bootscript=echo Running bootscript from mmc ...; " \ "source\0" \ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "if test ${m4_boot} = yes || test ${m4_boot} = try; then "\ "echo Booting M4 aux core...; " \ "run m4boot; " \ "fi; " \ "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ "bootm ${loadaddr}; " \ "else " \ "if run loadfdt; then " \ "booti ${loadaddr} - ${fdt_addr_r}; " \ "else " \ "echo WARN: Cannot load the DT; " \ "fi; " \ "fi;\0" \ "netargs=setenv bootargs ${jh_clk} console=${console} " \ "root=/dev/nfs " \ "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ "netboot=echo Booting from net ...; " \ "run netargs; " \ "if test ${ip_dyn} = yes; then " \ "setenv get_cmd dhcp; " \ "else " \ "setenv get_cmd tftp; " \ "fi; " \ "if test ${m4_boot} = yes || test ${m4_boot} = try; then " \ "echo Booting M4 aux core...;" \ "run m4netboot;" \ "fi; " \ "${get_cmd} ${loadaddr} ${image}; " \ "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ "bootm ${loadaddr}; " \ "else " \ "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \ "booti ${loadaddr} - ${fdt_addr_r}; " \ "else " \ "echo WARN: Cannot load the DT; " \ "fi; " \ "fi;\0" \ "bsp_bootcmd=echo Running BSP bootcmd ...; " \ "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ "if run loadimage; then " \ "run mmcboot; " \ "else run netboot; " \ "fi; " \ "fi; " \ "fi;" #endif /* Link Definitions */ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 #define CONFIG_SYS_INIT_SP_OFFSET \ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_IMX_BOOTAUX /* USDHC */ #ifdef CONFIG_TARGET_IMX8MM_DDR4_AB2 #define CONFIG_SYS_FSL_USDHC_NUM 1 #else #define CONFIG_SYS_FSL_USDHC_NUM 2 #endif #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #ifdef CONFIG_FSL_FSPI #define FSL_FSPI_FLASH_SIZE SZ_32M #define FSL_FSPI_FLASH_NUM 1 #define FSPI0_BASE_ADDR 0x30bb0000 #define FSPI0_AMBA_BASE 0x0 #define CONFIG_FSPI_QUAD_SUPPORT #define CONFIG_SYS_FSL_FSPI_AHB #endif #ifdef CONFIG_NAND_MXS #define CONFIG_CMD_NAND_TRIMFFS /* NAND stuff */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x20000000 #define CONFIG_SYS_NAND_USE_FLASH_BBT #endif /* CONFIG_NAND_MXS */ /* USB configs */ #ifndef CONFIG_SPL_BUILD #define CONFIG_USBD_HS #endif #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #endif