// SPDX-License-Identifier: GPL-2.0
/*
 * Device Tree file for the J722S-EVM
 * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
 *
 * Schematics: https://www.ti.com/lit/zip/sprr495
 */

/dts-v1/;

#include <dt-bindings/leds/common.h>
#include "k3-j722s.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/mux/ti-serdes.h>
#include <dt-bindings/phy/phy.h>

/ {
	compatible = "ti,j722s-evm", "ti,j722s";
	model = "Texas Instruments J722S EVM";

	aliases {
		serial0 = &wkup_uart0;
		serial2 = &main_uart0;
		mmc0 = &sdhci0;
		mmc1 = &sdhci1;
		usb0 = &usb0;
		usb1 = &usb1;
	};

	chosen {
		stdout-path = &main_uart0;
	};

	memory@80000000 {
		/* 8G RAM */
		reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
		      <0x00000008 0x80000000 0x00000001 0x80000000>;
		device_type = "memory";
		bootph-pre-ram;
	};

	reserved_memory: reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		/* global cma region */
		linux,cma {
			compatible = "shared-dma-pool";
			reusable;
			size = <0x00 0x38000000>;
			linux,cma-default;
		};

		secure_tfa_ddr: tfa@9e780000 {
			reg = <0x00 0x9e780000 0x00 0x80000>;
			no-map;
		};

		secure_ddr: optee@9e800000 {
			reg = <0x00 0x9e800000 0x00 0x01800000>;
			no-map;
		};

		wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa0000000 0x00 0x100000>;
			no-map;
		};

		wkup_r5fss0_core0_memory_region: r5f-memory@a0100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa0100000 0x00 0xf00000>;
			no-map;
		};

		mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@a1000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa1000000 0x00 0x100000>;
			no-map;
		};

		mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@a1100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa1100000 0x00 0xf00000>;
			no-map;
		};

		main_r5fss0_core0_dma_memory_region: main-r5fss-dma-memory-region@a2000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa2000000 0x00 0x100000>;
			no-map;
		};

		main_r5fss0_core0_memory_region: main-r5fss-memory-region@a2100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa2100000 0x00 0xf00000>;
			no-map;
		};

		c7x_0_dma_memory_region: c7x-dma-memory@a3000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa3000000 0x00 0x100000>;
			no-map;
		};

		c7x_0_memory_region: c7x-memory@a3100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa3100000 0x00 0xf00000>;
			no-map;
		};

		c7x_1_dma_memory_region: c7x-dma-memory@a4000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa4000000 0x00 0x100000>;
			no-map;
		};

		c7x_1_memory_region: c7x-memory@a4100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa4100000 0x00 0xf00000>;
			no-map;
		};

		rtos_ipc_memory_region: ipc-memories@a5000000 {
			reg = <0x00 0xa5000000 0x00 0x1c00000>;
			alignment = <0x1000>;
			no-map;
		};

	};

	vmain_pd: regulator-0 {
		/* TPS65988 PD CONTROLLER OUTPUT */
		compatible = "regulator-fixed";
		regulator-name = "vmain_pd";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
		regulator-boot-on;
		bootph-all;
	};

	vsys_5v0: regulator-vsys5v0 {
		/* Output of LM5140 */
		compatible = "regulator-fixed";
		regulator-name = "vsys_5v0";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		vin-supply = <&vmain_pd>;
		regulator-always-on;
		regulator-boot-on;
	};

	vdd_mmc1: regulator-mmc1 {
		/* TPS22918DBVR */
		compatible = "regulator-fixed";
		regulator-name = "vdd_mmc1";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		enable-active-high;
		gpio = <&exp1 15 GPIO_ACTIVE_HIGH>;
		bootph-all;
	};

	vdd_sd_dv: regulator-TLV71033 {
		compatible = "regulator-gpio";
		regulator-name = "tlv71033";
		pinctrl-names = "default";
		pinctrl-0 = <&vdd_sd_dv_pins_default>;
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		vin-supply = <&vsys_5v0>;
		gpios = <&main_gpio0 70 GPIO_ACTIVE_HIGH>;
		states = <1800000 0x0>,
			 <3300000 0x1>;
	};

	vsys_io_1v8: regulator-vsys-io-1v8 {
		compatible = "regulator-fixed";
		regulator-name = "vsys_io_1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-always-on;
		regulator-boot-on;
	};

	vsys_io_1v2: regulator-vsys-io-1v2 {
		compatible = "regulator-fixed";
		regulator-name = "vsys_io_1v2";
		regulator-min-microvolt = <1200000>;
		regulator-max-microvolt = <1200000>;
		regulator-always-on;
		regulator-boot-on;
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&led_pins_default>;

		led-0 {
			label = "j722s-evm:red:heartbeat";
			gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
			function = LED_FUNCTION_HEARTBEAT;
			linux,default-trigger = "heartbeat";
		};

		led-1 {
			label = "j722s-evm:green:disk-activity";
			gpios = <&exp1 16 GPIO_ACTIVE_HIGH>;
			function = LED_FUNCTION_DISK_ACTIVITY;
			linux,default-trigger = "mmc1";
			default-state = "off";
		};
	};
};

&main_pmx0 {
	main_i2c0_pins_default: main-i2c0-default-pins {
		pinctrl-single,pins = <
			J722S_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D23) I2C0_SCL */
			J722S_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (B22) I2C0_SDA */
		>;
		bootph-all;
	};

	main_uart0_pins_default: main-uart0-default-pins {
		pinctrl-single,pins = <
			J722S_IOPAD(0x1c8, PIN_INPUT, 0)	/* (A22) UART0_RXD */
			J722S_IOPAD(0x1cc, PIN_OUTPUT, 0)	/* (B22) UART0_TXD */
		>;
		bootph-all;
	};

	vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
		pinctrl-single,pins = <
			J722S_IOPAD(0x0120, PIN_INPUT, 7) /* (F27) MMC2_CMD.GPIO0_70 */
		>;
		bootph-all;
	};

	main_mmc1_pins_default: main-mmc1-default-pins {
		pinctrl-single,pins = <
			J722S_IOPAD(0x023c, PIN_INPUT, 0) /* (H22) MMC1_CMD */
			J722S_IOPAD(0x0234, PIN_OUTPUT, 0) /* (H24) MMC1_CLK */
			J722S_IOPAD(0x0230, PIN_INPUT, 0) /* (H23) MMC1_DAT0 */
			J722S_IOPAD(0x022c, PIN_INPUT_PULLUP, 0) /* (H20) MMC1_DAT1 */
			J722S_IOPAD(0x0228, PIN_INPUT_PULLUP, 0) /* (J23) MMC1_DAT2 */
			J722S_IOPAD(0x0224, PIN_INPUT_PULLUP, 0) /* (H25) MMC1_DAT3 */
			J722S_IOPAD(0x0240, PIN_INPUT, 0) /* (B24) MMC1_SDCD */
		>;
		bootph-all;
	};

	mdio_pins_default: mdio-default-pins {
		pinctrl-single,pins = <
			J722S_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AC24) MDIO0_MDC */
			J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */
		>;
		bootph-all;
	};

	rgmii1_pins_default: rgmii1-default-pins {
		pinctrl-single,pins = <
			J722S_IOPAD(0x014c, PIN_INPUT, 0) /* (AC25) RGMII1_RD0 */
			J722S_IOPAD(0x0150, PIN_INPUT, 0) /* (AD27) RGMII1_RD1 */
			J722S_IOPAD(0x0154, PIN_INPUT, 0) /* (AE24) RGMII1_RD2 */
			J722S_IOPAD(0x0158, PIN_INPUT, 0) /* (AE26) RGMII1_RD3 */
			J722S_IOPAD(0x0148, PIN_INPUT, 0) /* (AE27) RGMII1_RXC */
			J722S_IOPAD(0x0144, PIN_INPUT, 0) /* (AD23) RGMII1_RX_CTL */
			J722S_IOPAD(0x0134, PIN_OUTPUT, 0) /* (AF27) RGMII1_TD0 */
			J722S_IOPAD(0x0138, PIN_OUTPUT, 0) /* (AE23) RGMII1_TD1 */
			J722S_IOPAD(0x013c, PIN_OUTPUT, 0) /* (AG25) RGMII1_TD2 */
			J722S_IOPAD(0x0140, PIN_OUTPUT, 0) /* (AF24) RGMII1_TD3 */
			J722S_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AG26) RGMII1_TXC */
			J722S_IOPAD(0x012c, PIN_OUTPUT, 0) /* (AF25) RGMII1_TX_CTL */
		>;
		bootph-all;
	};

	led_pins_default: led-default-pins {
		pinctrl-single,pins = <
			J722S_IOPAD(0x0244, PIN_INPUT, 7) /* (A24) MMC1_SDWP */
		>;
	};

	main_usb1_pins_default: main-usb1-default-pins {
		pinctrl-single,pins = <
			J722S_IOPAD(0x0258, PIN_INPUT, 0) /* (B27) USB1_DRVVBUS */
		>;
	};
};

&main_gpio1 {
	status = "okay";
	bootph-all;
};

&main_uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart0_pins_default>;
	status = "okay";
	bootph-all;
};

&mcu_pmx0 {
	wkup_uart0_pins_default: wkup-uart0-default-pins {
		pinctrl-single,pins = <
			J722S_MCU_IOPAD(0x02c, PIN_INPUT, 0)	/* (C7) WKUP_UART0_CTSn */
			J722S_MCU_IOPAD(0x030, PIN_OUTPUT, 0)	/* (C6) WKUP_UART0_RTSn */
			J722S_MCU_IOPAD(0x024, PIN_INPUT, 0)	/* (D8) WKUP_UART0_RXD */
			J722S_MCU_IOPAD(0x028, PIN_OUTPUT, 0)	/* (D7) WKUP_UART0_TXD */
		>;
		bootph-all;
	};

	wkup_i2c0_pins_default: wkup-i2c0-default-pins {
		pinctrl-single,pins = <
			J722S_MCU_IOPAD(0x04c, PIN_INPUT_PULLUP, 0)	/* (C7) WKUP_I2C0_SCL */
			J722S_MCU_IOPAD(0x050, PIN_INPUT_PULLUP, 0)	/* (C6) WKUP_I2C1_SDA */
		>;
		bootph-all;
	};
};

&wkup_uart0 {
	/* WKUP UART0 is used by DM firmware */
	pinctrl-names = "default";
	pinctrl-0 = <&wkup_uart0_pins_default>;
	status = "reserved";
	bootph-all;
};

&wkup_i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&wkup_i2c0_pins_default>;
	clock-frequency = <400000>;
	bootph-all;
};

&main_i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c0_pins_default>;
	clock-frequency = <400000>;
	bootph-all;

	exp1: gpio@23 {
		compatible = "ti,tca6424";
		reg = <0x23>;
		gpio-controller;
		#gpio-cells = <2>;
		bootph-all;
		gpio-line-names = "TRC_MUX_SEL", "OSPI/ONAND_MUX_SEL",
				  "MCASP1_FET_SEL", "CTRL_PM_I2C_OE#",
				  "CSI_VIO_SEL", "USB2.0_MUX_SEL",
				  "CSI01_MUX_SEL_2", "CSI23_MUX_SEL_2",
				  "LMK1_OE1", "LMK1_OE0",
				  "LMK2_OE0", "LMK2_OE1",
				  "GPIO_RGMII1_RST#", "GPIO_AUD_RSTn",
				  "GPIO_eMMC_RSTn", "GPIO_uSD_PWR_EN",
				  "USER_LED2", "MCAN0_STB",
				  "PCIe0_1L_RC_RSTz", "PCIe0_1L_PRSNT#",
				  "ENET1_EXP_SPARE2", "ENET1_EXP_PWRDN",
				  "PD_I2ENET1_I2CMUX_SELC_IRQ", "ENET1_EXP_RESETZ";
	};
};

&sdhci0 {
	/*eMMC*/
	status = "okay";
	ti,driver-strength-ohm = <50>;
	disable-wp;
	bootph-all;
};

&sdhci1 {
	/* SD/MMC */
	status = "okay";
	vmmc-supply = <&vdd_mmc1>;
	vqmmc-supply = <&vdd_sd_dv>;
	pinctrl-names = "default";
	pinctrl-0 = <&main_mmc1_pins_default>;
	ti,driver-strength-ohm = <50>;
	disable-wp;
	no-1-8-v;
	bootph-all;
};

&mailbox0_cluster0 {
	status = "okay";
	mbox_r5_0: mbox-r5-0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};
};

&mailbox0_cluster1 {
	status = "okay";
	mbox_mcu_r5_0: mbox-mcu-r5-0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};
};

&mailbox0_cluster2 {
	status = "okay";
	mbox_c7x_0: mbox-c7x-0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};
};

&mailbox0_cluster3 {
	status = "okay";
	mbox_main_r5_0: mbox-main-r5-0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};

	mbox_c7x_1: mbox-c7x-1 {
		ti,mbox-rx = <2 0 0>;
		ti,mbox-tx = <3 0 0>;
	};
};

&cpsw3g {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&rgmii1_pins_default>;
};

&cpsw3g_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mdio_pins_default>;

	cpsw3g_phy0: ethernet-phy@0 {
		reg = <0>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
		ti,min-output-impedance;
	};
};

&cpsw_port1 {
	phy-mode = "rgmii-rxid";
	phy-handle = <&cpsw3g_phy0>;
};

&wkup_r5fss0 {
	status = "okay";
};

&wkup_r5fss0_core0 {
	mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
	memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
			<&wkup_r5fss0_core0_memory_region>;
};

&mcu_r5fss0 {
	status = "okay";
};

&mcu_r5fss0_core0 {
	mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
			<&mcu_r5fss0_core0_memory_region>;
};

&main_r5fss0 {
	status = "okay";
};

&main_r5fss0_core0 {
	mboxes = <&mailbox0_cluster3 &mbox_main_r5_0>;
	memory-region = <&main_r5fss0_core0_dma_memory_region>,
			<&main_r5fss0_core0_memory_region>;
};

&c7x_0 {
	status = "okay";
	mboxes = <&mailbox0_cluster2 &mbox_c7x_0>;
	memory-region = <&c7x_0_dma_memory_region>,
			<&c7x_0_memory_region>;
};

&c7x_1 {
	status = "okay";
	mboxes = <&mailbox0_cluster3 &mbox_c7x_1>;
	memory-region = <&c7x_1_dma_memory_region>,
			<&c7x_1_memory_region>;
};

&serdes0_ln_ctrl {
	idle-states = <J722S_SERDES0_LANE0_USB>;
};

&serdes0 {
	status = "okay";
	serdes0_usb_link: phy@0 {
		reg = <0>;
		cdns,num-lanes = <1>;
		#phy-cells = <0>;
		cdns,phy-type = <PHY_TYPE_USB3>;
		resets = <&serdes_wiz0 1>;
	};
};

&usbss0 {
	status = "okay";
	ti,vbus-divider;
};

&usb0 {
	dr_mode = "otg";
	usb-role-switch;
};

&usbss1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_usb1_pins_default>;
	ti,vbus-divider;
};

&usb1 {
	dr_mode = "host";
	maximum-speed = "super-speed";
	phys = <&serdes0_usb_link>;
	phy-names = "cdns3,usb3-phy";
};