// SPDX-License-Identifier: GPL-2.0 /* * https://beagleboard.org/ai-64 * * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ * Copyright (C) 2022 Jason Kridner, BeagleBoard.org Foundation * Copyright (C) 2022-2023 Robert Nelson, BeagleBoard.org Foundation */ #include "k3-j721e-binman.dtsi" / { chosen { tick-timer = &timer1; }; memory@80000000 { bootph-pre-ram; }; }; &cbass_main { bootph-pre-ram; }; &main_navss { bootph-pre-ram; }; &cbass_mcu_wakeup { bootph-pre-ram; timer1: timer@40400000 { compatible = "ti,omap5430-timer"; reg = <0x0 0x40400000 0x0 0x80>; ti,timer-alwon; clock-frequency = <25000000>; bootph-pre-ram; }; chipid@43000014 { bootph-pre-ram; }; }; &mcu_navss { bootph-pre-ram; }; &mcu_ringacc { reg = <0x0 0x2b800000 0x0 0x400000>, <0x0 0x2b000000 0x0 0x400000>, <0x0 0x28590000 0x0 0x100>, <0x0 0x2a500000 0x0 0x40000>, <0x0 0x28440000 0x0 0x40000>; reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; bootph-pre-ram; }; &mcu_udmap { reg = <0x0 0x285c0000 0x0 0x100>, <0x0 0x284c0000 0x0 0x4000>, <0x0 0x2a800000 0x0 0x40000>, <0x0 0x284a0000 0x0 0x4000>, <0x0 0x2aa00000 0x0 0x40000>, <0x0 0x28400000 0x0 0x2000>; reg-names = "gcfg", "rchan", "rchanrt", "tchan", "tchanrt", "rflow"; bootph-pre-ram; }; &secure_proxy_main { bootph-pre-ram; }; &dmsc { bootph-pre-ram; k3_sysreset: sysreset-controller { compatible = "ti,sci-sysreset"; bootph-pre-ram; }; }; &k3_pds { bootph-pre-ram; }; &k3_clks { bootph-pre-ram; }; &k3_reset { bootph-pre-ram; }; &wkup_pmx0 { bootph-pre-ram; }; &main_pmx0 { bootph-pre-ram; }; &main_uart0 { bootph-pre-ram; }; &main_uart0_pins_default { bootph-pre-ram; }; &main_sdhci0 { bootph-pre-ram; }; &main_sdhci1 { bootph-pre-ram; sdhci-caps-mask = <0x00000007 0x00000000>; /delete-property/ cd-gpios; /delete-property/ cd-debounce-delay-ms; /delete-property/ ti,fails-without-test-cd; /delete-property/ no-1-8-v; }; &main_mmc1_pins_default { bootph-pre-ram; }; &mcu_cpsw { reg = <0x0 0x46000000 0x0 0x200000>, <0x0 0x40f00200 0x0 0x2>; reg-names = "cpsw_nuss", "mac_efuse"; /delete-property/ ranges; cpsw-phy-sel@40f04040 { compatible = "ti,am654-cpsw-phy-sel"; reg= <0x0 0x40f04040 0x0 0x4>; reg-names = "gmii-sel"; }; }; &wkup_i2c0_pins_default { bootph-pre-ram; }; &wkup_i2c0 { bootph-pre-ram; }; #ifdef CONFIG_TARGET_J721E_A72_EVM #define SPL_J721E_BEAGLEBONE_AI64_DTB "spl/dts/k3-j721e-beagleboneai64.dtb" #define J721E_BEAGLEBONE_AI64_DTB "arch/arm/dts/k3-j721e-beagleboneai64.dtb" &spl_j721e_evm_dtb { filename = SPL_J721E_BEAGLEBONE_AI64_DTB; }; &j721e_evm_dtb { filename = J721E_BEAGLEBONE_AI64_DTB; }; &spl_j721e_evm_dtb_unsigned { filename = SPL_J721E_BEAGLEBONE_AI64_DTB; }; &j721e_evm_dtb_unsigned { filename = J721E_BEAGLEBONE_AI64_DTB; }; #endif