// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/
 */

#include <dt-bindings/pinctrl/k3.h>
#include <dt-bindings/net/ti-dp83867.h>

/ {
	chosen {
		stdout-path = "serial2:115200n8";
	};

	board {
		compatible = "ti,am654-evm";
		u-boot,dm-spl;
	};

	aliases {
		serial2 = &main_uart0;
		ethernet0 = &cpsw_port1;
		usb0 = &usb0;
		usb1 = &usb1;
	};
};

&cbass_main{
	u-boot,dm-spl;
};

&cbass_mcu {
	u-boot,dm-spl;

	mcu_navss {
		u-boot,dm-spl;

		ringacc@2b800000 {
			reg =	<0x0 0x2b800000 0x0 0x400000>,
				<0x0 0x2b000000 0x0 0x400000>,
				<0x0 0x28590000 0x0 0x100>,
				<0x0 0x2a500000 0x0 0x40000>,
				<0x0 0x28440000 0x0 0x40000>;
			reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
			u-boot,dm-spl;
		};

		dma-controller@285c0000 {
			reg =	<0x0 0x285c0000 0x0 0x100>,
				<0x0 0x284c0000 0x0 0x4000>,
				<0x0 0x2a800000 0x0 0x40000>,
				<0x0 0x284a0000 0x0 0x4000>,
				<0x0 0x2aa00000 0x0 0x40000>,
				<0x0 0x28400000 0x0 0x2000>;
			reg-names = "gcfg", "rchan", "rchanrt", "tchan",
					    "tchanrt", "rflow";
			u-boot,dm-spl;
		};
	};
};

&cbass_wakeup {
	u-boot,dm-spl;
};

&secure_proxy_main {
	u-boot,dm-spl;
};

&dmsc {
	u-boot,dm-spl;
	k3_sysreset: sysreset-controller {
		compatible = "ti,sci-sysreset";
		u-boot,dm-spl;
	};
};

&k3_pds {
	u-boot,dm-spl;
};

&k3_clks {
	u-boot,dm-spl;
};

&k3_reset {
	u-boot,dm-spl;
};

&wkup_pmx0 {
	u-boot,dm-spl;

	wkup_i2c0_pins_default {
		u-boot,dm-spl;
	};
};

&main_pmx0 {
	u-boot,dm-spl;
	main_uart0_pins_default: main_uart0_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01e4, PIN_INPUT, 0)	/* (AF11) UART0_RXD */
			AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0)	/* (AE11) UART0_TXD */
			AM65X_IOPAD(0x01ec, PIN_INPUT, 0)	/* (AG11) UART0_CTSn */
			AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0)	/* (AD11) UART0_RTSn */
		>;
		u-boot,dm-spl;
	};

	usb0_pins_default: usb0_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
		>;
		u-boot,dm-spl;
	};
};

&main_pmx1 {
	u-boot,dm-spl;
};

&wkup_pmx0 {
	mcu_cpsw_pins_default: mcu_cpsw_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */
			AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5) MCU_RGMII1_RX_CTL */
			AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* (M2) MCU_RGMII1_TD3 */
			AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* (M3) MCU_RGMII1_TD2 */
			AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* (M4) MCU_RGMII1_TD1 */
			AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* (M5) MCU_RGMII1_TD0 */
			AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* (L2) MCU_RGMII1_RD3 */
			AM65X_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* (L5) MCU_RGMII1_RD2 */
			AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* (M6) MCU_RGMII1_RD1 */
			AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* (L6) MCU_RGMII1_RD0 */
			AM65X_WKUP_IOPAD(0x0070, PIN_INPUT, 0) /* (N1) MCU_RGMII1_TXC */
			AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* (M1) MCU_RGMII1_RXC */
		>;
	};

	mcu_mdio_pins_default: mcu_mdio1_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
			AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
		>;
	};

	mcu-fss0-ospi0-pins-default {
		u-boot,dm-spl;
	};
};

&main_uart0 {
	u-boot,dm-spl;
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart0_pins_default>;
	status = "okay";
};

&main_mmc0_pins_default {
	u-boot,dm-spl;
};

&main_mmc1_pins_default {
	u-boot,dm-spl;
};

&sdhci0 {
	u-boot,dm-spl;
};

&sdhci1 {
	u-boot,dm-spl;
};

&mcu_cpsw {
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
};

&davinci_mdio {
	phy0: ethernet-phy@0 {
		reg = <0>;
		/* TODO: phy reset: TCA9555RTWR(i2c:0x21)[p04].GPIO_MCU_RGMII_RSTN */
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};

&cpsw_port1 {
	phy-mode = "rgmii-rxid";
	phy-handle = <&phy0>;
};

&mcu_cpsw {
	reg = <0x0 0x46000000 0x0 0x200000>,
	      <0x0 0x40f00200 0x0 0x2>;
	reg-names = "cpsw_nuss", "mac_efuse";
	/delete-property/ ranges;

	cpsw-phy-sel@40f04040 {
		compatible = "ti,am654-cpsw-phy-sel";
		reg= <0x0 0x40f04040 0x0 0x4>;
		reg-names = "gmii-sel";
	};
};

&wkup_i2c0 {
	u-boot,dm-spl;
	gpio@38 {
		u-boot,dm-spl;
	};
};


&fss {
	u-boot,dm-spl;
};

&ospi0 {
	u-boot,dm-spl;

	 flash@0{
		u-boot,dm-spl;

		partition@3fe0000 {
			label = "ospi.phypattern";
			reg = <0x3fe0000 0x20000>;
			u-boot,dm-spl;
		};
	};
};

&chipid {
	u-boot,dm-spl;
};

&dwc3_0 {
	status = "okay";
	u-boot,dm-spl;
};

&usb0_phy {
	status = "okay";
	u-boot,dm-spl;
};

&usb0 {
	pinctrl-names = "default";
	pinctrl-0 = <&usb0_pins_default>;
	dr_mode = "peripheral";
	u-boot,dm-spl;
};

&scm_conf {
	u-boot,dm-spl;
};

&pru0_0 {
	remoteproc-name = "pru0_0";
};

&rtu0_0 {
	remoteproc-name = "rtu0_0";
};

&tx_pru0_0 {
	remoteproc-name = "tx_pru0_0";
};

&pru0_1 {
	remoteproc-name = "pru0_1";
};

&rtu0_1 {
	remoteproc-name = "rtu0_1";
};

&tx_pru0_1 {
	remoteproc-name = "tx_pru0_1";
};

&pru1_0 {
	remoteproc-name = "pru1_0";
};

&rtu1_0 {
	remoteproc-name = "rtu1_0";
};

&tx_pru1_0 {
	remoteproc-name = "tx_pru1_0";
};

&pru1_1 {
	remoteproc-name = "pru1_1";
};

&rtu1_1 {
	remoteproc-name = "rtu1_1";
};

&tx_pru1_1 {
	remoteproc-name = "tx_pru1_1";
};

&pru2_0 {
	remoteproc-name = "pru2_0";
};

&rtu2_0 {
	remoteproc-name = "rtu2_0";
};

&tx_pru2_0 {
	remoteproc-name = "tx_pru2_0";
};

&pru2_1 {
	remoteproc-name = "pru2_1";
};

&rtu2_1 {
	remoteproc-name = "rtu2_1";
};

&tx_pru2_1 {
	remoteproc-name = "tx_pru2_1";
};