// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
 */

#include "k3-am64x-binman.dtsi"

/ {
	chosen {
		stdout-path = "serial2:115200n8";
		tick-timer = &timer1;
	};

	memory@80000000 {
		bootph-pre-ram;
	};
};

&cbass_main{
	bootph-pre-ram;
	timer1: timer@2400000 {
		compatible = "ti,omap5430-timer";
		reg = <0x0 0x2400000 0x0 0x80>;
		ti,timer-alwon;
		clock-frequency = <200000000>;
		bootph-pre-ram;
	};
};

&pru0_0 {
	remoteproc-name = "pru0_0";
};

&rtu0_0 {
	remoteproc-name = "rtu0_0";
};

&tx_pru0_0 {
	remoteproc-name = "tx_pru0_0";
};

&pru0_1 {
	remoteproc-name = "pru0_1";
};

&rtu0_1 {
	remoteproc-name = "rtu0_1";
};

&tx_pru0_1 {
	remoteproc-name = "tx_pru0_1";
};

&pru1_0 {
	remoteproc-name = "pru1_0";
};

&rtu1_0 {
	remoteproc-name = "rtu1_0";
};

&tx_pru1_0 {
	remoteproc-name = "tx_pru1_0";
};

&pru1_1 {
	remoteproc-name = "pru1_1";
};

&rtu1_1 {
	remoteproc-name = "rtu1_1";
};

&main_conf {
	bootph-pre-ram;
	chipid@14 {
		bootph-pre-ram;
	};
};

&main_pmx0 {
	bootph-pre-ram;
};

&main_i2c0_pins_default {
	bootph-pre-ram;
};

&main_i2c0 {
	bootph-pre-ram;
};

&tca9554 {
	bootph-pre-ram;
};

&main_uart0 {
	bootph-pre-ram;
};

&usb0 {
	dr_mode="peripheral";
	bootph-pre-ram;
};

&usbss0 {
	bootph-pre-ram;
};

&main_mmc1_pins_default {
	bootph-pre-ram;
};

&main_usb0_pins_default {
	bootph-pre-ram;
};

&dmss {
	bootph-pre-ram;
};

&secure_proxy_main {
	bootph-pre-ram;
};

&dmsc {
	bootph-pre-ram;
	k3_sysreset: sysreset-controller {
		compatible = "ti,sci-sysreset";
		bootph-pre-ram;
	};
};

&k3_pds {
	bootph-pre-ram;
};

&k3_clks {
	bootph-pre-ram;
};

&k3_reset {
	bootph-pre-ram;
};

&sdhci0 {
	bootph-pre-ram;
};

&sdhci1 {
	bootph-pre-ram;
};

&cpsw3g {
	reg = <0x0 0x8000000 0x0 0x200000>,
	      <0x0 0x43000200 0x0 0x8>;
	reg-names = "cpsw_nuss", "mac_efuse";
	/delete-property/ ranges;
	pinctrl-0 = <&mdio1_pins_default	/* HACK: as MDIO driver is not DM enabled */
		     &rgmii1_pins_default
		     &rgmii2_pins_default>;

	cpsw-phy-sel@04044 {
		compatible = "ti,am64-phy-gmii-sel";
		reg = <0x0 0x43004044 0x0 0x8>;
	};
};

&cpsw_port2 {
	status = "disabled";
};

&main_bcdma {
	bootph-pre-ram;
	reg = <0x00 0x485c0100 0x00 0x100>,
	      <0x00 0x4c000000 0x00 0x20000>,
	      <0x00 0x4a820000 0x00 0x20000>,
	      <0x00 0x4aa40000 0x00 0x20000>,
	      <0x00 0x4bc00000 0x00 0x100000>,
	      <0x00 0x48600000 0x00 0x8000>,
	      <0x00 0x484a4000 0x00 0x2000>,
	      <0x00 0x484c2000 0x00 0x2000>;
	reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt",
		    "cfg", "tchan", "rchan";
};

&main_pktdma {
	bootph-pre-ram;
	reg = <0x00 0x485c0000 0x00 0x100>,
	      <0x00 0x4a800000 0x00 0x20000>,
	      <0x00 0x4aa00000 0x00 0x40000>,
	      <0x00 0x4b800000 0x00 0x400000>,
	      <0x00 0x485e0000 0x00 0x20000>,
	      <0x00 0x484a0000 0x00 0x4000>,
	      <0x00 0x484c0000 0x00 0x2000>,
	      <0x00 0x48430000 0x00 0x4000>;
	reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt", "cfg",
		    "tchan", "rchan", "rflow";
};

&ospi0_pins_default {
	bootph-pre-ram;
};

&fss {
	bootph-pre-ram;
};

&ospi0 {
	bootph-pre-ram;

	flash@0 {
		bootph-pre-ram;

		partitions {
			bootph-pre-ram;
			#address-cells = <1>;
			#size-cells = <1>;

			partition@3fc0000 {
				bootph-pre-ram;
				reg = <0x3fc0000 0x40000>;
			};
		};
	};
};

&gpmc0 {
	bootph-pre-ram;
};

&elm0 {
	bootph-pre-ram;
};

&main_gpio0 {
	bootph-pre-ram;
};