// SPDX-License-Identifier: GPL-2.0 /* * Common AM62A EVM dts file for SPLs * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ */ / { chosen { stdout-path = "serial2:115200n8"; tick-timer = &timer1; }; memory@80000000 { bootph-pre-ram; }; }; &cbass_main { bootph-pre-ram; timer1: timer@2400000 { compatible = "ti,omap5430-timer"; reg = <0x00 0x2400000 0x00 0x80>; ti,timer-alwon; clock-frequency = <25000000>; bootph-pre-ram; }; }; &dmss { bootph-pre-ram; }; &secure_proxy_main { bootph-pre-ram; }; &dmsc { bootph-pre-ram; }; &k3_pds { bootph-pre-ram; }; &k3_clks { bootph-pre-ram; }; &k3_reset { bootph-pre-ram; }; &wkup_conf { bootph-pre-ram; }; &chipid { bootph-pre-ram; }; &main_pmx0 { bootph-pre-ram; }; &main_uart0 { bootph-pre-ram; }; &main_uart0_pins_default { bootph-pre-ram; }; &main_uart1 { bootph-pre-ram; }; &cbass_mcu { bootph-pre-ram; }; &cbass_wakeup { bootph-pre-ram; }; &mcu_pmx0 { bootph-pre-ram; }; &wkup_uart0 { bootph-pre-ram; }; &main_gpio0 { bootph-pre-ram; }; &main_i2c0 { bootph-pre-ram; }; &main_i2c0_pins_default { bootph-pre-ram; }; &main_i2c1 { bootph-pre-ram; }; &main_i2c1_pins_default { bootph-pre-ram; }; &exp1 { bootph-pre-ram; }; &sdhci0 { bootph-pre-ram; }; &main_mmc0_pins_default { bootph-pre-ram; }; &sdhci1 { bootph-pre-ram; }; &main_mmc1_pins_default { bootph-pre-ram; }; &k3_reset { bootph-pre-ram; }; &dmsc { bootph-pre-ram; k3_sysreset: sysreset-controller { compatible = "ti,sci-sysreset"; bootph-pre-ram; }; }; &vdd_mmc1 { bootph-pre-ram; }; &main_bcdma { bootph-pre-ram; reg = <0x00 0x485c0100 0x00 0x100>, <0x00 0x4c000000 0x00 0x20000>, <0x00 0x4a820000 0x00 0x20000>, <0x00 0x4aa40000 0x00 0x20000>, <0x00 0x4bc00000 0x00 0x100000>, <0x00 0x48600000 0x00 0x8000>, <0x00 0x484a4000 0x00 0x2000>, <0x00 0x484c2000 0x00 0x2000>; reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt", "cfg", "tchan", "rchan"; }; &main_pktdma { bootph-pre-ram; reg = <0x00 0x485c0000 0x00 0x100>, <0x00 0x4a800000 0x00 0x20000>, <0x00 0x4aa00000 0x00 0x40000>, <0x00 0x4b800000 0x00 0x400000>, <0x00 0x485e0000 0x00 0x20000>, <0x00 0x484a0000 0x00 0x4000>, <0x00 0x484c0000 0x00 0x2000>, <0x00 0x48430000 0x00 0x4000>; reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt", "cfg", "tchan", "rchan", "rflow"; }; &cpsw3g { reg = <0x00 0x08000000 0x00 0x200000>, <0x00 0x43000200 0x00 0x8>; reg-names = "cpsw_nuss", "mac_efuse"; /delete-property/ ranges; pinctrl-0 = <&main_rgmii1_pins_default &main_mdio1_pins_default>; /* HACK: MDIO driver is not DM enabled */ bootph-pre-ram; cpsw-phy-sel@04044 { compatible = "ti,am64-phy-gmii-sel"; reg = <0x00 0x00104044 0x00 0x8>; bootph-pre-ram; }; }; &usbss0 { bootph-pre-ram; }; &usb0 { bootph-pre-ram; }; &fss { bootph-pre-ram; }; &ospi0_pins_default { bootph-pre-ram; }; &ospi0 { bootph-pre-ram; flash@0 { bootph-pre-ram; partitions { bootph-pre-ram; }; }; };