// SPDX-License-Identifier: GPL-2.0
/*
 * Device Tree Source for AM625 SoC Family MCU Domain peripherals
 *
 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
 */

&cbass_mcu {
	mcu_ram: sram@79100000 {
		compatible = "mmio-sram";
		reg = <0x00 0x79100000 0x00 0x80000>;
		ranges = <0x00 0x00 0x79100000 0x80000>;
		#address-cells = <1>;
		#size-cells = <1>;

		mcu_sram1@0 {
			reg = <0x0 0x80000>;
		};
	};

	mcu_pmx0: pinctrl@4084000 {
		compatible = "pinctrl-single";
		reg = <0x00 0x04084000 0x00 0x88>;
		#pinctrl-cells = <1>;
		pinctrl-single,register-width = <32>;
		pinctrl-single,function-mask = <0xffffffff>;
		status = "disabled";
	};

	mcu_uart0: serial@4a00000 {
		compatible = "ti,am64-uart", "ti,am654-uart";
		reg = <0x00 0x04a00000 0x00 0x100>;
		interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
		power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
		clocks = <&k3_clks 149 0>;
		clock-names = "fclk";
		status = "disabled";
	};

	mcu_i2c0: i2c@4900000 {
		compatible = "ti,am64-i2c", "ti,omap4-i2c";
		reg = <0x00 0x04900000 0x00 0x100>;
		interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
		clocks = <&k3_clks 106 2>;
		clock-names = "fck";
		status = "disabled";
	};

	mcu_r5fss0: r5fss@79000000 {
		compatible = "ti,am62-r5fss";
		ti,cluster-mode = <0>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x79000000 0x00 0x79000000 0x8000>,
				 <0x79020000 0x00 0x79020000 0x8000>;
		power-domains = <&k3_pds 7 TI_SCI_PD_EXCLUSIVE>;

		mcu_r5fss0_core0: r5f@79000000 {
				compatible = "ti,am62-r5f";
				reg = <0x79000000 0x00008000>,
					  <0x79020000 0x00008000>;
				reg-names = "atcm", "btcm";
				ti,sci = <&dmsc>;
				ti,sci-dev-id = <9>;
				ti,sci-proc-ids = <0x03 0xff>;
				resets = <&k3_reset 9 1>;
				firmware-name = "am62-mcu-r5f0_0-fw";
				ti,atcm-enable = <0>;
				ti,btcm-enable = <1>;
				ti,loczrama = <0>;
				sram = <&mcu_ram>;
		};
	};
};