From 869e8ae0323a48974a476d666aa3d03def744f16 Mon Sep 17 00:00:00 2001 From: Magnus Lilja Date: Fri, 23 Apr 2010 20:30:49 +0200 Subject: i.MX31: Activate NAND support for i.MX31 Litekit board. Signed-off-by: Magnus Lilja --- include/configs/imx31_litekit.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include') diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h index 61310089b7..d58ca8a2a1 100644 --- a/include/configs/imx31_litekit.h +++ b/include/configs/imx31_litekit.h @@ -89,6 +89,7 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_SPI #define CONFIG_CMD_DATE +#define CONFIG_CMD_NAND #define CONFIG_BOOTDELAY 3 @@ -174,4 +175,13 @@ #undef CONFIG_CMD_MTDPARTS #define CONFIG_JFFS2_DEV "nor0" +/* + * NAND flash + */ +#define CONFIG_NAND_MXC +#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR +#define CONFIG_MXC_NAND_HWECC + #endif /* __CONFIG_H */ -- cgit v1.2.3 From 3bff02dc838e04c43388cdfe50848394f01948f7 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Sun, 4 Apr 2010 23:08:03 +0200 Subject: MX: Added Freescale Power Management Driver The patch add supports for the Freescale's Power Management Controller (known as Atlas) used together with i.MX31/51 processors. It was tested with a MC13783 (MX31) and MC13892 (MX51). Signed-off-by: Stefano Babic --- include/fsl_pmic.h | 128 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 128 insertions(+) create mode 100644 include/fsl_pmic.h (limited to 'include') diff --git a/include/fsl_pmic.h b/include/fsl_pmic.h new file mode 100644 index 0000000000..e3abde6e4d --- /dev/null +++ b/include/fsl_pmic.h @@ -0,0 +1,128 @@ +/* + * (C) Copyright 2010 + * Stefano Babic, DENX Software Engineering, sbabic@denx.de. + * + * (C) Copyright 2009 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __FSL_PMIC_H__ +#define __FSL_PMIC_H__ + +/* + * The registers of different PMIC has the same meaning + * but the bit positions of the fields can differ or + * some fields has a meaning only on some devices. + * You have to check with the internal SPI bitmap + * (see Freescale Documentation) to set the registers + * for the device you are using + */ +enum { + REG_INT_STATUS0 = 0, + REG_INT_MASK0, + REG_INT_SENSE0, + REG_INT_STATUS1, + REG_INT_MASK1, + REG_INT_SENSE1, + REG_PU_MODE_S, + REG_IDENTIFICATION, + REG_UNUSED0, + REG_ACC0, + REG_ACC1, /*10 */ + REG_UNUSED1, + REG_UNUSED2, + REG_POWER_CTL0, + REG_POWER_CTL1, + REG_POWER_CTL2, + REG_REGEN_ASSIGN, + REG_UNUSED3, + REG_MEM_A, + REG_MEM_B, + REG_RTC_TIME, /*20 */ + REG_RTC_ALARM, + REG_RTC_DAY, + REG_RTC_DAY_ALARM, + REG_SW_0, + REG_SW_1, + REG_SW_2, + REG_SW_3, + REG_SW_4, + REG_SW_5, + REG_SETTING_0, /*30 */ + REG_SETTING_1, + REG_MODE_0, + REG_MODE_1, + REG_POWER_MISC, + REG_UNUSED4, + REG_UNUSED5, + REG_UNUSED6, + REG_UNUSED7, + REG_UNUSED8, + REG_UNUSED9, /*40 */ + REG_UNUSED10, + REG_UNUSED11, + REG_ADC0, + REG_ADC1, + REG_ADC2, + REG_ADC3, + REG_ADC4, + REG_CHARGE, + REG_USB0, + REG_USB1, /*50 */ + REG_LED_CTL0, + REG_LED_CTL1, + REG_LED_CTL2, + REG_LED_CTL3, + REG_UNUSED12, + REG_UNUSED13, + REG_TRIM0, + REG_TRIM1, + REG_TEST0, + REG_TEST1, /*60 */ + REG_TEST2, + REG_TEST3, + REG_TEST4, +}; + +/* REG_POWER_MISC */ +#define GPO1EN (1 << 6) +#define GPO1STBY (1 << 7) +#define GPO2EN (1 << 8) +#define GPO2STBY (1 << 9) +#define GPO3EN (1 << 10) +#define GPO3STBY (1 << 11) +#define GPO4EN (1 << 12) +#define GPO4STBY (1 << 13) +#define PWGT1SPIEN (1 << 15) +#define PWGT2SPIEN (1 << 16) +#define PWUP (1 << 21) + +/* Power Control 0 */ +#define COINCHEN (1 << 23) +#define BATTDETEN (1 << 19) + +/* Interrupt status 1 */ +#define RTCRSTI (1 << 7) + +void pmic_show_pmic_info(void); +void pmic_reg_write(u32 reg, u32 value); +u32 pmic_reg_read(u32 reg); + +#endif -- cgit v1.2.3 From f9c7affa9b66498190f309edc4643b4698e21a8c Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Fri, 16 Apr 2010 17:11:19 +0200 Subject: MX: RTC13783 uses general function to access PMIC The RTC is part of the Freescale's PMIC controller. Use general function to access to PMIC internal registers. Signed-off-by: Stefano Babic Tested-by: Magnus Lilja --- include/configs/imx31_litekit.h | 9 ++++++--- include/configs/mx31ads.h | 8 +++++--- include/configs/mx31pdk.h | 9 +++++---- 3 files changed, 16 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h index d58ca8a2a1..49048563cb 100644 --- a/include/configs/imx31_litekit.h +++ b/include/configs/imx31_litekit.h @@ -68,10 +68,13 @@ #define CONFIG_DEFAULT_SPI_BUS 1 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH) +#define CONFIG_FSL_PMIC +#define CONFIG_FSL_PMIC_BUS 1 +#define CONFIG_FSL_PMIC_CS 0 +#define CONFIG_FSL_PMIC_CLK 1000000 +#define CONFIG_FSL_PMIC_MODE (SPI_MODE_2 | SPI_CS_HIGH) + #define CONFIG_RTC_MC13783 1 -/* MC13783 connected to CSPI2 and SS0 */ -#define CONFIG_MC13783_SPI_BUS 1 -#define CONFIG_MC13783_SPI_CS 0 /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h index ec1c905403..dedecd7fb6 100644 --- a/include/configs/mx31ads.h +++ b/include/configs/mx31ads.h @@ -65,10 +65,12 @@ #define CONFIG_DEFAULT_SPI_BUS 1 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH) +#define CONFIG_FSL_PMIC +#define CONFIG_FSL_PMIC_BUS 1 +#define CONFIG_FSL_PMIC_CS 0 +#define CONFIG_FSL_PMIC_CLK 1000000 +#define CONFIG_FSL_PMIC_MODE (SPI_MODE_2 | SPI_CS_HIGH) #define CONFIG_RTC_MC13783 1 -/* MC13783 connected to CSPI2 and SS0 */ -#define CONFIG_MC13783_SPI_BUS 1 -#define CONFIG_MC13783_SPI_CS 0 /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index bee2f45a15..0414cc37a7 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -69,12 +69,13 @@ #define CONFIG_DEFAULT_SPI_BUS 1 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH) +#define CONFIG_FSL_PMIC +#define CONFIG_FSL_PMIC_BUS 1 +#define CONFIG_FSL_PMIC_CS 2 +#define CONFIG_FSL_PMIC_CLK 1000000 +#define CONFIG_FSL_PMIC_MODE (SPI_MODE_2 | SPI_CS_HIGH) #define CONFIG_RTC_MC13783 1 -/* MC13783 connected to CSPI2 and SS2 */ -#define CONFIG_MC13783_SPI_BUS 1 -#define CONFIG_MC13783_SPI_CS 2 - /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1 -- cgit v1.2.3 From 0f12ce637b5b969f4732179ef08d5a0779bab6e2 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Fri, 16 Apr 2010 17:13:54 +0200 Subject: MX31: Add support for PMIC to the QONG module Add support for the PMIC (MC13783) controller and enables charging of the RTC battery. Signed-off-by: Stefano Babic --- include/configs/qong.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'include') diff --git a/include/configs/qong.h b/include/configs/qong.h index baf8481569..1a2f19f502 100644 --- a/include/configs/qong.h +++ b/include/configs/qong.h @@ -54,6 +54,17 @@ #define CONFIG_MX31_GPIO +#define CONFIG_MXC_SPI +#define CONFIG_DEFAULT_SPI_BUS 1 +#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH) +#define CONFIG_RTC_MC13783 + +#define CONFIG_FSL_PMIC +#define CONFIG_FSL_PMIC_BUS 1 +#define CONFIG_FSL_PMIC_CS 0 +#define CONFIG_FSL_PMIC_CLK 100000 +#define CONFIG_FSL_PMIC_MODE (SPI_MODE_2 | SPI_CS_HIGH) + /* FPGA */ #define CONFIG_QONG_FPGA 1 #define CONFIG_FPGA_BASE (CS1_BASE) @@ -98,6 +109,9 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_MII #define CONFIG_CMD_NAND +#define CONFIG_CMD_SPI +#define CONFIG_CMD_DATE +#define BOARD_LATE_INIT /* * You can compile in a MAC address and your custom net settings by using -- cgit v1.2.3 From f5ce366e1f9f242343c96272d25c0b9321378e9e Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Sun, 18 Apr 2010 19:27:44 +0200 Subject: MX: Added definition file for MC13892 The MC13892 is a Power Controller used with processors of the family MX.51. The file adds definitions to be used to setup the internal registers via SPI. Signed-off-by: Stefano Babic --- include/mc13892.h | 160 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 160 insertions(+) create mode 100644 include/mc13892.h (limited to 'include') diff --git a/include/mc13892.h b/include/mc13892.h new file mode 100644 index 0000000000..b291757412 --- /dev/null +++ b/include/mc13892.h @@ -0,0 +1,160 @@ +/* + * (C) Copyright 2010 + * Stefano Babic, DENX Software Engineering, sbabic@denx.de. + * + * (C) Copyright 2009 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#ifndef __MC13892_H__ +#define __MC13892_H__ + +/* REG_CHARGE */ + +#define VCHRG0 0 +#define VCHRG1 (1 << 1) +#define VCHRG2 (1 << 2) +#define ICHRG0 (1 << 3) +#define ICHRG1 (1 << 4) +#define ICHRG2 (1 << 5) +#define ICHRG3 (1 << 6) +#define ICHRGTR0 (1 << 7) +#define ICHRGTR1 (1 << 8) +#define ICHRGTR2 (1 << 9) +#define FETOVRD (1 << 10) +#define FETCTRL (1 << 11) +#define RVRSMODE (1 << 13) +#define OVCTRL0 (1 << 15) +#define OVCTRL1 (1 << 16) +#define UCHEN (1 << 17) +#define CHRGLEDEN (1 << 18) +#define CHRGRAWPDEN (1 << 19) +#define CHGRESTART (1 << 20) +#define CHGAUTOB (1 << 21) +#define CYCLB (1 << 22) +#define CHGAUTOVIB (1 << 23) + +/* REG_SETTING_0/1 */ +#define VO_1_20V 0 +#define VO_1_30V 1 +#define VO_1_50V 2 +#define VO_1_80V 3 +#define VO_1_10V 4 +#define VO_2_00V 5 +#define VO_2_77V 6 +#define VO_2_40V 7 + +#define VIOL 2 +#define VDIG 4 +#define VGEN 6 + +/* SWxMode for Normal/Standby Mode */ +#define SWMODE_OFF_OFF 0 +#define SWMODE_PWM_OFF 1 +#define SWMODE_PWMPS_OFF 2 +#define SWMODE_PFM_OFF 3 +#define SWMODE_AUTO_OFF 4 +#define SWMODE_PWM_PWM 5 +#define SWMODE_PWM_AUTO 6 +#define SWMODE_AUTO_AUTO 8 +#define SWMODE_PWM_PWMPS 9 +#define SWMODE_PWMS_PWMPS 10 +#define SWMODE_PWMS_AUTO 11 +#define SWMODE_AUTO_PFM 12 +#define SWMODE_PWM_PFM 13 +#define SWMODE_PWMS_PFM 14 +#define SWMODE_PFM_PFM 15 +#define SWMODE_MASK 0x0F + +#define SWMODE1_SHIFT 0 +#define SWMODE2_SHIFT 10 +#define SWMODE3_SHIFT 0 +#define SWMODE4_SHIFT 8 + +/* Fields in REG_SETTING_1 */ +#define VVIDEO_2_7 (0 << 2) +#define VVIDEO_2_775 (1 << 2) +#define VVIDEO_2_5 (2 << 2) +#define VVIDEO_2_6 (3 << 2) +#define VVIDEO_MASK (3 << 2) +#define VAUDIO_2_3 (0 << 4) +#define VAUDIO_2_5 (1 << 4) +#define VAUDIO_2_775 (2 << 4) +#define VAUDIO_3_0 (3 << 4) +#define VAUDIO_MASK (3 << 4) +#define VSD_1_8 (0 << 6) +#define VSD_2_0 (1 << 6) +#define VSD_2_6 (2 << 6) +#define VSD_2_7 (3 << 6) +#define VSD_2_8 (4 << 6) +#define VSD_2_9 (5 << 6) +#define VSD_3_0 (6 << 6) +#define VSD_3_15 (7 << 6) +#define VSD_MASK (7 << 6) +#define VGEN1_1_2 0 +#define VGEN1_1_5 1 +#define VGEN1_2_775 2 +#define VGEN1_3_15 3 +#define VGEN1_MASK 3 +#define VGEN2_1_2 (0 << 6) +#define VGEN2_1_5 (1 << 6) +#define VGEN2_1_6 (2 << 6) +#define VGEN2_1_8 (3 << 6) +#define VGEN2_2_7 (4 << 6) +#define VGEN2_2_8 (5 << 6) +#define VGEN2_3_0 (6 << 6) +#define VGEN2_3_15 (7 << 6) +#define VGEN2_MASK (7 << 6) + +/* Fields in REG_SETTING_1 */ +#define VGEN3_1_8 (0 << 14) +#define VGEN3_2_9 (1 << 14) +#define VGEN3_MASK (1 << 14) +#define VDIG_1_05 (0 << 4) +#define VDIG_1_25 (1 << 4) +#define VDIG_1_65 (2 << 4) +#define VDIG_1_8 (3 << 4) +#define VDIG_MASK (3 << 4) +#define VCAM_2_5 (0 << 16) +#define VCAM_2_6 (1 << 16) +#define VCAM_2_75 (2 << 16) +#define VCAM_3_0 (3 << 16) +#define VCAM_MASK (3 << 16) + +/* Reg Mode 1 */ +#define VGEN3EN (1 << 0) +#define VGEN3STBY (1 << 1) +#define VGEN3MODE (1 << 2) +#define VGEN3CONFIG (1 << 3) +#define VCAMEN (1 << 6) +#define VCAMSTBY (1 << 7) +#define VCAMMODE (1 << 8) +#define VCAMCONFIG (1 << 9) +#define VVIDEOEN (1 << 12) +#define VIDEOSTBY (1 << 13) +#define VVIDEOMODE (1 << 14) +#define VAUDIOEN (1 << 15) +#define VAUDIOSTBY (1 << 16) +#define VSDEN (1 << 18) +#define VSDSTBY (1 << 19) +#define VSDMODE (1 << 20) + +#endif -- cgit v1.2.3 From 0cf7d2440e1aa91ca65f1fc08ba309184d376da6 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Tue, 16 Mar 2010 17:22:21 +0100 Subject: Add SPI support to mx51evk board The patch adds SPI devices to the mx51evk board. The MC13892 chip (PMIC) is supported. Signed-off-by: Stefano Babic --- include/configs/mx51evk.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'include') diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 3626df73df..86a4731a69 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -54,12 +54,27 @@ /* size in bytes reserved for initial data */ #define CONFIG_SYS_GBL_DATA_SIZE 128 +#define BOARD_LATE_INIT + /* * Hardware drivers */ #define CONFIG_MXC_UART #define CONFIG_SYS_MX51_UART1 +/* + * SPI Configs + * */ +#define CONFIG_CMD_SPI + +#define CONFIG_MXC_SPI + +#define CONFIG_FSL_PMIC +#define CONFIG_FSL_PMIC_BUS 0 +#define CONFIG_FSL_PMIC_CS 0 +#define CONFIG_FSL_PMIC_CLK 2500000 +#define CONFIG_FSL_PMIC_MODE (SPI_CPOL | SPI_CS_HIGH) + /* * MMC Configs * */ -- cgit v1.2.3 From 72b81d399f92a4aa2843f395a9dabfe0961f8d38 Mon Sep 17 00:00:00 2001 From: Minkyu Kang Date: Mon, 31 May 2010 22:02:42 +0900 Subject: s5pc1xx: Add support for Samsung Goni board This patch adds support for the Samsung Goni board (S5PC110 SoC) Signed-off-by: Minkyu Kang Signed-off-by: Kyungmin Park --- include/configs/s5p_goni.h | 217 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 217 insertions(+) create mode 100644 include/configs/s5p_goni.h (limited to 'include') diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h new file mode 100644 index 0000000000..171ec94e76 --- /dev/null +++ b/include/configs/s5p_goni.h @@ -0,0 +1,217 @@ +/* + * Copyright (C) 2009 Samsung Electronics + * Minkyu Kang + * Kyungmin Park + * + * Configuation settings for the SAMSUNG Universal (s5pc100) board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* High Level Configuration Options */ +#define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */ +#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ +#define CONFIG_S5PC1XX 1 /* which is in a S5PC1XX Family */ +#define CONFIG_S5PC110 1 /* which is in a S5PC110 */ +#define CONFIG_MACH_GONI 1 /* working with Goni */ + +#include /* get chip and board defs */ + +#define CONFIG_ARCH_CPU_INIT +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#undef CONFIG_SKIP_RELOCATE_UBOOT + +/* input clock of PLL: has 24MHz input clock at S5PC110 */ +#define CONFIG_SYS_CLK_FREQ_C110 24000000 + +/* DRAM Base */ +#define CONFIG_SYS_SDRAM_BASE 0x30000000 + +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_CMDLINE_TAG +#define CONFIG_INITRD_TAG +#define CONFIG_CMDLINE_EDITING + +/* + * Size of malloc() pool + * 1MB = 0x100000, 0x100000 = 1024 * 1024 + */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes for */ + /* initial data */ +/* + * select serial console configuration + */ +#define CONFIG_SERIAL2 1 /* use SERIAL2 */ +#define CONFIG_SERIAL_MULTI 1 +#define CONFIG_BAUDRATE 115200 + +/* It should define before config_cmd_default.h */ +#define CONFIG_SYS_NO_FLASH 1 + +/* Command definition */ +#include + +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_MISC +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_XIMG +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_ONENAND +#define CONFIG_CMD_MTDPARTS + +#define CONFIG_BOOTDELAY 1 +#define CONFIG_ZERO_BOOTDELAY_CHECK + +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS + +/* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */ +#define MTDIDS_DEFAULT "onenand0=samsung-onenand" +#define MTDPARTS_DEFAULT "mtdparts=samsung-onenand:1m(bootloader)"\ + ",256k(params)"\ + ",2816k(config)"\ + ",8m(csa)"\ + ",7m(kernel)"\ + ",1m(log)"\ + ",12m(modem)"\ + ",60m(qboot)"\ + ",-(UBI)\0" + +#define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT + +#define CONFIG_BOOTCOMMAND "run ubifsboot" + +#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" + +#define CONFIG_RAMDISK_BOOT "root=/dev/ram0 rw rootfstype=ext2" \ + " ${console} ${meminfo}" + +#define CONFIG_COMMON_BOOT "${console} ${meminfo} ${mtdparts}" + +#define CONFIG_BOOTARGS "root=/dev/mtdblock8 ubi.mtd=8 ubi.mtd=3 ubi.mtd=6" \ + " rootfstype=cramfs " CONFIG_COMMON_BOOT + +#define CONFIG_UPDATEB "updateb=onenand erase 0x0 0x100000;" \ + " onenand write 0x32008000 0x0 0x100000\0" + +#define CONFIG_UBI_MTD " ubi.mtd=${ubiblock} ubi.mtd=3 ubi.mtd=6" + +#define CONFIG_UBIFS_OPTION "rootflags=bulk_read,no_chk_data_crc" + +#define CONFIG_ENV_OVERWRITE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_UPDATEB \ + "updatek=" \ + "onenand erase 0xc00000 0x600000;" \ + "onenand write 0x31008000 0xc00000 0x600000\0" \ + "updateu=" \ + "onenand erase 0x01560000 0x1eaa0000;" \ + "onenand write 0x32000000 0x1260000 0x8C0000\0" \ + "bootk=" \ + "onenand read 0x30007FC0 0xc00000 0x600000;" \ + "bootm 0x30007FC0\0" \ + "flashboot=" \ + "set bootargs root=/dev/mtdblock${bootblock} " \ + "rootfstype=${rootfstype}" CONFIG_UBI_MTD " ${opts} " \ + "${lcdinfo} " CONFIG_COMMON_BOOT "; run bootk\0" \ + "ubifsboot=" \ + "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ + CONFIG_UBIFS_OPTION CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \ + CONFIG_COMMON_BOOT "; run bootk\0" \ + "tftpboot=" \ + "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ + CONFIG_UBIFS_OPTION CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \ + CONFIG_COMMON_BOOT "; tftp 0x30007FC0 uImage; " \ + "bootm 0x30007FC0\0" \ + "ramboot=" \ + "set bootargs " CONFIG_RAMDISK_BOOT \ + " initrd=0x33000000,8M ramdisk=8192\0" \ + "mmcboot=" \ + "set bootargs root=${mmcblk} rootfstype=${rootfstype}" \ + CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \ + CONFIG_COMMON_BOOT "; run bootk\0" \ + "boottrace=setenv opts initcall_debug; run bootcmd\0" \ + "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \ + "verify=n\0" \ + "rootfstype=cramfs\0" \ + "console=" CONFIG_DEFAULT_CONSOLE \ + "mtdparts=" MTDPARTS_DEFAULT \ + "meminfo=mem=80M mem=256M@0x40000000 mem=128M@0x50000000\0" \ + "mmcblk=/dev/mmcblk1p1\0" \ + "bootblock=9\0" \ + "ubiblock=8\0" \ + "ubi=enabled\0" \ + "opts=always_resume=1" + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_PROMPT "Goni # " +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +/* memtest works on */ +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4000000) + +#define CONFIG_SYS_HZ 1000 + +/* valid baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* Stack sizes */ +#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ + +/* Goni has 3 banks of DRAM, but swap the bank */ +#define CONFIG_NR_DRAM_BANKS 3 +#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* OneDRAM Bank #0 */ +#define PHYS_SDRAM_1_SIZE (80 << 20) /* 80 MB in Bank #0 */ +#define PHYS_SDRAM_2 0x40000000 /* mDDR DMC1 Bank #1 */ +#define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in Bank #1 */ +#define PHYS_SDRAM_3 0x50000000 /* mDDR DMC2 Bank #2 */ +#define PHYS_SDRAM_3_SIZE (128 << 20) /* 128 MB in Bank #2 */ + +#define CONFIG_SYS_MONITOR_BASE 0x00000000 +#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */ + +/* FLASH and environment organization */ +#define CONFIG_ENV_IS_IN_ONENAND 1 +#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB, 0x40000 */ +#define CONFIG_ENV_ADDR (1 << 20) /* 1 MB, 0x100000 */ + +#define CONFIG_USE_ONENAND_BOARD_INIT +#define CONFIG_SAMSUNG_ONENAND 1 +#define CONFIG_SYS_ONENAND_BASE 0xB0000000 + +#define CONFIG_DOS_PARTITION 1 + +#endif /* __CONFIG_H */ -- cgit v1.2.3 From 87f314e98beae1d922ef5d182eb9b4c2027f11ed Mon Sep 17 00:00:00 2001 From: Minkyu Kang Date: Tue, 6 Jul 2010 20:58:41 +0900 Subject: s5p_goni: enable mmc0 Adds the board_mmc_init function and enable the mmc command Signed-off-by: Minkyu Kang Signed-off-by: Jaehoon Chung Signed-off-by: Kyungmin Park --- include/configs/s5p_goni.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 171ec94e76..b2bf96ace6 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -67,6 +67,11 @@ #define CONFIG_SERIAL_MULTI 1 #define CONFIG_BAUDRATE 115200 +/* MMC */ +#define CONFIG_GENERIC_MMC 1 +#define CONFIG_MMC 1 +#define CONFIG_S5P_MMC 1 + /* It should define before config_cmd_default.h */ #define CONFIG_SYS_NO_FLASH 1 @@ -82,6 +87,7 @@ #define CONFIG_CMD_REGINFO #define CONFIG_CMD_ONENAND #define CONFIG_CMD_MTDPARTS +#define CONFIG_CMD_MMC #define CONFIG_BOOTDELAY 1 #define CONFIG_ZERO_BOOTDELAY_CHECK -- cgit v1.2.3 From 2ad853c3485e08612bb7725ba50d35b679978ebc Mon Sep 17 00:00:00 2001 From: Steve Sakoman Date: Thu, 15 Jul 2010 13:43:10 -0700 Subject: ARMV7: Add pad mux support for OMAP4 Add functional multiplexing support for OMAP4 pads. Configure all the pads for the OMAP4430 SDP and OMAP4 Panda boards Signed-off-by: Steve Sakoman Signed-off-by: Aneesh V Signed-off-by: Sandeep Paulraj --- include/configs/omap4_panda.h | 1 + include/configs/omap4_sdp4430.h | 1 + 2 files changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index b1e40a38f6..0c5ef7b78a 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -35,6 +35,7 @@ #define CONFIG_OMAP44XX 1 /* which is a 44XX */ #define CONFIG_OMAP4430 1 /* which is in a 4430 */ #define CONFIG_PANDA 1 /* working with Panda */ +#define CONFIG_ARCH_CPU_INIT /* Get CPU defs */ #include diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index 8121554448..ede7691d18 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -36,6 +36,7 @@ #define CONFIG_OMAP44XX 1 /* which is a 44XX */ #define CONFIG_OMAP4430 1 /* which is in a 4430 */ #define CONFIG_4430SDP 1 /* working with SDP */ +#define CONFIG_ARCH_CPU_INIT /* Get CPU defs */ #include -- cgit v1.2.3 From 674e0b217f794800048d80de09a71255b890a53e Mon Sep 17 00:00:00 2001 From: Steve Sakoman Date: Tue, 20 Jul 2010 14:56:07 -0700 Subject: ARMV7: Fix udelay for OMAP4 The OMAP4 x-load code sets gptimer1 clock source to 32Khz. This isn't acceptable for udelay. This patch changes from gptimer1 to gptimer2, which uses sys_clk at 38.4 Mhz. Signed-off-by: Steve Sakoman Signed-off-by: Sandeep Paulraj --- include/configs/omap4_panda.h | 2 +- include/configs/omap4_sdp4430.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index 0c5ef7b78a..0fb1ad30d2 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -196,7 +196,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x80000000 /* Use General purpose timer 1 */ -#define CONFIG_SYS_TIMERBASE GPT1_BASE +#define CONFIG_SYS_TIMERBASE GPT2_BASE #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index ede7691d18..ef5272b494 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -197,7 +197,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x80000000 /* Use General purpose timer 1 */ -#define CONFIG_SYS_TIMERBASE GPT1_BASE +#define CONFIG_SYS_TIMERBASE GPT2_BASE #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ #define CONFIG_SYS_HZ 1000 -- cgit v1.2.3 From 516799f6777caab2151ed276a3c198940962f06a Mon Sep 17 00:00:00 2001 From: Steve Sakoman Date: Thu, 15 Jul 2010 12:53:42 -0700 Subject: ARMV7: Add support for the TWL6030 I2C power chip used in OMAP4 systems This patch add the basic infrastructure for the TWL6030 driver and enables support in the two existing OMAP4 boards, Panda and OMAP4430 SDP Signed-off-by: Steve Sakoman Signed-off-by: Sandeep Paulraj --- include/configs/omap4_panda.h | 3 ++ include/configs/omap4_sdp4430.h | 3 ++ include/twl6030.h | 91 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 97 insertions(+) create mode 100644 include/twl6030.h (limited to 'include') diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index 0fb1ad30d2..4bec00bf0e 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -103,6 +103,9 @@ #define CONFIG_DRIVER_OMAP34XX_I2C 1 #define CONFIG_I2C_MULTI_BUS 1 +/* TWL6030 */ +#define CONFIG_TWL6030_POWER 1 + /* MMC */ #define CONFIG_MMC 1 #define CONFIG_OMAP3_MMC 1 diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index ef5272b494..c18e71a3c2 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -104,6 +104,9 @@ #define CONFIG_DRIVER_OMAP34XX_I2C 1 #define CONFIG_I2C_MULTI_BUS 1 +/* TWL6030 */ +#define CONFIG_TWL6030_POWER 1 + /* MMC */ #define CONFIG_MMC 1 #define CONFIG_OMAP3_MMC 1 diff --git a/include/twl6030.h b/include/twl6030.h new file mode 100644 index 0000000000..54923ab2e4 --- /dev/null +++ b/include/twl6030.h @@ -0,0 +1,91 @@ +/* + * (C) Copyright 2010 + * Texas Instruments, + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +/* I2C chip addresses */ +#define TWL6030_CHIP_PM 0x48 + +#define TWL6030_CHIP_USB 0x49 +#define TWL6030_CHIP_ADC 0x49 +#define TWL6030_CHIP_CHARGER 0x49 +#define TWL6030_CHIP_PWM 0x49 + +/* Battery CHARGER REGISTERS */ +#define CONTROLLER_INT_MASK 0xE0 +#define CONTROLLER_CTRL1 0xE1 +#define CONTROLLER_WDG 0xE2 +#define CONTROLLER_STAT1 0xE3 +#define CHARGERUSB_INT_STATUS 0xE4 +#define CHARGERUSB_INT_MASK 0xE5 +#define CHARGERUSB_STATUS_INT1 0xE6 +#define CHARGERUSB_STATUS_INT2 0xE7 +#define CHARGERUSB_CTRL1 0xE8 +#define CHARGERUSB_CTRL2 0xE9 +#define CHARGERUSB_CTRL3 0xEA +#define CHARGERUSB_STAT1 0xEB +#define CHARGERUSB_VOREG 0xEC +#define CHARGERUSB_VICHRG 0xED +#define CHARGERUSB_CINLIMIT 0xEE +#define CHARGERUSB_CTRLLIMIT1 0xEF + +/* CHARGERUSB_VICHRG */ +#define CHARGERUSB_VICHRG_500 0x4 +#define CHARGERUSB_VICHRG_1500 0xE +/* CHARGERUSB_CINLIMIT */ +#define CHARGERUSB_CIN_LIMIT_100 0x1 +#define CHARGERUSB_CIN_LIMIT_300 0x5 +#define CHARGERUSB_CIN_LIMIT_500 0x9 +#define CHARGERUSB_CIN_LIMIT_NONE 0xF +/* CONTROLLER_INT_MASK */ +#define MVAC_FAULT (1 << 6) +#define MAC_EOC (1 << 5) +#define MBAT_REMOVED (1 << 4) +#define MFAULT_WDG (1 << 3) +#define MBAT_TEMP (1 << 2) +#define MVBUS_DET (1 << 1) +#define MVAC_DET (1 << 0) +/* CHARGERUSB_INT_MASK */ +#define MASK_MCURRENT_TERM (1 << 3) +#define MASK_MCHARGERUSB_STAT (1 << 2) +#define MASK_MCHARGERUSB_THMREG (1 << 1) +#define MASK_MCHARGERUSB_FAULT (1 << 0) +/* CHARGERUSB_VOREG */ +#define CHARGERUSB_VOREG_3P52 0x01 +#define CHARGERUSB_VOREG_4P0 0x19 +#define CHARGERUSB_VOREG_4P2 0x23 +#define CHARGERUSB_VOREG_4P76 0x3F +/* CHARGERUSB_CTRL2 */ +#define CHARGERUSB_CTRL2_VITERM_50 (0 << 5) +#define CHARGERUSB_CTRL2_VITERM_100 (1 << 5) +#define CHARGERUSB_CTRL2_VITERM_150 (2 << 5) +/* CONTROLLER_CTRL1 */ +#define CONTROLLER_CTRL1_EN_CHARGER (1 << 4) +#define CONTROLLER_CTRL1_SEL_CHARGER (1 << 3) + +#define VUSB_CFG_STATE 0xA2 +#define MISC2 0xE5 + +void twl6030_init_battery_charging(void); +void twl6030_usb_device_settings(void); -- cgit v1.2.3 From 325abab7c12782235def2d00806dc39fe1c810e0 Mon Sep 17 00:00:00 2001 From: Steve Sakoman Date: Fri, 25 Jun 2010 12:44:33 -0700 Subject: ARMV7: Enable musb driver and usbtty on OMAP4430 SDP Signed-off-by: Steve Sakoman Signed-off-by: Sandeep Paulraj --- include/configs/omap4_sdp4430.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'include') diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index c18e71a3c2..e9909f91b1 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -113,6 +113,20 @@ #define CONFIG_SYS_MMC_SET_DEV 1 #define CONFIG_DOS_PARTITION 1 +/* USB */ +#define CONFIG_MUSB_UDC 1 +#define CONFIG_USB_OMAP3 1 + +/* USB device configuration */ +#define CONFIG_USB_DEVICE 1 +#define CONFIG_USB_TTY 1 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 +/* Change these to suit your needs */ +#define CONFIG_USBD_VENDORID 0x0451 +#define CONFIG_USBD_PRODUCTID 0x5678 +#define CONFIG_USBD_MANUFACTURER "Texas Instruments" +#define CONFIG_USBD_PRODUCT_NAME "SDP4430" + /* Flash */ #define CONFIG_SYS_NO_FLASH 1 @@ -146,6 +160,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ "console=ttyS2,115200n8\0" \ + "usbtty=cdc_acm\0" \ "mmcdev=1\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ "mmcrootfstype=ext3 rootwait\0" \ -- cgit v1.2.3 From cbd7b09cb3a3841710b31b5d1b208a4cceae433c Mon Sep 17 00:00:00 2001 From: Steve Sakoman Date: Fri, 25 Jun 2010 12:52:01 -0700 Subject: ARMV7: Enable musb driver and usbtty on OMAP4 Panda Signed-off-by: Steve Sakoman Signed-off-by: Sandeep Paulraj --- include/configs/omap4_panda.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'include') diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index 4bec00bf0e..1d76467277 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -112,6 +112,20 @@ #define CONFIG_SYS_MMC_SET_DEV 1 #define CONFIG_DOS_PARTITION 1 +/* USB */ +#define CONFIG_MUSB_UDC 1 +#define CONFIG_USB_OMAP3 1 + +/* USB device configuration */ +#define CONFIG_USB_DEVICE 1 +#define CONFIG_USB_TTY 1 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 +/* Change these to suit your needs */ +#define CONFIG_USBD_VENDORID 0x0451 +#define CONFIG_USBD_PRODUCTID 0x5678 +#define CONFIG_USBD_MANUFACTURER "Texas Instruments" +#define CONFIG_USBD_PRODUCT_NAME "OMAP4 Panda" + /* Flash */ #define CONFIG_SYS_NO_FLASH 1 @@ -145,6 +159,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ "console=ttyS2,115200n8\0" \ + "usbtty=cdc_acm\0" \ "mmcdev=1\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ "mmcrootfstype=ext3 rootwait\0" \ -- cgit v1.2.3 From 1b03eede4fed47c6af7df84b0f7b621ff3e3bb40 Mon Sep 17 00:00:00 2001 From: Steve Sakoman Date: Wed, 7 Jul 2010 15:25:25 -0700 Subject: ARMV7: Update default environment for OMAP4 boards Specify vram on command line, remove erroneous call to nandboot in the boot script, add CONFIG_BOOTDELAY Signed-off-by: Steve Sakoman Acked-by: Nishanth Menon Signed-off-by: Sandeep Paulraj --- include/configs/omap4_panda.h | 5 ++++- include/configs/omap4_sdp4430.h | 5 ++++- 2 files changed, 8 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index 1d76467277..a0d27a437d 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -153,6 +153,8 @@ * Environment setup */ +#define CONFIG_BOOTDELAY 3 + /* allow overwriting serial config and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -160,10 +162,12 @@ "loadaddr=0x82000000\0" \ "console=ttyS2,115200n8\0" \ "usbtty=cdc_acm\0" \ + "vram=16M\0" \ "mmcdev=1\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ "mmcrootfstype=ext3 rootwait\0" \ "mmcargs=setenv bootargs console=${console} " \ + "vram=${vram} " \ "root=${mmcroot} " \ "rootfstype=${mmcrootfstype}\0" \ "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ @@ -181,7 +185,6 @@ "else " \ "if run loaduimage; then " \ "run mmcboot; " \ - "else run nandboot; " \ "fi; " \ "fi; " \ "fi" diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index e9909f91b1..d5439f988a 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -154,6 +154,8 @@ * Environment setup */ +#define CONFIG_BOOTDELAY 3 + /* allow overwriting serial config and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -161,10 +163,12 @@ "loadaddr=0x82000000\0" \ "console=ttyS2,115200n8\0" \ "usbtty=cdc_acm\0" \ + "vram=16M\0" \ "mmcdev=1\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ "mmcrootfstype=ext3 rootwait\0" \ "mmcargs=setenv bootargs console=${console} " \ + "vram=${vram} " \ "root=${mmcroot} " \ "rootfstype=${mmcrootfstype}\0" \ "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ @@ -182,7 +186,6 @@ "else " \ "if run loaduimage; then " \ "run mmcboot; " \ - "else run nandboot; " \ "fi; " \ "fi; " \ "fi" -- cgit v1.2.3 From f2a37fcd9ba9d3d0aab5864141715596aff1de60 Mon Sep 17 00:00:00 2001 From: Albert Aribaud <[albert.aribaud@free.fr]> Date: Sun, 8 Aug 2010 05:17:05 +0530 Subject: ide: add configuration CONFIG_IDE_SWAP_IO This configuration option replaces a complex conditional in cmd_ide.c with an explicit define to be added to SoC or board configs. Signed-off-by: Albert Aribaud --- include/configs/ap325rxa.h | 1 + include/configs/ms7720se.h | 1 + include/configs/r2dplus.h | 1 + include/configs/r7780mp.h | 1 + 4 files changed, 4 insertions(+) (limited to 'include') diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h index 70dd47ecb5..80a5797493 100644 --- a/include/configs/ap325rxa.h +++ b/include/configs/ap325rxa.h @@ -138,6 +138,7 @@ #define CONFIG_SYS_ATA_DATA_OFFSET 0x200 /* data reg offset */ #define CONFIG_SYS_ATA_REG_OFFSET 0x200 /* reg offset */ #define CONFIG_SYS_ATA_ALT_OFFSET 0x210 /* alternate register offset */ +#define CONFIG_IDE_SWAP_IO /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 diff --git a/include/configs/ms7720se.h b/include/configs/ms7720se.h index ba0a3f8043..0ea3527e30 100644 --- a/include/configs/ms7720se.h +++ b/include/configs/ms7720se.h @@ -122,5 +122,6 @@ #define CONFIG_SYS_ATA_DATA_OFFSET 0 /* data reg offset */ #define CONFIG_SYS_ATA_REG_OFFSET 0 /* reg offset */ #define CONFIG_SYS_ATA_ALT_OFFSET 0x200 /* alternate register offset */ +#define CONFIG_IDE_SWAP_IO #endif /* __MS7720SE_H */ diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 8931b974aa..955f3ff57f 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -96,6 +96,7 @@ #define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */ #define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */ #define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */ +#define CONFIG_IDE_SWAP_IO /* * SuperH PCI Bridge Configration diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index 71c570eee9..3afe93a671 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -171,6 +171,7 @@ #define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */ #define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */ #define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */ +#define CONFIG_IDE_SWAP_IO #endif /* CONFIG_CMD_IDE */ #endif /* __R7780RP_H */ -- cgit v1.2.3 From ecaf3af2977e76484e0231d3113be3f4bbf2b8d6 Mon Sep 17 00:00:00 2001 From: Albert Aribaud <[albert.aribaud@free.fr]> Date: Sun, 8 Aug 2010 05:17:06 +0530 Subject: edminiv2: add mvsata_ide and cmd_ide support Add mvsata_ide and cmd_ide configuration in edminiv2 config Signed-off-by: Albert Aribaud --- include/configs/edminiv2.h | 34 +++++++++++++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 055931cda6..57dd1651f3 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -60,7 +60,7 @@ #define ORION5X_MPP0_7 0x00000003 #define ORION5X_MPP8_15 0x55550000 -#define ORION5X_MPP16_23 0x00000000 +#define ORION5X_MPP16_23 0x00005555 /* * Board-specific values for Orion5x GPIO low level init: @@ -131,6 +131,7 @@ * Commands configuration - using default command set for now */ #include +#define CONFIG_CMD_IDE /* * Network @@ -149,6 +150,37 @@ #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #endif +/* + * IDE + */ +#ifdef CONFIG_CMD_IDE +#define __io +#define CONFIG_IDE_PREINIT +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_EXT2 +/* ED Mini V has an IDE-compatible SATA connector for port 1 */ +#define CONFIG_MVSATA_IDE +#define CONFIG_MVSATA_IDE_USE_PORT1 +/* Needs byte-swapping for ATA data register */ +#define CONFIG_IDE_SWAP_IO +/* Data, registers and alternate blocks are at the same offset */ +#define CONFIG_SYS_ATA_DATA_OFFSET (0x0100) +#define CONFIG_SYS_ATA_REG_OFFSET (0x0100) +#define CONFIG_SYS_ATA_ALT_OFFSET (0x0100) +/* Each 8-bit ATA register is aligned to a 4-bytes address */ +#define CONFIG_SYS_ATA_STRIDE 4 +/* Controller supports 48-bits LBA addressing */ +#define CONFIG_LBA48 +/* A single bus, a single device */ +#define CONFIG_SYS_IDE_MAXBUS 1 +#define CONFIG_SYS_IDE_MAXDEVICE 1 +/* ATA registers base is at SATA controller base */ +#define CONFIG_SYS_ATA_BASE_ADDR ORION5X_SATA_BASE +/* ATA bus 0 is orion5x port 1 on ED Mini V2 */ +#define CONFIG_SYS_ATA_IDE0_OFFSET ORION5X_SATA_PORT1_OFFSET +/* end of IDE defines */ +#endif /* CMD_IDE */ + /* * Environment variables configurations */ -- cgit v1.2.3 From 86cf2ae492db316e73512a1786d57ece9b3a7624 Mon Sep 17 00:00:00 2001 From: Prafulla Wadaskar Date: Sat, 7 Aug 2010 17:44:25 +0530 Subject: Kirkwood: openrd_base: Added SATA support This patch enables mvsata driver and related filesystem support. The patch is tested for ide reset and ext2ls operation for a disk drive connected on SATA port0. This patch depends upon the patche-series http://lists.denx.de/pipermail/u-boot/2010-August/074908.html Signed-off-by: Prafulla Wadaskar --- include/configs/openrd_base.h | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) (limited to 'include') diff --git a/include/configs/openrd_base.h b/include/configs/openrd_base.h index 52fa73def9..846dfcd484 100644 --- a/include/configs/openrd_base.h +++ b/include/configs/openrd_base.h @@ -103,6 +103,7 @@ #define CONFIG_CMD_NAND #define CONFIG_CMD_PING #define CONFIG_CMD_USB +#define CONFIG_CMD_IDE /* * NAND configuration @@ -204,6 +205,36 @@ #define CONFIG_SUPPORT_VFAT #endif /* CONFIG_CMD_USB */ +/* + * IDe Support on SATA port0 + */ +#ifdef CONFIG_CMD_IDE +#define __io +#define CONFIG_CMD_EXT2 +#define CONFIG_MVSATA_IDE +#define CONFIG_IDE_PREINIT +#define CONFIG_MVSATA_IDE_USE_PORT1 +/* Needs byte-swapping for ATA data register */ +#define CONFIG_IDE_SWAP_IO +/* Data, registers and alternate blocks are at the same offset */ +#define CONFIG_SYS_ATA_DATA_OFFSET (0x0100) +#define CONFIG_SYS_ATA_REG_OFFSET (0x0100) +#define CONFIG_SYS_ATA_ALT_OFFSET (0x0100) +/* Each 8-bit ATA register is aligned to a 4-bytes address */ +#define CONFIG_SYS_ATA_STRIDE 4 +/* Controller supports 48-bits LBA addressing */ +#define CONFIG_LBA48 +/* CONFIG_CMD_IDE requires some #defines for ATA registers */ +#define CONFIG_SYS_IDE_MAXBUS 2 +#define CONFIG_SYS_IDE_MAXDEVICE 2 +/* ATA registers base is at SATA controller base */ +#define CONFIG_SYS_ATA_BASE_ADDR KW_SATA_BASE +/* ATA bus 0 is Kirkwood port 0 on openrd */ +#define CONFIG_SYS_ATA_IDE0_OFFSET KW_SATA_PORT0_OFFSET +/* ATA bus 1 is Kirkwood port 1 on openrd */ +#define CONFIG_SYS_ATA_IDE1_OFFSET KW_SATA_PORT1_OFFSET +#endif /* CONFIG_CMD_IDE */ + /* * File system */ -- cgit v1.2.3