From 83e0c2bbe319330454d9afc77f51693f07c5deed Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Tue, 16 Apr 2013 13:28:40 +0530 Subject: board/bsc9132qds:Add NAND boot support using new SPL format - Add NAND boot target - defines constants - Add spl_minimal.c to initialise DDR - update TLB, LAW entries as per NAND boot Signed-off-by: Prabhakar Kushwaha Signed-off-by: Andy Fleming --- include/configs/BSC9132QDS.h | 63 +++++++++++++++++++++++++++++++++++++++----- 1 file changed, 57 insertions(+), 6 deletions(-) (limited to 'include/configs') diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 9d15d0eb880..3aa44435a20 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -49,6 +49,27 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc #endif +#ifdef CONFIG_NAND +#define CONFIG_SPL +#define CONFIG_SPL_INIT_MINIMAL +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_MINIMAL +#define CONFIG_SPL_FLUSH_IMAGE +#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" + +#define CONFIG_SYS_TEXT_BASE 0x00201000 +#define CONFIG_SPL_TEXT_BASE 0xFFFFE000 +#define CONFIG_SPL_MAX_SIZE 8192 +#define CONFIG_SPL_RELOC_TEXT_BASE 0x00100000 +#define CONFIG_SPL_RELOC_STACK 0x00100000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) - 0x2000) +#define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE) +#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0 +#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" +#endif + #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0x8ff80000 #endif @@ -57,11 +78,12 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0x8ffffffc #endif -#ifndef CONFIG_SYS_MONITOR_BASE -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE +#else +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif - /* High Level Configuration Options */ #define CONFIG_BOOKE /* BOOKE */ #define CONFIG_E500 /* BOOKE e500 family */ @@ -222,6 +244,10 @@ combinations. this should be removed later * IFC Definitions */ /* NOR Flash on IFC */ + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_NO_FLASH +#endif #define CONFIG_SYS_FLASH_BASE 0x88000000 #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* Max number of sector: 32M */ @@ -302,7 +328,9 @@ combinations. this should be removed later #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) +#ifndef CONFIG_SPL_BUILD #define CONFIG_FSL_QIXIS +#endif #ifdef CONFIG_FSL_QIXIS #define CONFIG_SYS_FPGA_BASE 0xffb00000 #define CONFIG_SYS_I2C_FPGA_ADDR 0x66 @@ -338,6 +366,22 @@ combinations. this should be removed later #endif /* Set up IFC registers for boot location NOR/NAND */ +#if defined(CONFIG_NAND) +#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR +#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR_CSPR +#define CONFIG_SYS_AMASK1 CONFIG_SYS_NOR_AMASK +#define CONFIG_SYS_CSOR1 CONFIG_SYS_NOR_CSOR +#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NOR_FTIM0 +#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NOR_FTIM1 +#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NOR_FTIM2 +#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NOR_FTIM3 +#else #define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR_CSPR #define CONFIG_SYS_AMASK0 CONFIG_SYS_NOR_AMASK #define CONFIG_SYS_CSOR0 CONFIG_SYS_NOR_CSOR @@ -352,6 +396,7 @@ combinations. this should be removed later #define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NAND_FTIM1 #define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NAND_FTIM2 #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 +#endif #define CONFIG_BOARD_EARLY_INIT_F /* Call board_pre_init */ #define CONFIG_BOARD_EARLY_INIT_R @@ -374,6 +419,9 @@ combinations. this should be removed later #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) +#ifdef CONFIG_SPL_BUILD +#define CONFIG_NS16550_MIN_FUNCTIONS +#endif #define CONFIG_SERIAL_MULTI 1 /* Enable both serial ports */ #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* determine from environment */ @@ -503,7 +551,6 @@ combinations. this should be removed later /* * Environment */ -#if defined(CONFIG_SYS_RAMBOOT) #if defined(CONFIG_RAMBOOT_SDCARD) #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 @@ -517,11 +564,15 @@ combinations. this should be removed later #define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ #define CONFIG_ENV_SECT_SIZE 0x10000 #define CONFIG_ENV_SIZE 0x2000 -#else +#elif defined(CONFIG_NAND) +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE +#define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE) +#elif defined(CONFIG_SYS_RAMBOOT) #define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */ #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) #define CONFIG_ENV_SIZE 0x2000 -#endif #else #define CONFIG_ENV_IS_IN_FLASH #if CONFIG_SYS_MONITOR_BASE > 0xfff80000 -- cgit v1.2.3