From 3bb4cc312d8e634e9d283ffcb380248a9bbd5a79 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Mon, 14 Nov 2011 16:56:59 +0900 Subject: sh: sh_eth: Add support SH7724 Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu --- drivers/net/sh_eth.c | 42 +++++++++++++++++++++++------------------- drivers/net/sh_eth.h | 41 +++++++++++++++++++++++++++++++++++++---- 2 files changed, 60 insertions(+), 23 deletions(-) (limited to 'drivers') diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 27d040125e..995e249aeb 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -1,8 +1,8 @@ /* * sh_eth.c - Driver for Renesas SH7763's ethernet controler. * - * Copyright (C) 2008 Renesas Solutions Corp. - * Copyright (c) 2008 Nobuhiro Iwamatsu + * Copyright (C) 2008, 2011 Renesas Solutions Corp. + * Copyright (c) 2008, 2011 Nobuhiro Iwamatsu * Copyright (c) 2007 Carlos Munoz * * This program is free software; you can redistribute it and/or modify @@ -371,7 +371,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd) outl(0, TFTR(port)); outl((FIFO_SIZE_T | FIFO_SIZE_R), FDR(port)); outl(RMCR_RST, RMCR(port)); -#ifndef CONFIG_CPU_SH7757 +#if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724) outl(0, RPADIR(port)); #endif outl((FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR(port)); @@ -393,16 +393,19 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd) outl(val, MALR(port)); outl(RFLR_RFL_MIN, RFLR(port)); -#ifndef CONFIG_CPU_SH7757 +#if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724) outl(0, PIPR(port)); #endif +#if !defined(CONFIG_CPU_SH7724) outl(APR_AP, APR(port)); outl(MPR_MP, MPR(port)); -#ifdef CONFIG_CPU_SH7757 - outl(TPAUSER_UNLIMITED, TPAUSER(port)); -#else +#endif +#if defined(CONFIG_CPU_SH7763) outl(TPAUSER_TPAUSE, TPAUSER(port)); +#elif defined(CONFIG_CPU_SH7757) + outl(TPAUSER_UNLIMITED, TPAUSER(port)); #endif + /* Configure phy */ ret = sh_eth_phy_config(eth); if (ret) { @@ -412,33 +415,34 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd) phy = port_info->phydev; phy_startup(phy); + val = 0; + /* Set the transfer speed */ -#ifdef CONFIG_CPU_SH7763 if (phy->speed == 100) { printf(SHETHER_NAME ": 100Base/"); +#ifdef CONFIG_CPU_SH7763 outl(GECMR_100B, GECMR(port)); +#elif defined(CONFIG_CPU_SH7757) + outl(1, RTRATE(port)); +#elif defined(CONFIG_CPU_SH7724) + val = ECMR_RTM; +#endif } else if (phy->speed == 10) { printf(SHETHER_NAME ": 10Base/"); +#ifdef CONFIG_CPU_SH7763 outl(GECMR_10B, GECMR(port)); - } -#endif -#if defined(CONFIG_CPU_SH7757) - if (phy->speed == 100) { - printf("100Base/"); - outl(1, RTRATE(port)); - } else if (phy->speed == 10) { - printf("10Base/"); +#elif defined(CONFIG_CPU_SH7757) outl(0, RTRATE(port)); - } #endif + } /* Check if full duplex mode is supported by the phy */ if (phy->duplex) { printf("Full\n"); - outl((ECMR_CHG_DM|ECMR_RE|ECMR_TE|ECMR_DM), ECMR(port)); + outl(val | (ECMR_CHG_DM|ECMR_RE|ECMR_TE|ECMR_DM), ECMR(port)); } else { printf("Half\n"); - outl((ECMR_CHG_DM|ECMR_RE|ECMR_TE), ECMR(port)); + outl(val | (ECMR_CHG_DM|ECMR_RE|ECMR_TE), ECMR(port)); } return ret; diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h index 0692f8b065..27fde05bd6 100644 --- a/drivers/net/sh_eth.h +++ b/drivers/net/sh_eth.h @@ -1,8 +1,8 @@ /* * sh_eth.h - Driver for Renesas SuperH ethernet controler. * - * Copyright (C) 2008 Renesas Solutions Corp. - * Copyright (c) 2008 Nobuhiro Iwamatsu + * Copyright (C) 2008, 2011 Renesas Solutions Corp. + * Copyright (c) 2008, 2011 Nobuhiro Iwamatsu * Copyright (c) 2007 Carlos Munoz * * This program is free software; you can redistribute it and/or modify @@ -162,6 +162,32 @@ struct sh_eth_dev { #define MAHR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x01c0) #define MALR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x01c8) #define RTRATE(port) (BASE_IO_ADDR + 0x800 * (port) + 0x01fc) + +#elif defined(CONFIG_CPU_SH7724) +#define BASE_IO_ADDR 0xA4600000 + +#define TDLAR(port) (BASE_IO_ADDR + 0x0018) +#define RDLAR(port) (BASE_IO_ADDR + 0x0020) + +#define EDMR(port) (BASE_IO_ADDR + 0x0000) +#define EDTRR(port) (BASE_IO_ADDR + 0x0008) +#define EDRRR(port) (BASE_IO_ADDR + 0x0010) +#define EESR(port) (BASE_IO_ADDR + 0x0028) +#define EESIPR(port) (BASE_IO_ADDR + 0x0030) +#define TRSCER(port) (BASE_IO_ADDR + 0x0038) +#define TFTR(port) (BASE_IO_ADDR + 0x0048) +#define FDR(port) (BASE_IO_ADDR + 0x0050) +#define RMCR(port) (BASE_IO_ADDR + 0x0058) +#define FCFTR(port) (BASE_IO_ADDR + 0x0070) +#define ECMR(port) (BASE_IO_ADDR + 0x0100) +#define RFLR(port) (BASE_IO_ADDR + 0x0108) +#define ECSIPR(port) (BASE_IO_ADDR + 0x0118) +#define PIR(port) (BASE_IO_ADDR + 0x0120) +#define APR(port) (BASE_IO_ADDR + 0x0154) +#define MPR(port) (BASE_IO_ADDR + 0x0158) +#define TPAUSER(port) (BASE_IO_ADDR + 0x0164) +#define MAHR(port) (BASE_IO_ADDR + 0x01c0) +#define MALR(port) (BASE_IO_ADDR + 0x01c8) #endif /* @@ -183,7 +209,7 @@ enum DMAC_M_BIT { EDMR_SRST = 0x03, EMDR_DESC_R = 0x30, /* Descriptor reserve size */ EDMR_EL = 0x40, /* Litte endian */ -#elif defined CONFIG_CPU_SH7757 +#elif defined(CONFIG_CPU_SH7757) ||defined (CONFIG_CPU_SH7724) EDMR_SRST = 0x01, EMDR_DESC_R = 0x30, /* Descriptor reserve size */ EDMR_EL = 0x40, /* Litte endian */ @@ -325,7 +351,8 @@ enum FCFTR_BIT { /* Transfer descriptor bit */ enum TD_STS_BIT { -#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7757) +#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7757) \ + || defined(CONFIG_CPU_SH7724) TD_TACT = 0x80000000, #else TD_TACT = 0x7fffffff, @@ -350,6 +377,10 @@ enum FELIC_MODE_BIT { ECMR_PMDE = 0x00000200, ECMR_RE = 0x00000040, ECMR_TE = 0x00000020, ECMR_ILB = 0x00000008, ECMR_ELB = 0x00000004, ECMR_DM = 0x00000002, ECMR_PRM = 0x00000001, +#ifdef CONFIG_CPU_SH7724 + ECMR_RTM = 0x00000010, +#endif + }; #ifdef CONFIG_CPU_SH7763 @@ -357,6 +388,8 @@ enum FELIC_MODE_BIT { ECMR_TXF | ECMR_MCT) #elif CONFIG_CPU_SH7757 #define ECMR_CHG_DM (ECMR_ZPF) +#elif CONFIG_CPU_SH7724 +#define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF) #else #define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF | ECMR_MCT) #endif -- cgit v1.2.3 From 1d4a2c913fe76d9653d4fca17075be665181a76f Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Wed, 11 Jan 2012 10:12:08 +0900 Subject: net: sh_eth: Remove SH_ETH_PHY_DELAY SH_ETH_PHY_DELAY is not used. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu --- drivers/net/sh_eth.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers') diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 995e249aeb..0871575936 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -44,8 +44,6 @@ #define flush_cache_wback(...) #endif -#define SH_ETH_PHY_DELAY 50000 - int sh_eth_send(struct eth_device *dev, volatile void *packet, int len) { struct sh_eth_dev *eth = dev->priv; -- cgit v1.2.3 From 4ba62c7290fa7a98a734826c98dc403d7b06a3a8 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Wed, 11 Jan 2012 10:23:51 +0900 Subject: net: sh_eth: Collect up EDMR_INIT_CNT to TIMEOUT_CNT EDMR_INIT_CNT holds the check count of initialization. Since there were more same values (1000), this collected as TIMEOUT_CNT. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu --- drivers/net/sh_eth.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 0871575936..1bc44a8d2b 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -44,6 +44,8 @@ #define flush_cache_wback(...) #endif +#define TIMEOUT_CNT 1000 + int sh_eth_send(struct eth_device *dev, volatile void *packet, int len) { struct sh_eth_dev *eth = dev->priv; @@ -78,7 +80,7 @@ int sh_eth_send(struct eth_device *dev, volatile void *packet, int len) outl(EDTRR_TRNS, EDTRR(port)); /* Wait until packet is transmitted */ - timeout = 1000; + timeout = TIMEOUT_CNT; while (port_info->tx_desc_cur->td0 & TD_TACT && timeout--) udelay(100); @@ -134,7 +136,6 @@ int sh_eth_recv(struct eth_device *dev) return len; } -#define EDMR_INIT_CNT 1000 static int sh_eth_reset(struct sh_eth_dev *eth) { int port = eth->port; @@ -146,13 +147,13 @@ static int sh_eth_reset(struct sh_eth_dev *eth) /* Perform a software reset and wait for it to complete */ outl(EDMR_SRST, EDMR(port)); - for (i = 0; i < EDMR_INIT_CNT; i++) { + for (i = 0; i < TIMEOUT_CNT ; i++) { if (!(inl(EDMR(port)) & EDMR_SRST)) break; udelay(1000); } - if (i == EDMR_INIT_CNT) { + if (i == TIMEOUT_CNT) { printf(SHETHER_NAME ": Software reset timeout\n"); ret = -EIO; } -- cgit v1.2.3 From 73dba948f57f0d69cb63ee168155c51d0c33f2b8 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Wed, 11 Jan 2012 10:32:54 +0900 Subject: net: sh_eth: Remove unnecessary return Signed-off-by: Nobuhiro Iwamatsu --- drivers/net/sh_eth.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers') diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 1bc44a8d2b..8d3dac20af 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -94,7 +94,6 @@ int sh_eth_send(struct eth_device *dev, volatile void *packet, int len) if (port_info->tx_desc_cur >= port_info->tx_desc_base + NUM_TX_DESC) port_info->tx_desc_cur = port_info->tx_desc_base; - return ret; err: return ret; } -- cgit v1.2.3 From 117029c510c75f4c6d7ecb1172635d6a08755cf8 Mon Sep 17 00:00:00 2001 From: Phil Edworthy Date: Mon, 13 Feb 2012 02:03:50 +0000 Subject: sh: Fix sh7264 clock speed and related serial setting The generalised calculation of the serial bit rate reg also applies to sh7264, it was just the clock speed that was set incorrectly. Signed-off-by: Phil Edworthy Signed-off-by: Nobuhiro Iwamatsu --- drivers/serial/serial_sh.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers') diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h index 4e16e4803c..0b3e779c8e 100644 --- a/drivers/serial/serial_sh.h +++ b/drivers/serial/serial_sh.h @@ -686,8 +686,6 @@ static inline int scbrr_calc(struct uart_port port, int bps, int clk) #define SCBRR_VALUE(bps, clk) scbrr_calc(sh_sci, bps, clk) #elif defined(__H8300H__) || defined(__H8300S__) #define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1) -#elif defined(CONFIG_CPU_SH7264) -#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)) #else /* Generic SH */ #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1) #endif -- cgit v1.2.3