From c8a33a497698c86b7f0755c044f2a35dd9947f21 Mon Sep 17 00:00:00 2001 From: Apurva Nandan Date: Fri, 26 May 2023 14:42:41 +0530 Subject: mtd: spinand: Allow enabling Octal DTR mode in the core Enable Octal DTR SPI mode, i.e. 8D-8D-8D mode, if the SPI NAND flash device supports it. Mixed OSPI (1S-1S-8S & 1S-8S-8S), mixed DTR modes (1S-1D-8D), etc. aren't supported yet. The method to switch to Octal DTR SPI mode may vary across manufacturers. For example, for Winbond, it is enabled by writing values to the volatile configuration register. So, let the manufacturer's code have their own implementation for switching to Octal DTR SPI mode. Check for the SPI NAND device's support for Octal DTR mode using spinand flags, and if the data_ops and ctrl_ops are 8D-8D-8D, call change_mode() manufacturer op. If the SPI controller doesn't supports these modes, the selected data_ops and ctrl_ops will prevent switching to the Octal DTR mode. And finally update the spinand protocol and ctrl_ops on success. Signed-off-by: Apurva Nandan --- drivers/mtd/nand/spi/core.c | 55 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) (limited to 'drivers') diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index f5c5f87361a..8963018e1be 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -953,6 +953,57 @@ spinand_select_ctrl_ops_variant(struct spinand_device *spinand, return NULL; } +static bool spinand_op_is_octal_dtr(const struct spi_mem_op *op) +{ + return op->cmd.buswidth == 8 && op->cmd.dtr && + op->addr.buswidth == 8 && op->addr.dtr && + op->data.buswidth == 8 && op->data.dtr; +} + +static int spinand_init_octal_dtr_enable(struct spinand_device *spinand) +{ + struct udevice *dev = spinand->slave->dev; + const struct spinand_ctrl_ops *octal_dtr_ctrl_ops; + int ret; + + if (!(spinand->flags & SPINAND_HAS_OCTAL_DTR_BIT)) + return 0; + + if (!(spinand_op_is_octal_dtr(spinand->data_ops.read_cache) && + spinand_op_is_octal_dtr(spinand->data_ops.write_cache) && + spinand_op_is_octal_dtr(spinand->data_ops.update_cache))) + return 0; + + octal_dtr_ctrl_ops = spinand_select_ctrl_ops_variant(spinand, + spinand->desc_entry->ctrl_ops_variants, + SPINAND_8D); + + if (!octal_dtr_ctrl_ops) + return 0; + + if (!spinand->manufacturer->ops->change_protocol) { + dev_info(dev, + "Missing ->change_mode(), unable to switch mode\n"); + return -EOPNOTSUPP; + } + + ret = spinand->manufacturer->ops->change_protocol(spinand, SPINAND_8D); + if (ret) { + dev_err(dev, + "Failed to enable Octal DTR SPI mode (err = %d)\n", + ret); + return ret; + } + + spinand->protocol = SPINAND_8D; + spinand->ctrl_ops = octal_dtr_ctrl_ops; + + dev_dbg(dev, + "%s SPI NAND switched to Octal DTR SPI (8D-8D-8D) mode\n", + spinand->manufacturer->name); + return 0; +} + /** * spinand_match_and_init() - Try to find a match between a device ID and an * entry in a spinand_info table @@ -1142,6 +1193,10 @@ static int spinand_init(struct spinand_device *spinand) goto err_free_bufs; } + ret = spinand_init_octal_dtr_enable(spinand); + if (ret) + goto err_manuf_cleanup; + ret = nanddev_init(nand, &spinand_ops, THIS_MODULE); if (ret) goto err_manuf_cleanup; -- cgit v1.2.3